JPS61181131A - Etching method by molecular flow - Google Patents
Etching method by molecular flowInfo
- Publication number
- JPS61181131A JPS61181131A JP2245385A JP2245385A JPS61181131A JP S61181131 A JPS61181131 A JP S61181131A JP 2245385 A JP2245385 A JP 2245385A JP 2245385 A JP2245385 A JP 2245385A JP S61181131 A JPS61181131 A JP S61181131A
- Authority
- JP
- Japan
- Prior art keywords
- silicon
- etching
- molecular flow
- xenon difluoride
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005530 etching Methods 0.000 title claims abstract description 32
- 238000000034 method Methods 0.000 title claims abstract description 10
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 22
- 239000010703 silicon Substances 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims abstract description 16
- 229910052581 Si3N4 Inorganic materials 0.000 claims abstract description 14
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 14
- IGELFKKMDLGCJO-UHFFFAOYSA-N xenon difluoride Chemical compound F[Xe]F IGELFKKMDLGCJO-UHFFFAOYSA-N 0.000 claims abstract description 10
- 230000001678 irradiating effect Effects 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 20
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 18
- 235000012239 silicon dioxide Nutrition 0.000 abstract description 9
- 239000000377 silicon dioxide Substances 0.000 abstract description 9
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 abstract description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 5
- 239000012159 carrier gas Substances 0.000 abstract description 5
- 239000007789 gas Substances 0.000 abstract description 5
- 229910052786 argon Inorganic materials 0.000 abstract description 4
- 230000007547 defect Effects 0.000 abstract description 4
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 abstract description 3
- 239000000463 material Substances 0.000 abstract description 3
- 229910052731 fluorine Inorganic materials 0.000 abstract description 2
- 239000011737 fluorine Substances 0.000 abstract description 2
- BLIQUJLAJXRXSG-UHFFFAOYSA-N 1-benzyl-3-(trifluoromethyl)pyrrolidin-1-ium-3-carboxylate Chemical compound C1C(C(=O)O)(C(F)(F)F)CCN1CC1=CC=CC=C1 BLIQUJLAJXRXSG-UHFFFAOYSA-N 0.000 abstract 5
- 229910004014 SiF4 Inorganic materials 0.000 abstract 1
- 229910001873 dinitrogen Inorganic materials 0.000 abstract 1
- 238000010494 dissociation reaction Methods 0.000 abstract 1
- 230000005593 dissociations Effects 0.000 abstract 1
- ABTOQLMXBSRXSM-UHFFFAOYSA-N silicon tetrafluoride Chemical compound F[Si](F)(F)F ABTOQLMXBSRXSM-UHFFFAOYSA-N 0.000 abstract 1
- 238000001020 plasma etching Methods 0.000 description 5
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
- 229920002120 photoresistant polymer Polymers 0.000 description 4
- 238000001039 wet etching Methods 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 2
- 101000916532 Rattus norvegicus Zinc finger and BTB domain-containing protein 38 Proteins 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 239000011261 inert gas Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- 229910052724 xenon Inorganic materials 0.000 description 2
- FHNFHKCVQCLJFQ-UHFFFAOYSA-N xenon atom Chemical compound [Xe] FHNFHKCVQCLJFQ-UHFFFAOYSA-N 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000003754 machining Methods 0.000 description 1
- 230000002250 progressing effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
(産業上の利用分野)
本発明はゼノンフロライド(xep宜)分子流によるシ
リコンあるいは窒化シリコンのエツチング方法に関する
ものである。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of etching silicon or silicon nitride using a xenon fluoride (xep) molecular stream.
(従来技術とその問題点)
超L8Iレベルの高密度集積回路の製造に伴い、パター
ンの微細化が要求され、1μm以下の寸法を十分制御し
てパターンを形成することが必要となってきている。超
L8Iの製造においては、全プロセスで反応性イオンエ
ツチングが導入される。(Prior art and its problems) With the manufacture of ultra-L8I level high-density integrated circuits, miniaturization of patterns is required, and it has become necessary to form patterns with sufficient control of dimensions of 1 μm or less. . In ultra-L8I manufacturing, reactive ion etching is introduced in the entire process.
しかしそれと共にイオン照射損傷が問題となっている。However, ion irradiation damage has also become a problem.
8i基板への反応性イオンエツチングがおこなわれる素
子分離や溝堀シキャパシターにおいては、反応イオンエ
ツチングによシ発生した欠陥がリーク電流を引きおこし
、大きな問題となっている。従来は、反応性イオンエツ
チング後に、その欠陥を除去するためにウェットエツチ
ングを行なっていた。しかし、ウェットエツチングは等
方エツチングであシ寸法の制御性が之しいという欠点を
有していた。In device isolation and trench-horizon capacitors in which reactive ion etching is performed on 8i substrates, defects generated by reactive ion etching cause leakage current, which is a major problem. Conventionally, after reactive ion etching, wet etching was performed to remove the defects. However, wet etching has the disadvantage that it is isotropic etching and the controllability of the dimensions is poor.
(発明の目的)
本発明の目的は、シリコンあるいは窒化シリコンの無欠
陥異方性エツチング方法を提供することである。OBJECTS OF THE INVENTION It is an object of the present invention to provide a method for defect-free anisotropic etching of silicon or silicon nitride.
(発明の構成)
本発明によれば、表面にシリコン又は窒化シリコンを有
する基板上にマスクパターンを形成し方向性を有したゼ
ノンフロライド分子流を前記基板上に照射することによ
り前記シリコン又は窒化シリコンをエツチングする方法
が得られる。(Structure of the Invention) According to the present invention, a mask pattern is formed on a substrate having silicon or silicon nitride on the surface, and a directional xenon fluoride molecular flow is irradiated onto the substrate to form a mask pattern on the surface of the silicon or silicon nitride. A method for etching silicon is provided.
(発明の原理)
第1図(a)〜(c)を用いてシリコンをエツチングす
る場合について発明の詳細な説明する。(Principle of the Invention) The invention will be described in detail with respect to the case of etching silicon using FIGS. 1(a) to 1(c).
まずシリコン基板12上にゼノン70ライド(XeFl
)に対するエツチングマスク材11、例えば二酸化ケ
イ素膜やレジスト膜を形成する((a)図)。次にエツ
チングマスク材11をパターニングする((b)図)。First, Zenon 70Lide (XeFl) is placed on the silicon substrate 12.
), an etching mask material 11, such as a silicon dioxide film or a resist film, is formed (FIG. (a)). Next, the etching mask material 11 is patterned (see (b)).
次にゼノン70ライド(XePt)の分子流13を照射
する。Next, a molecular stream 13 of xenon 70ride (XePt) is irradiated.
ゼノンフロライド(XeF2)分子流は、シリコン基板
上でXeF2 = XeF + Fと衝突解離し、フッ
素(7)がシリコン(8i)と結合し、8iF4となり
排出される。The xenone fluoride (XeF2) molecular stream collides with XeF2 = XeF + F on the silicon substrate and dissociates, and fluorine (7) combines with silicon (8i) to become 8iF4 and is discharged.
ング深さとサイドエツチングの量は、分子流の特性、す
なわち、分子流速度及びキャリアガスとして用いたアル
ゴン(Ar)ガスや窒素(r’tt)ガス等の不活性な
ガスとゼノンフロライド(XeFl)の比率で決まる。The depth of etching and the amount of side etching depend on the characteristics of the molecular flow, i.e., the molecular flow rate and the inert gas such as argon (Ar) gas or nitrogen (r'tt) gas used as a carrier gas and xenon fluoride (XeFl). ) is determined by the ratio of
分子流の形成方法は一般に良く知られており、第2図に
本発明で用いた分子流形成装置の概略図を示す。キャリ
アガスとして不活性ガスであるアルゴンガス21をゼノ
ン70ライド(XeFl ) 23を入れたソースチェ
ンバー22に導入し、さらにチェンバー24へ導入する
。チェンバーは24#宣
25.26と3gI/C分かれておシ、それぞれのチェ
ンバーはオリフィス27,28で区切られている。オリ
フィス27.28で差圧が達成され、分子流を形成する
。チェンバー窒26には試料ホルダー30上に試料29
が置かれている。そして、宣
チェンバー章26は、真空ポンプによシ排気されている
(31)。分子流の速度、ゼノン70ライド(XeFl
)のキャリアガス中での含有量は、アルゴンキャリアガ
ス21の流量、オリフィス27.28の径、および、真
空ポンプの排気速度によシ決定される。The method of forming a molecular stream is generally well known, and FIG. 2 shows a schematic diagram of the molecular stream forming apparatus used in the present invention. Argon gas 21, which is an inert gas, is introduced as a carrier gas into a source chamber 22 containing Zenon 70ride (XeFl) 23, and further into a chamber 24. The chamber is divided into 24#, 25, 26, and 3gI/C, and each chamber is separated by orifices 27 and 28. A pressure difference is achieved at the orifices 27, 28, creating a molecular flow. A sample 29 is placed on the sample holder 30 in the chamber nitrogen 26.
is placed. The air chamber 26 is evacuated by a vacuum pump (31). Velocity of molecular flow, Xenon 70lide (XeFl)
) in the carrier gas is determined by the flow rate of the argon carrier gas 21, the diameter of the orifice 27, 28, and the evacuation speed of the vacuum pump.
(実施例)
第3図(、)〜ωは本発明の一実施例を示した断面図で
ある。(Embodiment) FIGS. 3(a) to ω are cross-sectional views showing an embodiment of the present invention.
現在、相補fiMO8)ランジスタのように深い拡散層
領域をもった素子の高集積化の開発が進んでいる。そし
てこのような深い拡散層領域をもった素子の高集積化に
対しては、微細素子寸法でかつ深さ方向に対しても十分
な素子分離機能をもった素子分離法が要求されてくる。Currently, the development of highly integrated elements having deep diffusion layer regions, such as complementary FIMO transistors, is progressing. In order to increase the integration of devices having such deep diffusion layer regions, an element isolation method is required that has fine element dimensions and a sufficient element isolation function in the depth direction.
第3図はその一例である。Figure 3 is an example.
まず半導体結晶基板としてPfiシリコン単結晶基板3
1−を用いその表面に熱酸化法によシ二酸化珪素膜32
を形成し、さらKその表面にCVD法によシ窒化珪素膜
33および二酸化珪素膜33Aを各々形成した後、その
上に溝部形成領域以外の部分を7オトレジスト膜34で
被った((a)図)。First, a Pfi silicon single crystal substrate 3 is used as a semiconductor crystal substrate.
1-, and a silicon dioxide film 32 is formed on its surface by thermal oxidation.
After forming a silicon nitride film 33 and a silicon dioxide film 33A on the surface thereof by the CVD method, the portions other than the groove formation region were covered with a photoresist film 34 ((a)). figure).
次いで前記フォトレジスト膜34を耐エツチングマスク
として前記二酸化珪素膜33人、前記窒化珪素膜33、
前記二酸化珪素膜32を各々エツチング除去し、さらに
前記フォトレジスト膜34および前記二酸化珪素膜33
Aを耐エツチングマスクとして前記シリコン基板21を
エツチング除去し溝Aを形成した後前記フォトレジスト
膜34を除去した((b)図)。溝入を形成するエツチ
ングはエツチングの際横方内拡がシの小さい反応性スパ
ッタエツチングを用いる。次いで、反応性イオンエツチ
ングによる損傷を除去するため、人rキャリアを使りた
ゼノンフロライドの分子流エツチングを行なう((C)
図)。基板はオリアイスに十分近接させ分子流の平行成
分を使えるようKする。分子流は完全には平行ビームで
はないから溝ムの側壁も少しエツチングされ側壁に損傷
があったとしても除去される。しかもマスク膜33 A
’t 33’?32′があるていどの厚さがあるため、
側壁の工。Next, using the photoresist film 34 as an etching-resistant mask, the silicon dioxide film 33, the silicon nitride film 33,
The silicon dioxide film 32 is etched away, and the photoresist film 34 and the silicon dioxide film 33 are etched away.
Using A as an etching-resistant mask, the silicon substrate 21 was etched away to form a groove A, and then the photoresist film 34 was removed (FIG. 3B). For etching to form the grooves, reactive sputter etching is used which causes small lateral inward expansion during etching. Next, in order to remove the damage caused by reactive ion etching, molecular flow etching of xenone fluoride using a human carrier was performed ((C)
figure). The substrate is placed close enough to the oriice to use the parallel component of the molecular flow. Since the molecular stream is not a perfectly parallel beam, the sidewalls of the grooves are also slightly etched, and any damage to the sidewalls is removed. Moreover, the mask film 33A
't 33'? Since there is a thickness of 32',
Side wall work.
チングはウェットエツチング等の等方性エツチングよシ
かなシ小さくおさえられ寸法の制御性は良い。除去すべ
き工、チング損傷は主に溝入の底面にあるが、深さはせ
いぜい0.1μmである。本実施例では分子流エツチン
グ速度が約0.1μm/分であるので1分間エツチング
すればよく、所要時間もきわめて短い。また分子流の平
行性についてはオリアイスでなくノズルにすれば更に改
善される。The etching can be kept small by isotropic etching such as wet etching, and the controllability of dimensions is good. The machining and ching damage to be removed is mainly on the bottom of the groove, and the depth is at most 0.1 μm. In this embodiment, since the molecular flow etching rate is approximately 0.1 μm/min, etching may be performed for 1 minute, and the time required is extremely short. Furthermore, the parallelism of the molecular flow can be further improved by using a nozzle instead of an oriice.
次いで前記溝入の表面に熱酸化法によシニ駿化珪素膜3
5を形成し、さらに溝入の底部にチャンネルストッパと
して基板と同−導電屋不純物として例えばボロンBをイ
オン注入し、次にウェハー全体にCVD法によシ厚い多
結晶のシリコン36を形成して溝を埋めた((d)図)
。Next, a thin silicon film 3 is formed on the grooved surface by thermal oxidation.
5 is formed, and further, boron B, for example, is ion-implanted as a channel stopper at the bottom of the groove as a conductive impurity, and then thick polycrystalline silicon 36 is formed on the entire wafer by CVD. Filled the gap (Figure (d))
.
次いで前記多結晶シリコン36を前記窒化珪素膜33′
表面付近までエツチング除去し溝部人にのみ多結晶シリ
コン36′を残した((C)図)。Next, the polycrystalline silicon 36 is formed into the silicon nitride film 33'.
The polycrystalline silicon 36' was removed by etching up to the vicinity of the surface, leaving the polycrystalline silicon 36' only in the groove area (Figure (C)).
次いで前記二酸化珪素膜33A′をエツチング除去した
((f)図)。Next, the silicon dioxide film 33A' was removed by etching (Figure (f)).
次いで前記窒化珪素膜33′を耐酸化マスクとして熱酸
化法によシ溝部に形成した前記多結晶シリコン36′を
酸化し、溝入の上部に厚い二酸化珪素膜37を形成した
((ω図)。以上のような方法によれば溝入に欠陥がな
くしかも溝の寸法制御性もよい。Next, using the silicon nitride film 33' as an oxidation-resistant mask, the polycrystalline silicon 36' formed in the trench was oxidized by thermal oxidation to form a thick silicon dioxide film 37 on the top of the trench ((ω diagram)) According to the method described above, there is no defect in grooving, and the dimensional controllability of the groove is also good.
本実施例ではSiのエツチングについて示したが、窒化
シリコンについても同様である。In this embodiment, etching of Si is shown, but the same applies to silicon nitride.
(発明の効果)
本発明を用いることによシ、シリコンあるいは窒化シリ
コンの無欠陥異方性エツチングが達成される。(Effects of the Invention) By using the present invention, defect-free anisotropic etching of silicon or silicon nitride can be achieved.
第1図(、)〜(c)は分子流エツチングのプロセスを
示す断面図。第2図は、分子流を形成する装置の一例を
示す図。第3図(1)〜(−は分子流エツチングを素子
分離の溝形成に適用した一実施例を示す断面図。
第1図
(α)
第3図
(α)
(b)
(C)
5Pi3図FIGS. 1(a) to 1(c) are cross-sectional views showing the process of molecular flow etching. FIG. 2 is a diagram showing an example of an apparatus for forming a molecular flow. Figures 3 (1) to (- are cross-sectional views showing an example in which molecular flow etching is applied to the formation of grooves for device isolation. Figure 1 (α) Figure 3 (α) (b) (C) 5Pi3 diagram
Claims (1)
クパタンを形成し、方向性を有したゼノンフロライド分
子流を前記基板上に照射することにより前記シリコン又
は窒化シリコンを異方性エッチングすることを特徴とす
る分子流エッチング方法。A mask pattern is formed on a substrate having surface silicon or silicon nitride, and the silicon or silicon nitride is anisotropically etched by irradiating the substrate with a directional xenon fluoride molecular flow. Molecular flow etching method.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2245385A JPS61181131A (en) | 1985-02-07 | 1985-02-07 | Etching method by molecular flow |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2245385A JPS61181131A (en) | 1985-02-07 | 1985-02-07 | Etching method by molecular flow |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61181131A true JPS61181131A (en) | 1986-08-13 |
Family
ID=12083129
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2245385A Pending JPS61181131A (en) | 1985-02-07 | 1985-02-07 | Etching method by molecular flow |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61181131A (en) |
Cited By (17)
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JPH0217638A (en) * | 1988-07-05 | 1990-01-22 | Nec Corp | Dry etching method and its device |
JPH02185977A (en) * | 1989-01-12 | 1990-07-20 | Sanyo Electric Co Ltd | Film forming vacuum device |
US6736987B1 (en) * | 2000-07-12 | 2004-05-18 | Techbank Corporation | Silicon etching apparatus using XeF2 |
US6817776B2 (en) | 2002-11-19 | 2004-11-16 | International Business Machines Corporation | Method of bonding optical fibers and optical fiber assembly |
US6849471B2 (en) | 2003-03-28 | 2005-02-01 | Reflectivity, Inc. | Barrier layers for microelectromechanical systems |
US6913942B2 (en) | 2003-03-28 | 2005-07-05 | Reflectvity, Inc | Sacrificial layers for use in fabrications of microelectromechanical devices |
US6942811B2 (en) | 1999-10-26 | 2005-09-13 | Reflectivity, Inc | Method for achieving improved selectivity in an etching process |
US6949202B1 (en) | 1999-10-26 | 2005-09-27 | Reflectivity, Inc | Apparatus and method for flow of process gas in an ultra-clean environment |
US6960305B2 (en) | 1999-10-26 | 2005-11-01 | Reflectivity, Inc | Methods for forming and releasing microelectromechanical structures |
US6965468B2 (en) | 2003-07-03 | 2005-11-15 | Reflectivity, Inc | Micromirror array having reduced gap between adjacent micromirrors of the micromirror array |
US6980347B2 (en) | 2003-07-03 | 2005-12-27 | Reflectivity, Inc | Micromirror having reduced space between hinge and mirror plate of the micromirror |
US7019376B2 (en) | 2000-08-11 | 2006-03-28 | Reflectivity, Inc | Micromirror array device with a small pitch size |
US7027200B2 (en) | 2002-03-22 | 2006-04-11 | Reflectivity, Inc | Etching method used in fabrications of microstructures |
US7041224B2 (en) | 1999-10-26 | 2006-05-09 | Reflectivity, Inc. | Method for vapor phase etching of silicon |
US7189332B2 (en) | 2001-09-17 | 2007-03-13 | Texas Instruments Incorporated | Apparatus and method for detecting an endpoint in a vapor phase etch |
US7645704B2 (en) | 2003-09-17 | 2010-01-12 | Texas Instruments Incorporated | Methods and apparatus of etch process control in fabrications of microstructures |
EP1766665B1 (en) * | 2004-06-17 | 2018-05-23 | Memsstar Limited | Improved method for the etching of microstructures |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5528389A (en) * | 1978-08-21 | 1980-02-28 | Ibm | Surface etching method |
-
1985
- 1985-02-07 JP JP2245385A patent/JPS61181131A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5528389A (en) * | 1978-08-21 | 1980-02-28 | Ibm | Surface etching method |
Cited By (21)
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JPH0217638A (en) * | 1988-07-05 | 1990-01-22 | Nec Corp | Dry etching method and its device |
JPH02185977A (en) * | 1989-01-12 | 1990-07-20 | Sanyo Electric Co Ltd | Film forming vacuum device |
US6942811B2 (en) | 1999-10-26 | 2005-09-13 | Reflectivity, Inc | Method for achieving improved selectivity in an etching process |
US6949202B1 (en) | 1999-10-26 | 2005-09-27 | Reflectivity, Inc | Apparatus and method for flow of process gas in an ultra-clean environment |
US6960305B2 (en) | 1999-10-26 | 2005-11-01 | Reflectivity, Inc | Methods for forming and releasing microelectromechanical structures |
US7041224B2 (en) | 1999-10-26 | 2006-05-09 | Reflectivity, Inc. | Method for vapor phase etching of silicon |
US6736987B1 (en) * | 2000-07-12 | 2004-05-18 | Techbank Corporation | Silicon etching apparatus using XeF2 |
US7019376B2 (en) | 2000-08-11 | 2006-03-28 | Reflectivity, Inc | Micromirror array device with a small pitch size |
US7189332B2 (en) | 2001-09-17 | 2007-03-13 | Texas Instruments Incorporated | Apparatus and method for detecting an endpoint in a vapor phase etch |
US7027200B2 (en) | 2002-03-22 | 2006-04-11 | Reflectivity, Inc | Etching method used in fabrications of microstructures |
US6817776B2 (en) | 2002-11-19 | 2004-11-16 | International Business Machines Corporation | Method of bonding optical fibers and optical fiber assembly |
US6913942B2 (en) | 2003-03-28 | 2005-07-05 | Reflectvity, Inc | Sacrificial layers for use in fabrications of microelectromechanical devices |
US7153443B2 (en) | 2003-03-28 | 2006-12-26 | Texas Instruments Incorporated | Microelectromechanical structure and a method for making the same |
US6849471B2 (en) | 2003-03-28 | 2005-02-01 | Reflectivity, Inc. | Barrier layers for microelectromechanical systems |
US6980347B2 (en) | 2003-07-03 | 2005-12-27 | Reflectivity, Inc | Micromirror having reduced space between hinge and mirror plate of the micromirror |
US6970281B2 (en) | 2003-07-03 | 2005-11-29 | Reflectivity, Inc. | Micromirror array having reduced gap between adjacent micromirrors of the micromirror array |
US6965468B2 (en) | 2003-07-03 | 2005-11-15 | Reflectivity, Inc | Micromirror array having reduced gap between adjacent micromirrors of the micromirror array |
US7002726B2 (en) | 2003-07-24 | 2006-02-21 | Reflectivity, Inc. | Micromirror having reduced space between hinge and mirror plate of the micromirror |
US6972891B2 (en) | 2003-07-24 | 2005-12-06 | Reflectivity, Inc | Micromirror having reduced space between hinge and mirror plate of the micromirror |
US7645704B2 (en) | 2003-09-17 | 2010-01-12 | Texas Instruments Incorporated | Methods and apparatus of etch process control in fabrications of microstructures |
EP1766665B1 (en) * | 2004-06-17 | 2018-05-23 | Memsstar Limited | Improved method for the etching of microstructures |
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