JP3063710B2 - Method for manufacturing semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device including a step of forming an element isolation trench, ie, an isolation-like trench, in a silicon substrate.

[0002]

2. Description of the Related Art In recent years, the miniaturization of semiconductor devices has become more and more advanced. For example, in a 1 Gbit DRAM, the design rule has become 0.18 μm or less, and a technique for performing sub-quarter micron processing with high precision and high reproducibility is required. It is becoming. In a semiconductor device, an element isolation region for electrically isolating elements exists, and it is difficult to form an element isolation region by selective oxidation so far as such an element isolation method in a sub-quarter-micron region.

Therefore, a process flow for forming a trench for element isolation shown in FIGS. 5A to 5D is required. That is, as shown in FIG. 5A, an oxide film 12 and a silicon nitride film 13 are formed on a silicon substrate 10 and patterned, and then etched using the silicon nitride film 13 as a mask to form a 200 A trench 14 having a thickness of about 500 nm (the trench corner A will be described later with reference to FIG. 6) is formed, and the entire surface is oxidized to form an oxide film 15, as shown in FIG. After forming 53, a buried oxide film 16 is further buried on the upper surface by chemical mechanical polishing (CMP) as shown in FIG.
A trench isolation method for forming an isolation region by burying a trench as shown in FIG. 1D is required for element isolation in a sub-quarter-micron region of a semiconductor device.

In the dry etching method for forming the element isolation trench shown in FIG. 5A, FIGS.
As will be described in FIG. 6, the corners of the trench opening (portion P in FIG. 5A) are formed as shown in FIG.
As shown by Q in FIG. 7A, a tapered shape of about 45 degrees is required, instead of being substantially perpendicular (opening vertical) as shown by P in FIG.

The reason for this is that, when a device such as a transistor is formed, the corner P of the trench opening significantly deteriorates electrical characteristics due to electric field concentration and the like shown in FIG. Therefore, after the trench is formed, oxidation (rounding oxidation) is performed to prevent the deterioration of the electric characteristics due to the difference in rounding the corner of the opening.

However, the angle of the corner of the opening after the trench etching greatly affects rounding oxidation, and the rounder oxidation becomes easier as the opening corner becomes more tapered. From this viewpoint, a forward tapered shape of the trench opening is particularly required. That is, the structure is similar to that of the taper shape Q shown in FIG.
By doing so , the above deterioration is improved. Note that 1
6 is an oxide film and 17 is a silicon substrate.

Japanese Unexamined Patent Publication (Kokai) No. 63-111662 discloses a dry etching method for forming a trench in which the corner of the trench is rounded. (A) of FIG.
The process flow will be described with reference to FIG. First,
As shown in FIG. 8A, a silicon substrate 21 having a thickness of 2
Oxide film 22 having a thickness of 100 to 400 nm and a thickness of 100 to 200 n
m silicon nitride films 23 are sequentially formed, and the silicon nitride film 23 and the oxide film 22 are patterned using a resist pattern (not shown) as a mask by a lithography technique and a dry etching process.

Next, after removing the resist pattern, the silicon nitride film 23 serving as a mask in the trench forming step and the silicon substrate to be etched are exposed. Thereafter, the silicon substrate 21 is tapered at a taper angle of 60 by anisotropic wet etching using a solution such as potassium hydroxide (KOH).
A V-shaped trench 24 is formed. In this case, silicon having a plane orientation of {100} is used as the silicon substrate 21.

Next, a CV having a thickness of about 100 to 300 nm is used.
D-SiO ₂ is formed on the entire surface, and etched back by a normal RIE (reactive ion etching) method.
As shown in FIG. 3B, the side surface of the V-shaped trench 24 has SiO
_{The second} side wall 25 is formed. Next, FIG.
As shown in FIG. 2, a trench 26 having a depth of about 1 .mu.m, for example, is formed at the bottom of a V-shaped trench 24 by RIE using a halogen-based gas, using the exposed silicon nitride film 23 and sidewall 25 as a mask. Form.

Finally, as shown in FIG. 8D, the sidewall 25 is removed by wet etching or the like, and a trench 26 having a taper angle of 60 degrees is formed only at the upper portion where the sidewall 25 has been removed. Will be
The rounding of the corner of the trench opening by oxidation is facilitated. Further, as shown in FIGS. 9A and 9B, the KO
F instead of anisotropic wet etching with H solution
A second method of forming a shallow groove 28 by performing isotropic dry etching and wet etching using a (fluorine) -based gas and then performing silicon trench etching to form a trench 29 is similar to the first method described above. The rounding of the corner of the trench opening becomes easy. In the figure, 21 is a silicon substrate, 2
2 is an oxide film, 23 is a silicon nitride film, and 27 is a resist pattern.

[0011]

In the first conventional method, after a resist pattern (mask) is formed by photolithography, (1) dry etching of the silicon nitride film 23 and the oxide film 22; Removal of the resist mask, (3) wet etching of the silicon substrate 21 with a KOH solution, (4) deposition of CVD-SiO ₂ ,
(5) side wall formation by CVD-SiO ₂ etch-back, (6) a silicon trench anisotropic etching,
At least six steps, such as rounding and oxidation of the silicon trench opening, are required. Therefore, the number of steps is large and the process becomes complicated. Further, the second method using the F-based gas is also complicated.

When such a method is applied to the formation of a silicon trench for element isolation, the width of the diffusion layer forming portion immediately below the silicon nitride film mask is smaller than the width of the mask because isotropic dry etching is used. Control becomes difficult. Accordingly, it is an object of the present invention to provide a method for manufacturing a semiconductor device having an element isolation trench which can improve the above-mentioned disadvantages of the prior art and can be manufactured with a reduced number of steps and a simplified process. With the goal.

[0013]

In order to achieve the above-mentioned object, the present invention employs the following basic technical structure. That is, in forming a trench for element isolation on a semiconductor substrate surface, a first step of forming an oxide film and a nitride film on the semiconductor substrate in this order, the oxide film and the nitride film are formed by using photolithography technology. Using the patterned photoresist layer as a mask, the oxide film and the nitride film at a predetermined portion are removed, and the semiconductor substrate surface is dry-etched to have a predetermined depth on the semiconductor substrate surface and an edge portion. A second step of forming a recess having a predetermined inclined surface, a third step of depositing the entire surface of the semiconductor substrate, and a side of the deposition formed on the side wall of the oxide film and the nitride film. It constructed a wall and a fourth step of forming a trench portion by etching on the semiconductor substrate as a mask, the d
Etching with the same etching and deposition processes
This is a method of manufacturing a semiconductor device configured to be continuously performed in a semiconductor device.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A method for manufacturing a semiconductor device according to the present invention employs the above-described technical configuration.
Specifically, when forming a groove for element isolation on a semiconductor substrate surface, a step of dry-etching an oxide film and a nitride film sequentially formed on the semiconductor substrate in the order of the nitride film and the oxide film; Forming a first groove having a predetermined opening angle and depth on the semiconductor substrate by dry etching, forming a deposition film on the entire surface, and then forming a groove forming portion for element isolation by anisotropic etching. Forming the trench by removing the deposition film and the silicon substrate. In another embodiment of the method of manufacturing a semiconductor device according to the present invention, When forming a trench for element isolation, the oxide film and the nitride film sequentially formed on the semiconductor substrate are dry-etched sequentially with the nitride film, the oxide film and the semiconductor substrate exposed. Forming a first groove having a predetermined opening angle and depth, and forming a deposition film on the entire surface, and then anisotropically etching the deposition film and the silicon substrate in a groove forming portion for element isolation. And removing the groove to form the groove.

In the method of manufacturing a semiconductor device according to the present invention, the above-described method is used to perform the same steps from the etching of the silicon nitride film to the etching of the element isolation trench (trench) after the formation of a resist pattern by lithography over the silicon substrate. Since the etching can be performed continuously by the etching apparatus, the number of steps can be reduced and the process can be simplified.

Further, in the present invention, the silicon substrate is etched so that the taper angle is 45 degrees or less and 45 degrees or less, and the depth of the concave portion is about 50 nm. Since a step of depositing a thickness of about 10 to 20 nm using a gas plasma containing a fluorocarbon-based gas is provided, a trench having a taper angle of about 45 degrees can be formed only in the upper portion of the silicon trench.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments of the present invention will be described in detail with reference to the drawings. FIGS. 1 and 2 are a first half process sectional view and a second half process sectional view, respectively, for explaining a first embodiment of a method of manufacturing a semiconductor device according to the present invention. In the figure,
When forming a trench for element isolation on the semiconductor substrate surface, a first step of forming an oxide film 2 and a nitride film 3 on the semiconductor substrate 1 in this order, the oxide film 2 and the nitride film 3 are formed by photolithography. Using the patterned photoresist layer 4 as a mask, the oxide film 2 and the nitride film 3 at predetermined locations are removed, and the surface of the semiconductor substrate 1 is dry-etched to a predetermined depth. A second step of forming a recess 5a having an edge and a predetermined inclined surface at an edge, a third step of depositing the entire surface of the semiconductor substrate, and a step of depositing the oxide film 2 and the nitride film 3. A fourth step of forming a trench portion 7 by etching in the semiconductor substrate using the sidewall 6 formed by deposition formed on the side wall portion as a mask. Procedure of the method of manufacturing are shown.

To describe a specific example of the method of manufacturing a semiconductor device according to the present invention in more detail, first, as shown in FIG. 1A, an oxide film 2 having a thickness of about 20 nm is formed on a silicon substrate 1. A silicon nitride film 3 having a thickness of about 200 nm is sequentially formed, and a resist pattern 4 is formed by lithography. After that, the steps from the etching of the silicon nitride film to the etching of the trench (groove) for element isolation are continuously performed using an inductively coupled plasma etching apparatus, which is one of low-pressure and high-density plasma etching apparatuses.

In the etching, as shown in FIG. 1B, first, in a first etching step, the silicon nitride film 3 and the oxide film 2 are dry-etched using the resist pattern 4 as a mask to form a trench for element isolation. The silicon substrate of the forming part 5 is exposed. A mixed gas of HBr gas and CF4 gas is used as an etching gas in this step. The dry etching conditions were as follows: HBr gas flow rate 25 sccm, CF4 gas flow rate 25 sccm, pressure 5
mTorr, source power 400W, bias power-7
At 5 W, the silicon nitride film 3 and the oxide film 2 are etched vertically. If necessary for improving the etching uniformity, He gas may be used by adding it to the above gas.

Next, in the second etching step, as shown in FIG. 1C, the exposed silicon substrate (trench forming portion) 5 is formed by a taper angle α (a silicon substrate surface and a horizontal surface). Angle) is 45 degrees or less, and the depth H is 50n.
A shallow groove 5a is formed by taper etching as shallow as about m. As a trenching condition for finally obtaining the taper angle α, a mixed gas of CF 4 gas and Ar gas is used, and a CF 4 gas flow rate of 5 sccm and an Ar gas flow rate of 100 are used.
sccm, pressure 20mTorr, so-power 400
W and bias power were 50 W. The taper angle 4
Five degrees is an angle suitable for round oxidation of the trench opening.

Next, as shown in FIG. 2 (A), a plasma containing a fluorocarbon-based gas is
Deposit about m. As a gas to be used, a fluorocarbon-based gas which does not contain hydrogen and has a high deposition property, for example, a mixed gas of a C4F8 gas and a CO gas is used. The conditions at this time are as follows: C4F8 gas flow rate 20 sccm, CO gas flow rate 100 sccm, pressure 20
mTorr, source power 1000 W, and bias power 0 W. Thus, a deposition film 6 is formed on the entire surface including the resist side wall, the silicon nitride film, and the oxide film side wall (also over the shallow groove 5a).

Next, as shown in FIG. 2B, anisotropic etching of the silicon trench is performed. At this time, the deposition film 6 is also formed in the trench forming portion 5 by the previous step as described above. However, by performing anisotropic etching, the deposition film 6 is deposited under the same conditions as the trench etching. The etching of the film 6 is also possible.

The deposition film 6 in the previous step plays the role of a side wall, and the upper part (opening) of the trench is formed.
Holds the taper angle of 45 degrees formed in the second etching step. The etching conditions at this time include, for example, an HBr gas flow rate of 100 sccm, an O2 gas flow rate of 3 sccm, a pressure of 5 mTorr, and a source power of 600.
W, and a bias power of 150 W.

Finally, as shown in FIG. 2C, by removing the resist film 4 as a mask and the sidewall deposition film, only the trench opening has a trench shape having a taper angle of 45 degrees (7a). 7 is obtained. Thereafter, oxidation is performed in the next step to round the trench opening, and this rounding can be easily performed at a low temperature.

As described above, a trench having a taper of about 45 degrees only in the trench opening can be continuously formed in the same device. As is clear from the above description, in the present invention, the above-mentioned second step is an isotropic dry etching step and the fourth step is an isotropic dry etching step.
Is characterized by being an anisotropic dry etching step.

Further, in the method of manufacturing a semiconductor device according to the present invention, after the second step, a processing operation mainly using a gas is continuously performed.
The process can be shortened, the cost can be reduced, and the efficiency of the processing operation can be improved. Further, in the present invention, in the second step, it is possible to design such that the above-mentioned recessed portion 5a is formed in the silicon substrate in a single step.
It is desirable that a mixed gas composed of F4 gas, CHF3 gas and Ar gas be used.

The second step includes a first etching step of etching the oxide film and the nitride film, and a step having a predetermined depth on a surface of the semiconductor substrate and a predetermined inclined surface on an edge. It is also possible to comprise a second etching step to form a recess having
The first etching step includes HBr gas and CF
A mixed gas containing four gases is used, and in the second etching step, a mixed gas containing CF4 gas and Ar gas is used.

On the other hand, in the method of manufacturing a semiconductor device according to the present invention, a mixed gas containing a C4F8 gas and a CO gas is used in the deposition step in the third step. It is preferred that Further, in the method for manufacturing a semiconductor device according to the present invention, in the dry etching step in the fourth step, H
It is desirable that Br gas be used.

In the dry etching step in the fourth step of the present invention, a mixed gas of HBr gas and O2 gas can be used. As described above, the present invention is characterized in that each of the etching step and the deposition step is continuously performed in the same etching apparatus, and in that case, the etching apparatus used in the etching step is used. Is preferably a low-pressure and high-density plasma processing apparatus.

Next, a second specific example of the method for manufacturing a semiconductor device according to the present invention will be described with reference to FIG. First, as shown in FIG. 3A, an oxide film 2, a silicon nitride film 3, and a resist pattern 4 are formed on a silicon substrate 1, as in FIG. 1A of the first specific example. Next, as shown in FIG. 3B, in the first etching step, anisotropic etching of the silicon nitride film 3 and the oxide film 2 and taper etching of the exposed silicon substrate 4 are performed in the same step.

At this time, a mixed gas of CF4 gas, CHF3 gas and Ar gas is used for the gas system. Due to the effect of the deposition of CHF3 gas on silicon, when silicon etching is performed with this mixed gas system, a tapered shape 8 of about 45 degrees is obtained as shown in FIG. 3B. By such etching, the second etching step in the first embodiment can be omitted. The etching conditions at this time include, for example, a CF4 gas flow rate of 10 sccm, a CHF3 gas flow rate of 20 sccm, an Ar gas flow rate of 200 sccm, and a pressure of 5 sc.
0mTorr, source power 400W, bias power
100W. Subsequent steps can be performed in the same manner as in the first embodiment, and a description thereof will be omitted.

Further, as shown in FIGS. 4A and 4B, an etching step for rounding the trench bottom is added as the last etching step of the first and second examples, thereby to reduce the post-process. Rounding oxidation is easier. The conditions of this etching step are, for example, an HBr gas flow rate of 100 sccm and an O ₂ gas flow rate of 10 sccm.
cm, a pressure of 5 mTorr, a source power of 600 W, and a bias power of 150 W.

As described above, by applying the method of the present invention to silicon trench etching for element isolation, a trench having a taper of about 45 degrees only in the upper part of the trench can be formed by the same etching apparatus and by continuous steps. Formation is possible. The etching conditions such as the gas flow rate, the pressure range, the power, etc., which have been described in the present invention, are not limited to these, and can be arbitrarily changed.

[0034]

As is clear from the above description, if the etching method of the present invention is applied, the steps can be simplified by successive steps in the same etching apparatus, the number of steps can be reduced, and the rounding oxidation in the subsequent steps can be reduced. It is possible to obtain a semiconductor device in which the shape of the opening of a trench (trench) to be facilitated is formed.

[Brief description of the drawings]

FIG. 1 is a first-half process cross-sectional view illustrating a configuration of a first specific example of a method for manufacturing a semiconductor device according to the present invention.

FIG. 2 is a sectional view of the latter half of the process for explaining the first specific example of the present invention.

FIG. 3 is a process cross-sectional view explaining a configuration of a second specific example of the method for manufacturing a semiconductor device according to the present invention.

FIG. 4 is a process cross-sectional view for explaining a third specific example of the method for manufacturing a semiconductor device according to the present invention.

FIG. 5 is a process cross-sectional view for explaining the conventional formation of a device isolation trench.

FIG. 6 is an explanatory view of a vertical shape of a trench opening.

FIG. 7 is an explanatory diagram of a tapered shape of a trench opening.

FIG. 8 is a process cross-sectional view for explaining the conventional formation of a device isolation trench.

FIG. 9 is a process cross-sectional view for explaining the conventional formation of a trench for element isolation using isotropic etching.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Silicon substrate, 2 ... Oxide film, 3 ... Silicon nitride film, 4 ... Resist pattern, 5 ... Trench formation part (exposed part of silicon substrate), 5a ... Shallow groove, recessed part 6 ... Deposition film, 7 ... Trench shape, 8… taper shape,

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 21/76 H01L 21/8242

Claims (11)

(57) [Claims] A first step of forming an oxide film and a nitride film on the semiconductor substrate in this order when forming a trench for element isolation on the surface of the semiconductor substrate; Using the patterned photoresist layer as a mask, the oxide film and the nitride film at a predetermined portion are removed, and the semiconductor substrate surface has a predetermined depth by dry etching. A second step of forming a recess having a predetermined inclined surface at an edge, a third step of depositing the entire surface of the semiconductor substrate, and a step of forming a recess on the side wall of the oxide film and the nitride film. It consists positions of the side wall and a fourth step of forming a trench portion by etching on the semiconductor substrate as a mask, the etching
Etching equipment with same etching and deposition processes
A method for manufacturing a semiconductor device, wherein the method is performed continuously in a semiconductor device. 2. The semiconductor device according to claim 1, wherein the second step is an isotropic dry etching step, and the fourth step is an anisotropic dry etching step. Production method. 3. In the second step, CF4 gas, CH4 gas,
3. The method for manufacturing a semiconductor device according to claim 1, wherein a mixed gas comprising F3 gas and Ar gas is used. 4. The semiconductor device according to claim 1, wherein the second step includes a first etching step of etching the oxide film and the nitride film, and a predetermined inclined surface having a predetermined depth on a surface of the semiconductor substrate. 3. The method of manufacturing a semiconductor device according to claim 1, comprising a second etching step of forming a recess having the second etching step. 5. The method according to claim 1, wherein the first etching step is performed using HB
5. The manufacturing method of a semiconductor device according to claim 4, wherein a mixed gas containing r gas and CF4 gas is used, and said mixed gas containing CF4 gas and Ar gas is used in said second etching step. Method. 6. The method according to claim 1, wherein a mixed gas containing C4F8 gas and CO gas is used in the depositing step in the third step. 13. A method for manufacturing a semiconductor device according to 7. The method of manufacturing a semiconductor device according to claim 1, wherein an HBr gas is used in the dry etching step in the fourth step. Method. 8. The semiconductor device according to claim 7, wherein a mixed gas of HBr gas and O 2 gas is used in the dry etching step in the fourth step. Method. 9. An etching method used in the etching step.
The etching device is a low-pressure high-density plasma processing device
9. The semiconductor device according to claim 1, wherein:
Manufacturing method of the device. 10. The semiconductor substrate in the second step.
Table formed on the edge of the recess formed on the surface of the
Par angle is formed at 45 degrees or less
The semiconductor according to claim 1, wherein:
Device manufacturing method. 11. The method according to claim 11, wherein in the second step,
The depth of the recess formed on the surface is about 50 nm.
11. The method according to claim 1, wherein the first member is formed so as to have
A method for manufacturing a semiconductor device according to any one of the preceding claims.