JPS61180442A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS61180442A JPS61180442A JP60020555A JP2055585A JPS61180442A JP S61180442 A JPS61180442 A JP S61180442A JP 60020555 A JP60020555 A JP 60020555A JP 2055585 A JP2055585 A JP 2055585A JP S61180442 A JPS61180442 A JP S61180442A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- sheet
- dicing
- semiconductor chip
- adhesive
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/0058—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material
- B28D5/0082—Accessories specially adapted for use with machines for fine working of gems, jewels, crystals, e.g. of semiconductor material for supporting, holding, feeding, conveying or discharging work
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Mechanical Engineering (AREA)
- Die Bonding (AREA)
- Dicing (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の技術分野〕
本発明は半導体装置の製造方法に関し、特に半導体チッ
プの外囲器への組立工程の改良に係る。DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an improvement in a process for assembling a semiconductor chip into an envelope.
（発明の技術的背景〕
半導体装置には、ＣＯＤ （Ｃｈａｒｏｅ Ｃｏｕｐｌ
ｅｄ［）ｅｖｉｓｅ ）等の固体撮像装置のように半導
体チップ（ベレット）の形成工程、いわゆるウェハプロ
セスだけでなく、外囲器への組立工程においても厳しい
清浄度を要求されるものがある。特に、ビデオカメラな
どに使用される固体撮像装置はチップの表面にゴミや異
物の付着がない状態で外囲器に封入しなければ不良品と
なってしまうことが多い。(Technical Background of the Invention) Semiconductor devices include COD (Charoe Couple
Some solid-state imaging devices such as ed[)evise) require strict cleanliness not only in the process of forming a semiconductor chip (bullet), a so-called wafer process, but also in the process of assembling into an envelope. In particular, solid-state imaging devices used in video cameras and the like are often defective unless they are sealed in an envelope with no dust or foreign matter adhering to the surface of the chip.
ところで、従来、半導体ウェハをダイシングして半導体
チップを形成し、このチップを外囲器に装着するには、
第２図（ａ）〜（Ｃ）に示すような方法が採用されてい
る。By the way, conventionally, in order to form a semiconductor chip by dicing a semiconductor wafer and attach the chip to an envelope,
A method as shown in FIGS. 2(a) to 2(C) is adopted.
すなわち、まずウェハプロセスを終了した半導体ウェハ
１は、通常その裏面１ｂ側で接着性を有するダイシング
シート２上に貼付けられる（第２図（ａ）図示）。次に
、この状態で半導体ウエハ１をダイヤモンドブレード等
により切断し、個々の半導体チップ１−１・・・に分割
する（同図（ｂ）図示）。次いて、セラミックなどの外
囲器３を用意し、その底部に銀ペーストなどの導電性接
着剤（マウント剤）４を塗布した後、半導体チップ１−
１・・・の表面側をバキュームピンセットにより吸着し
てダイシングテープからはがし、マウント剤４上に載置
して外囲器３に装着する（同図（Ｃ）図示）。その後、
図示しないが、半導体チップ１′のパッドと外囲器のリ
ードとがアルミニウムなとのワイヤにより接続される。That is, first, the semiconductor wafer 1 that has undergone the wafer process is usually pasted on the adhesive dicing sheet 2 on its back side 1b (as shown in FIG. 2(a)). Next, in this state, the semiconductor wafer 1 is cut with a diamond blade or the like to divide it into individual semiconductor chips 1-1 (as shown in FIG. 1B). Next, an envelope 3 made of ceramic or the like is prepared, and after applying a conductive adhesive (mounting agent) 4 such as silver paste to the bottom of the envelope 3, the semiconductor chip 1-
The surface side of 1... is adsorbed with vacuum tweezers, peeled off from the dicing tape, placed on the mounting agent 4, and attached to the envelope 3 (as shown in FIG. 3(C)). after that,
Although not shown, the pads of the semiconductor chip 1' and the leads of the envelope are connected by aluminum wires.
なお、第２図（１））では半導体ウェハ１を表面から裏
面まで完全に切断する、いわゆる完全切断方法を示した
が、半導体ウェハ１の厚さに対して１．１５程度の切り
残しを設けて半導体チップ１−１・・・を分離した後、
その切り残し分を割る方法も一般的に行なわれている。Although FIG. 2 (1)) shows a so-called complete cutting method in which the semiconductor wafer 1 is completely cut from the front surface to the back surface, an uncut portion of about 1.15 mm is left in the thickness of the semiconductor wafer 1. After separating the semiconductor chips 1-1...
A method of dividing the uncut portion is also commonly used.
このような方法を用いる場合にはダイシングテープ２が
不要となることもある。When such a method is used, the dicing tape 2 may not be necessary.
〔背景技術の問題点）
上述した従来の方法では、半導体ウェハ１をダイシング
する際に発生する切りくずが半導体チップ１′の表面１
＝ａに付着することがある。また、バキュームピンセッ
トなどにより半導体チップ１′をダイシングテープ２か
らはがして外囲器３に装着する際、バキュームピンセッ
トの吸着面と半導体チップ１′の表面とが直接接触する
ため、半導体チップ１′の表面１′ａにゴミや異物が付
着したり、傷がついたりすることがある。このため、例
えば半導体チップ１′が固体搬像装置の場合、半導体チ
ップ１″の表面１−８の汚れや傷は光学的に光を遮断す
ることになり、致命的な不良原因となることが多い。[Problems with the Background Art] In the conventional method described above, chips generated when dicing the semiconductor wafer 1 are not easily removed from the surface 1 of the semiconductor chip 1'.
= It may adhere to a. Furthermore, when the semiconductor chip 1' is peeled off from the dicing tape 2 and attached to the envelope 3 using vacuum tweezers or the like, the suction surface of the vacuum tweezers and the surface of the semiconductor chip 1' come into direct contact with each other. Dust or foreign matter may adhere to the surface 1'a, or scratches may occur. For this reason, for example, if the semiconductor chip 1' is a solid-state image transfer device, dirt or scratches on the surface 1-8 of the semiconductor chip 1'' will optically block light and may cause fatal defects. many.
本発明は上記問題を解消するためになされたものであり
、半導体ウェハをダイシングする際に発生する切りくず
の付着や、半導体チップを外囲器に装着する際のゴミの
付着や傷の発生を防止し、不良品を減少し得る半導体装
置の製造方法を提供しようとするものである。The present invention has been made to solve the above problems, and it is possible to prevent the adhesion of chips generated when dicing semiconductor wafers, and the adhesion of dust and scratches when mounting semiconductor chips in an envelope. It is an object of the present invention to provide a method of manufacturing a semiconductor device that can prevent such defects and reduce the number of defective products.
本発明の半導体装置の製造方法は、半導体ウェハの表面
に接着性保護シートを貼付し、この保護シートの上から
半導体ウェハをダイシングして半導体チップを形成した
後、半導体チップ上に前記保護シートが貼付された状態
で半導体チップを外囲器に装着し、その後前記保護シー
トを除去するものである。In the method for manufacturing a semiconductor device of the present invention, an adhesive protective sheet is pasted on the surface of a semiconductor wafer, the semiconductor wafer is diced from above the protective sheet to form semiconductor chips, and then the protective sheet is placed on the semiconductor chip. The semiconductor chip is attached to the envelope in the affixed state, and then the protective sheet is removed.
このような方法によれば、半導体ウェハをダイシングす
る際に発生する切りくずは保護シートに付着して半導体
チップに付着することがなく、またバキュームピンセッ
トが接触するのも保護シートであるため半導体チップ表
面でのゴミの付着や傷の発生がない。このため、半導体
チップの表面は常に清浄に保たれ、不良品を大幅に減少
することができる。According to this method, chips generated when dicing a semiconductor wafer adhere to the protective sheet and do not adhere to the semiconductor chip, and the vacuum tweezers also come into contact with the protective sheet, so the semiconductor chip surface No dust or scratches occur. Therefore, the surface of the semiconductor chip is always kept clean, and the number of defective products can be significantly reduced.
以下、本発明方法の実施例を第１図（ａ）〜（ｄ）を参
照して説明する。Examples of the method of the present invention will be described below with reference to FIGS. 1(a) to 1(d).
まず、ウェハプロセスを終了した半導体ウェハ１１の裏
面１１ｂ側を、接着性を有するダイシングシート１２上
に貼付ける。次に、半導体ウェハ１１の表面１１ａ側に
塩化ビニル製シートの片面に接着剤を塗布した接着性保
護シート１３を貼付ける（第１図（ａ＞図示）。つづい
て、ダイヤモンドブレード等により半導体ウェハ１１を
表面の保護シート１３側から切断し、個々の半導体チッ
プ１１′、・・・に分割する（同図Ｎ））図示）。つづ
いて、セラミックなどの外囲器１４を用意し、その底部
に銀ペーストなどのマウント剤１５を塗布しておく。そ
の後、半導体チップ１１−１・・・の表面側の保護シー
ト１３をバキュームピンセットにより吸着してダイシン
グテープ１２からはがし、マウント剤１５上に載置して
外囲器１４に装着する（同図（Ｃ）図示）。次いで、ベ
ーキングを行ない、マウント剤１５を完全に固化させた
後、比較的精密なビンセットを用いて保護シート１３の
一端をつまみ、半導体チップ１１′からはがす。First, the back surface 11b side of the semiconductor wafer 11 that has undergone the wafer process is pasted onto the dicing sheet 12 having adhesive properties. Next, an adhesive protection sheet 13 made of a vinyl chloride sheet coated with an adhesive on one side is attached to the front surface 11a of the semiconductor wafer 11 (see FIG. 1 (a>shown). Next, the semiconductor wafer is 11 is cut from the surface protective sheet 13 side and divided into individual semiconductor chips 11', . . . (N in the figure)). Next, an envelope 14 made of ceramic or the like is prepared, and a mounting agent 15 such as silver paste is applied to the bottom of the envelope 14 . Thereafter, the protective sheet 13 on the front side of the semiconductor chips 11-1... is removed from the dicing tape 12 by adsorption with vacuum tweezers, placed on the mounting agent 15, and attached to the envelope 14 (see FIG. C) As shown). Next, after baking is performed to completely solidify the mounting agent 15, one end of the protective sheet 13 is pinched using a relatively precise bottle set and peeled off from the semiconductor chip 11'.
こうして保護シート１３をはがした後の断面図は第２図
（Ｃ）と同一の断面図となる（同図（ｄ）図示）。The cross-sectional view after the protective sheet 13 is peeled off is the same cross-sectional view as FIG. 2(C) (as shown in FIG. 2(d)).
なお、マウント剤１５の接着性によってはベーキングを
おこなわなくとも、保護シート１３をはがすことができ
る場合もある。Note that depending on the adhesiveness of the mounting agent 15, the protective sheet 13 may be peeled off without baking.
しかして、上記方法によれば、第１図（ｂ）の工程で半
導体ウェハ１１をダイシングして半導体チップ１１に分
割する際、切りくずは保護シート１３に付着して半導体
チップ１１−の表面に付着することはない。また、第１
図（Ｃ）の工程でバキュームピンセットを用いて半導体
チップ１１″をダイシングシート１２からはがし、外囲
器１４に装着する際、バキュームピンセットの吸着面が
接触するのは保護シート１３であり、半導体チップ１１
″の表面には直接接触しないので、半導体チップ１１−
の表面にゴミが付着したり、傷が発生することがない。According to the above method, when the semiconductor wafer 11 is diced and divided into semiconductor chips 11 in the step shown in FIG. There's nothing to do. Also, the first
When the semiconductor chip 11'' is peeled off from the dicing sheet 12 using vacuum tweezers and mounted on the envelope 14 in the process shown in FIG. 11
Since it does not directly contact the surface of the semiconductor chip 11-
There will be no dust or scratches on the surface.
したがって、半導体チップ１１−が固体撮像装置であっ
てもゴミや傷によって光学的に妨害されることがないの
で、製品の不良率を大幅に減少することができる。Therefore, even if the semiconductor chip 11- is a solid-state imaging device, it is not optically obstructed by dust or scratches, so that the defect rate of products can be significantly reduced.
なお、上記実施例では、接着性保護シート１３として塩
化ビニルの片面に接着剤を塗布したものを用いたが、こ
れに限らずダイシング中に半導体ウェハ１１からはがれ
ず、外囲器１４への装着後に半導体チップ１１−からは
がせるものであれば、例えば塗布前には液状で塗布後に
膜状となる性質を有するコーティング材を用いてもよい
。In the above embodiment, the adhesive protective sheet 13 was made of vinyl chloride coated with an adhesive on one side, but the sheet is not limited to this and does not peel off from the semiconductor wafer 11 during dicing and does not adhere to the envelope 14. As long as it can be peeled off from the semiconductor chip 11- after being attached, for example, a coating material may be used that has the property of being liquid before application and forming a film after application.
以上詳述した如く本発明の半導体装置の製造方法によれ
ば、半導体ウェハをダイシングする際に発生する切りく
ずの付着や、半導体チップを外囲器に装着する際のゴミ
の付着や傷の発生を防止し、不良品を大幅に減少できる
ものである。As detailed above, according to the method for manufacturing a semiconductor device of the present invention, the adhesion of chips generated when dicing a semiconductor wafer and the adhesion of dust and the occurrence of scratches when mounting a semiconductor chip in an envelope can be avoided. It is possible to prevent this and greatly reduce the number of defective products.
第１図（ａ）〜（ｄ）は本発明の実施例における半導体
装置の製造方法を示す断面図、第２図（ａ）〜（Ｃ）は
従来の半導体装置の製造方法を示す断面図である。
１１・・・半導体ウェハ、１１−・・・半導体チップ、
１２・・・ダイシングシート、１３・・・保護シート、
１４・・・外囲器、１５・・・マウント剤。
第１図
（ａ）
（ｄ）
第２図
（ａ）FIGS. 1(a) to (d) are cross-sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention, and FIGS. 2(a) to (C) are cross-sectional views showing a conventional method for manufacturing a semiconductor device. be. 11... semiconductor wafer, 11-... semiconductor chip,
12... Dicing sheet, 13... Protective sheet,
14... Envelope, 15... Mounting agent. Figure 1 (a) (d) Figure 2 (a)
Claims (3)
る工程と、この保護シートの上から半導体ウェハをダイ
シングして半導体チップを形成する工程と、半導体チッ
プ上に前記保護シートが貼付された状態で半導体チップ
を外囲器に装着する工程と、その後前記保護シートを除
去する工程とを具備したことを特徴とする半導体装置の
製造方法。(1) A process of attaching an adhesive protection sheet to the surface of a semiconductor wafer, a process of dicing the semiconductor wafer from above the protection sheet to form semiconductor chips, and a state in which the protection sheet is attached to the semiconductor chip. 1. A method for manufacturing a semiconductor device, comprising the steps of: mounting a semiconductor chip in an envelope; and thereafter removing the protective sheet.
体撮像装置であることを特徴とする特許請求の範囲第１
項記載の半導体装置の製造方法。(2) Claim 1, characterized in that the semiconductor device formed within the semiconductor chip is a solid-state imaging device.
A method for manufacturing a semiconductor device according to section 1.
させて接着性保護シートとすることを特徴とする特許請
求の範囲第１項記載の半導体装置の製造方法。(3) The method of manufacturing a semiconductor device according to claim 1, wherein the liquid coating material is applied and then changed into a film to form an adhesive protective sheet.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60020555A JPS61180442A (en) | 1985-02-05 | 1985-02-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60020555A JPS61180442A (en) | 1985-02-05 | 1985-02-05 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61180442A true JPS61180442A (en) | 1986-08-13 |
Family
ID=12030403
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60020555A Pending JPS61180442A (en) | 1985-02-05 | 1985-02-05 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61180442A (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02306669A (en) * | 1989-05-20 | 1990-12-20 | Sanyo Electric Co Ltd | Separation of semiconductor pressure sensor element |
| EP0661737A1 (en) * | 1993-03-29 | 1995-07-05 | Texas Instruments Incorporated | Grid array masking tape process |
| US6281031B1 (en) | 1996-08-14 | 2001-08-28 | Siemens Aktiengesellschaft | Method of severing a semiconductor wafer |
| JP2004096018A (en) * | 2002-09-03 | 2004-03-25 | Seiko Epson Corp | Manufacturing method for circuit substrate, electrooptical apparatus, and electronic appliance |
| JP2004207719A (en) * | 2002-12-23 | 2004-07-22 | Samsung Electronics Co Ltd | Assembling method for semiconductor package, and stripping-off device of masking tape for semiconductor packaging process |
| US7402503B2 (en) | 2004-07-12 | 2008-07-22 | Seiko Epson Corporation | Dicing sheet, manufacturing method thereof, and manufacturing method of semiconductor apparatus |
| WO2014010237A1 (en) * | 2012-07-12 | 2014-01-16 | 株式会社デンソー | Method for producing semiconductor device |
-
1985
- 1985-02-05 JP JP60020555A patent/JPS61180442A/en active Pending
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02306669A (en) * | 1989-05-20 | 1990-12-20 | Sanyo Electric Co Ltd | Separation of semiconductor pressure sensor element |
| EP0661737A1 (en) * | 1993-03-29 | 1995-07-05 | Texas Instruments Incorporated | Grid array masking tape process |
| CN1043594C (en) * | 1993-03-29 | 1999-06-09 | 德克萨斯仪器股份有限公司 | Grid array masking tape process |
| US6281031B1 (en) | 1996-08-14 | 2001-08-28 | Siemens Aktiengesellschaft | Method of severing a semiconductor wafer |
| EP0944920B1 (en) * | 1996-08-14 | 2001-10-31 | Osram Opto Semiconductors GmbH & Co. OHG | Process for dividing a semiconductor wafer |
| JP2004096018A (en) * | 2002-09-03 | 2004-03-25 | Seiko Epson Corp | Manufacturing method for circuit substrate, electrooptical apparatus, and electronic appliance |
| JP2004207719A (en) * | 2002-12-23 | 2004-07-22 | Samsung Electronics Co Ltd | Assembling method for semiconductor package, and stripping-off device of masking tape for semiconductor packaging process |
| US7402503B2 (en) | 2004-07-12 | 2008-07-22 | Seiko Epson Corporation | Dicing sheet, manufacturing method thereof, and manufacturing method of semiconductor apparatus |
| WO2014010237A1 (en) * | 2012-07-12 | 2014-01-16 | 株式会社デンソー | Method for producing semiconductor device |
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