JPS61177863A - Recording and driving circuit - Google Patents

Abstract

PURPOSE:To facilitate the density correction by obtaining a recording density in terms of analog at every recording exothermic resistance element only by one recording processing during an analog comparing period. CONSTITUTION:When a latch pulse is inputted from a terminal LATCH the moment the sample holding action of a picture image signal is completed in an overall recording and driving circuit 1, an output signal is transmitted from buffers 141-144, and the 2nd type of analog switches 151-154 are turned on. Simultaneously, when analog switches 161-164 are turned off, the picture image signal is held, which is applied to analog comparators 171-174. When it is more positive than a comparison reference signal potential, a signal 1 is outputted, and only transistors 181-184 belonging to a train from which the signal 1 is outputted are turned on, whereby the recording body element is driven and recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a print drive circuit for a print head having a plurality of print elements, and particularly to a print drive circuit mounted on the print head.

(Prior Art) Conventionally, as shown in FIG. 2, for example, as shown in FIG. 2, a recording drive circuit 2 for thermal recording has been constructed of a plurality of digital elements.

FIG. 2 shows the main parts of the recording drive circuit 2 mounted on the recording head and the heating resistor elements 251 to 254 of the recording head driven by the recording drive circuit. Generally, the entire recording head is an MSI. It was integrated into levels.

A number of j (j is a finite first positive integer) recording drive circuits 2 are arranged in series and mounted.

The main circuit element of the MSI-type recording drive circuit 2 takes in digital image data and sends the data to each heating resistor element 251 to 254 (HEi: 4 is a finite second positive integer) of the recording head. Distributing digital shift registers 211 to 214 (SRIi), digital memory elements 221 to 224 (FF=), and heating resistor elements 251 to
Switching transistors 241-2 that drive 254
44 (TRi) and memory elements 221 to zz4 (F
Gate elements 231 to 234 (Gi) for determining the recording application period of the output signal of F'l, and buffers 201 to 2
03 (B Fo , B FL, BFi).

Here, in the conventional recording drive circuit 2, the amount of energy applied to each of the heating resistor elements 251 to 254 is made variable to control the recording density on the recording medium. It is assumed that the recording voltage applied between the holder VH and the terminal GH is fixed, and that the resistance values of the n heating resistor elements 251 to 254 are all the same value.

Here, for example, the intermediate heating resistor element 253 (HI3)
11" is input only to the data of the memory element 223 corresponding to the heating resistor element 253 (HEa) during the application period T3.
shall be driven.

In this driving method, digital pixel data corresponding to the number of heating element elements 251 to 254 is inputted n times, and the connection period of the drive signal applied to each element from the terminal ENB is made variable. It is possible to control recording density.

(Problems to be Solved by the Invention) Although recording density control for each heating element by the driving method shown in this example is possible when the value of n is small, as the value of n increases, This makes practical adoption difficult. As described above, the recording drive circuit according to the prior art has a disadvantage in that, due to its configuration, there are significant restrictions on the feasibility of controlling the recording density for each heating element.

The present invention has been developed in view of the drawback that recording density control for each heating resistor element is restricted due to the limitation of the application time width in such a recording drive circuit.

An object of the present invention is to make it possible to control the amount of electric power applied to a thermal recording head by inputting analog value data and an analog value comparison reference signal to a recording drive circuit only once, thereby making it possible to control the amount of electric power applied to a thermal recording head. It is an object of the present invention to provide a recording drive circuit which is configured to be able to input a data value consisting of a black and white binary signal.

(Means for Solving the Problems) A recording drive circuit according to the present invention includes a plurality of shift registers,
a plurality of first type analog switches, a plurality of first type high input impedance type analog buffers with capacitors, and a plurality of second type analog switches;
``It is equipped with a plurality of second type capacitors, a plurality of analog comparators, and a plurality of drive transistors, and is configured to drive a recording head made up of a plurality of heating resistor elements.

The plurality of shift registers are used to provide timing for converting serial analog input signals into parallel analog output signals in series and parallel form using a shift clock.

The plurality of first type analog switches are for switching serial analog input signals using the output of any stage of the plurality of shift registers as a control signal.

The plurality of first type capacitor-equipped high input impedance type analog buffers are for holding and sending out the outputs of the plurality of first type analog switches.

The plurality of second type analog switches are for switching and latching the outputs of the plurality of high input impedance type analog buffers.

The plurality of second type capacitors are for holding the outputs of the plurality of second type analog switches.

The plurality of analog comparators are for comparing the outputs of the plurality of second type analog switches and the reference voltage.

The plurality of drive transistors are for individually driving the plurality of heating resistor elements according to the outputs of the plurality of analog comparators.

(Example) Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a recording drive circuit for thermal recording according to the present invention. In FIG. 1, a circuit 1 surrounded by a dashed line is an embodiment of the recording drive circuit according to the present invention. In FIG. 1, 111 to 114 are digital shift registers, and 121 to 124 are first shift registers, respectively.
131 to 134 are each a capacitor, 141 to 144a are each an analog buffer, 151 to 154 are each a second type of analog switch, 161 to 164 are each a capacitor,
171 to 174 are analog comparators, 181 to 1, respectively.
84 are driving transistors, 191 to 194, respectively.
are heating resistor elements, and 101 to 104 are buffers, respectively.

In FIG. 1, heating resistor elements 191 to 194 (H2=) of the recording head are for recording by a thermal recording method. A recording voltage is applied between terminal VH and terminal GW.

In the recording drive circuit 1, N-stage shift registers 111 to
114 (SRi) receives the shift clock inputted to the terminal OLK EX into the buffer tot (BFo).
N shift registers 111 to xx4 (SR<) are driven simultaneously. As a result, the sampling data pulse (11”) of 2 clocks is input from the terminal 5PIN.
Then, the data is sequentially transferred from the first stage register 111 (SRt) to the nth stage register 114 (SRn).

First type of analog switches 121 to 124 (8W
1. ) receives the output of an intermediate stage register, for example, the register 113, at its control terminal, and transmits the analog image signal input from the terminal PIX or the digital image signal quantized by the D/A converter to the analog switch 121 (5W
II) to the analog switch 124 (S Wln
) is sequentially scanned and sampled. The first type of capacitors 131 to 134 (Orj) are capacitors for holding image signals sampled by each of the analog switches 121 to 124 (SWtt) in the form of charge. These capacitors are in the range of several pF to tens of pF depending on current process technology, and have a droop of several tens of μV in hold mode.
/m s or more. Flat input impedance type analog buffer 141 = 14
4 (B F i ') functions as an impedance conversion function assuming that the gain of the hold signal is 1.

1. When the sampling and holding operations of the residual signal are completed throughout the recording drive circuit 1, the terminal LA
A latch pulse is input from TCH. In addition, output signals are sent from buffers 141 to 144 (BFI), and second type analog switches 151 to 154 (8
W2i) turns on. At the same time, a second type of analog switch 151-154 (5W
2=) by turning off the capacitance 131
The image signal is held in the same way as in ~134 (Oli). The second type of capacitance 161-164 (C
The image signals held in the analog comparators 171 to 174 (OOMP s ”) are applied to one input terminal of the analog comparators 171 to 174 (OOMP s ”).
A comparison reference signal is supplied to the other input terminal of (OOMP i ). The analog comparators 171 to 174 have high impedance input characteristics similar to the buffers 141 to 144 (B F gate), and apply an image signal to the positive input terminal and a comparison reference signal to the four negative input terminals. It is. During the period when the image signal potential is more positive than the comparison reference signal potential, the analog comparators 171 to 174 are @l#
and drive transistors 181 to 184 (TR
In a), only the transistors in the column to which the "1" signal is output are turned on, and the recording element is driven to perform recording. The buffers 101-1041a are arranged to shape waveforms or convert input/output impedance.

Next, an example of the timing of an input signal for recording by the recording drive circuit 1 according to this embodiment will be described.

In FIG. 1, an image signal input from terminal PIX, a shift clock input from terminal OLK, and a terminal 5
With the sampling pulse input from the PIN,
Analog switches 121 to 124 whose data is the first type
The timing of input is determined. These timings are all maintained in a synchronous relationship. The image signal is delayed from the input timing of the shift clock by an amount that takes hold time characteristics into consideration. On the other hand,
The sampling pulse is generally "1" only for a unit shift clock time. Synchronized with the start of the valid image signal,
A sampling pulse occurs before the unit shift clock. The latch pulse input from the terminal LATCH is generated after the sampling pulse is input, but this occurs after N shift clocks are input and before the (N+1)th shift clock is input. Terminal REF
The comparison reference signal inputted from the latch pulse is generated as a sawtooth wave signal after the latch pulse is inputted. Moreover, the comparison reference signal has a swing potential corresponding to the lowest potential and the highest potential of the input image signal, and has a waveform of a ramp potential change shape taking into account the drive period.

Note that it is clear that the recording drive circuit according to the present invention may be configured in a distributed manner for all the heating resistor elements.
In this case, the input signal of the terminal 5PIN receives a signal from the terminal 5POUT of the preceding stage component circuit. Further, if the configuration of each stage is the same, the terminals OLK, PIX, and LATOH may be connected in parallel. The signal at the terminal REF may be received in series for each stage or group of circuits.

It is clear that the F recording drive circuit is configured as described above, but even if an arbitrary number of distributed recording forms are employed, recording can be completed with a single input in image input processing.

(Effects of the Invention) As described above, the present invention controls the amount of power applied to a thermal recording head by including inputting analog value data and an analog value comparison reference signal into the recording drive circuit only once. By doing this, the potential of the input analog image signal and the potential of the comparison reference signal can be arbitrarily set, so that during the analog comparison period, each heating resistor element for recording can be recorded in an analog manner by one recording process. It has the effect of increasing concentration. Therefore, it is possible to easily record halftones, correct the density of each heating resistor element for recording, or correct the thermal history.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a recording drive circuit for thermal recording according to the present invention. FIG. 2 is a block diagram showing an example of a recording drive circuit for thermal recording according to the prior art. 101-104, 141-144, 201-203・
...Buffers 111-114.211-214...Registers 121-124.151-154...Switches 131-134.161-164...Capacitor 17
1-174... Comparators 181-184, 241-244-... Transistor 1
91-194, 251-254--Heating resistor element 2
21 to 224...Memory elements 231 to 234...AND gate patent applicant NEC Corporation representative Patent attorney Inoro Jusai 1 figure 2 figure

Claims (1)

[Claims] a plurality of shift registers for supplying timing for serial/parallel conversion of a serial analog input signal into a parallel analog output signal using a shift clock; and an output of an arbitrary stage of the plurality of shift registers as a control signal for controlling the serial analog input signal. a plurality of first type analog switches for switching; and a plurality of high input impedance analog buffers with first type capacitors for holding and transmitting outputs of the plurality of first type analog switches. , a plurality of second type analog switches for switching and latching the outputs of the plurality of high input impedance type analog buffers, and a plurality of second type analog switches for holding the outputs of the plurality of second type analog switches. two types of capacitors, a plurality of analog comparators for comparing the outputs of the plurality of second type analog switches and a reference voltage, and a plurality of heating resistors according to the outputs of the plurality of analog comparators. 1. A recording drive circuit comprising: a plurality of driving transistors for individually driving body elements, and configured to drive a recording head made up of the plurality of heating resistor elements.