JP3045266B2 - Drive circuit for liquid crystal display - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit for a liquid crystal display device, and more particularly to a thin film transistor matrix array using a polysilicon TFT (hereinafter referred to as "TFT array").
The present invention relates to a driving circuit for an active matrix type liquid crystal display device having the following.

[0002]

2. Description of the Related Art Conventionally, as a driving circuit for driving a horizontal line of a polysilicon type active matrix type liquid crystal display device, for example, a driving circuit as shown in FIG. 8 has been proposed. In the figure, reference numeral 21 denotes a shift register, which sequentially generates a sampling pulse in response to a start pulse 22 and a clock 23 to sequentially turn on an analog switch 24 disposed on a corresponding source line 28 of the liquid crystal display device. An analog video signal 25 supplied from one side is sequentially supplied to a source line 28.
Then, a thin film transistor (hereinafter, referred to as “TFT”) 3 on a horizontal line 29 selected by the scanning driver 26.
The video signal is charged to each pixel 20 of the liquid crystal display element 27 via the “0”.

On the other hand, reference numerals 1, 2, and 3 denote A / A signals for converting R, G, and B signals of an input analog video signal into digital signals.
The R, G, and B signals converted into digital signals by the A / D conversion circuits 1, 2, and 3 are subjected to various kinds of signal processing by a digital video signal processing circuit 4. The digital video signals R, G, B subjected to the signal processing in the digital video signal processing circuit 4 are D / A conversion circuits 5, 6,
After being converted into an analog signal at 7, the signal is amplified and supplied to the analog switch 24 as the analog video signal 25.

FIG. 8 shows an example of the liquid crystal display element 27 which performs a single color display. However, a liquid crystal display device which performs a color display by providing each source line corresponding to the R, G and B signals is shown. It becomes a drive circuit.

As a circuit for driving a source line of an active matrix type liquid crystal display device using an amorphous silicon TFT, for example, a circuit as shown in FIG. 9 has been proposed. This is different from the one shown in FIG.
The video signal is a digital signal, and a shift register circuit (data register) 32 for sequentially storing the digital video signal SVd composed of pixel data of a predetermined bit for each line.
A latch circuit 33 for holding one line of digital video signals sequentially stored in the shift register circuit 32 for one horizontal period, and each pixel forming one line of digital video signals output from the latch circuit 33 The data is sequentially incremented or decremented by the n-bit counter 39 and is compared with the output data value.
A digital comparator circuit 34 for generating 0, and an analog switch circuit 36 for sampling an analog input voltage 41 for conversion by a ramp waveform synchronized with one cycle of the n-ary counter 39 normally supplied from the outside by the coincidence pulse 40. , An analog latch circuit 37 for holding the sampling output from the analog switch circuit 36 for the next one horizontal period, and an output stage 38. In the figure, reference numeral 271 denotes an amorphous silicon TFT 301
And a liquid crystal display element in which liquid crystal pixels 201 are arranged in a matrix.

The voltage applied to the liquid crystal and the light transmittance generally have a relationship as shown by a curve 50 in FIG. If a video signal is directly added linearly in the range of the black level and the white level shown in the figure, the light output is reduced in the vicinity of black and in the vicinity of white, resulting in an image having poor quality and no gradation reproducibility. Therefore, in consideration of the transmittance curve of the liquid crystal, gamma correction is performed on an analog video signal and a digital video signal to be applied to the liquid crystal in advance in accordance with a video signal correction curve 51 shown by a dotted line in the figure.

FIGS. 10 and 11 are diagrams showing the construction of a gamma correction circuit. R, G, and B signals of analog video signals are converted into digital signals by A / D conversion circuits 60, 61, and 62, respectively. , 64, and 65, and the digital R, G, and B signals are stored in the correction ROMs 63, 64, and 65 in advance in the video signal correction curve 5 shown in FIG.
Gamma correction is performed based on the information of the look-up table method corresponding to 1.

FIG. 10 shows the correction ROMs 63, 64, 6
5 outputs the digital R, G, and B signals subjected to the gamma correction. FIG. 11 shows the digital R, G, and B signals.
The signals are converted into analog R, G, B signals by D / A conversion circuits 66, 67, 68 and output. The digital or analog R, G, B signals are supplied to the source lines of the liquid crystal display elements 27, 271.

[0009]

The conventional driving circuit shown in FIG. 8 employs a method of directly sampling an analog video signal. Since the driving circuit for driving the liquid crystal is constituted by a polysilicon TFT, the mobility of the transistor is high and the driving speed is high. Therefore, although a simple circuit configuration as shown in FIG. 8 is possible, it is possible to increase the number of pixels in the horizontal direction (the number of analog switches and the number of TFTs) to obtain a high-resolution display, albeit at high speed. For example, since the video signal period of one horizontal period is limited, the time allocated to one sampling becomes shorter in accordance with the number of pixels. In addition, since it is an analog sample, there is a limit in charging to a high liquid crystal driving voltage.

In order to solve this problem, attempts have been made to multiplex analog video signals or to extend the time axis to increase the number of signals to the liquid crystal driver. However, such processing has a drawback that the processing of an external analog video signal is complicated, thereby increasing the circuit load. If advanced video processing is desired, digitization is suitable, and the analog video signal is subjected to A / D conversion and digital processing as shown in FIG. 8, but the display device is an analog signal. If the input is digital processing, D
Since the A / A conversion is required, there is a disadvantage that the number of circuits is increased accordingly.

On the other hand, in the other conventional driving circuit shown in FIG. 9, since a digital video signal is input, the conversion to an analog signal has a margin in time and does not have the above-mentioned disadvantages. is there. That is, since the conventional example of FIG. 9 uses an amorphous silicon TFT which operates slowly,
The analog signal supplied from the source line 28 must be supplied simultaneously for each source for 1H period. Therefore, the output of the analog switch circuit 36 sampled by the output of the level shifter 35 provided to each output line at random (randomly in time) ) Is once held, and further applied to the source line 28 via the latch circuit 37 to make the signal timings of all the source lines the same, and the holding period is 1H. As described above, after sampling, the analog signal is latched again and supplied to the source line via the buffer. Therefore, in order to use these circuits as driver ICs, there is a disadvantage that the chip area increases by that much, and
There is a problem that the display quality is deteriorated due to the variation of this portion.

In the case of performing gamma correction of a lookup system as shown in FIGS. 10 and 11, since a digital video signal is directly input to a correction ROM, the RO
The conversion time in M is required to be within one sample. Therefore, a video signal having a short number of pixels in the horizontal direction or a short horizontal cycle requires a high-speed ROM, which has a drawback of increasing costs.

[0013]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned problems of the conventional device. In a drive circuit of an active matrix type liquid crystal display device which drives a liquid crystal display device by a matrix array composed of thin film transistors made of polysilicon. , A shift register circuit for sequentially storing one line of digital video signals composed of a series of n-bit pixel data, and a latch circuit for holding one line of digital video signals sequentially stored in the shift register circuit for one horizontal period A digital comparator circuit that compares each pixel data constituting one line of digital video signal output from the latch circuit with a data value output from an n-ary counter and generates a coincidence pulse when coincidence occurs; For conversion to generate analog ramp waveform between white level and black level every horizontal cycle A analog signal generation circuit, an analog switch circuit that samples the analog ramp waveform from the conversion analog signal generation circuit using the coincidence pulse, and generates an analog voltage having a level corresponding to the coincidence pulse generation timing; A sampling output from the switch circuit is supplied to a thin film transistor corresponding to a predetermined pixel in a selected horizontal line of the matrix array, and a predetermined analog video signal is supplied to a predetermined pixel of the liquid crystal display device. .

In the above-mentioned driving circuit for a liquid crystal display device, the conversion analog signal generating circuit for generating the analog ramp waveform for each horizontal cycle includes a voltage / transmittance characteristic of the liquid crystal with respect to the analog ramp waveform. A configuration is provided in which a gamma correction circuit for performing gamma correction of a corresponding video signal is provided.

[0015]

According to the above arrangement, a digital video signal composed of a series of n-bit pixel data supplied from the outside is sequentially stored in the shift register circuit for one line, and one line stored in the shift register circuit. The digital video signal is supplied to the latch circuit, where it is held for one horizontal period. The n-bit pixel data of the digital video signal for one line derived from the latch circuit is compared with data output from an n-ary counter by a digital comparator circuit, and a coincidence pulse is generated at the time of coincidence for each pixel data. Occur.

The coincidence pulse generated for each pixel is sampled by an analog switch circuit from an analog ramp waveform between a white level and a black level generated in each horizontal period from a conversion analog signal generation circuit, and the generation timing of the coincidence pulse And an analog voltage for each pixel derived from the analog switch circuit is supplied to each corresponding pixel on the horizontal line selected by the scanning driver to display an image. . Since the operation of the polysilicon TFT is fast, the analog signal supplied from the source line is sufficient in a short time. Therefore, it is not necessary to hold or latch the output of the analog switch circuit.

Further, when a gamma correction circuit is provided in the conversion analog signal generation circuit for generating an analog ramp waveform for each horizontal cycle, the analog ramp waveform is calculated by the voltage of the liquid crystal.
Gamma correction is performed according to the transmittance characteristics. When the analog ramp waveform subjected to the gamma correction is supplied to the analog switch circuit, the analog voltage supplied to each pixel is subjected to the gamma correction,
The liquid crystal display device can reproduce an image without distortion even near the white level and the black level.

[0018]

FIG. 1 is a block diagram showing an embodiment of the present invention. 11 in FIG. 1 is a timing generating circuit, a horizontal synchronizing signal H _D in synchronization with the digital video signal SVd consisting data of n bits in the timing generation circuit 11
And vertical synchronizing signal V _D is supplied as a reference timing signal. Reference numeral 12 denotes an m-stage n-bit shift register circuit to which the n-bit digital video signal SVd is supplied. Further, the shift register circuit 12 is supplied with a clock CLK from the timing generation circuit 11, and sequentially stores the digital video signal SVd for one line in each horizontal period.

One line of pixel data stored in the shift register circuit 12 in each horizontal period is supplied to an m-stage n-bit data latch circuit 13. This data latch circuit 13 is supplied with a latch pulse P _L generated during the horizontal blanking period from the timing generation circuit 11 and latches one line of pixel data supplied from the shift register circuit 12. It is held for the horizontal period. One line of pixel data output from the data latch circuit 13 is supplied to a digital comparator circuit 14 composed of m stages and n bits.

On the other hand, the timing generation circuit 11 outputs a comparison counter clock CCLK supplied to the n-bit counter circuit 15 and a start pulse Sp which is output every horizontal cycle. In the n-bit counter circuit 15, the output QD ₀ ~QD _n is incremented by one bit in the clock period of the comparison counter clock CCLK every horizontal period. The counter output QD ₀ ~QD _n n-bit counter circuit 15 is supplied to the digital comparator circuit 14 of the m-stage n-bit.

[0021] 1 and the line of pixel data supplied from the data latch circuit 13 in the digital comparator circuit 14, the output QD ₀ of n-bit counter circuits 15 to
And QD _n compared for each bit in each stage, one portion of the pulse of the comparison counter clock CCLK to a consistent point in time is generated. Each pixel data has n bits, and the output of the n-bit counter circuit 15 is also n bits. Therefore, all the pixel data of one line can be compared in one cycle of the n-bit counter circuit 15, that is, in one horizontal cycle. At the time corresponding to the value, a coincidence pulse Cp is output for each stage.

The above-mentioned m-stage n-bit shift register circuit 1
2. As a detailed circuit configuration example of the data latch circuit 13, the digital comparator circuit 14, and the n-bit counter circuit 15, a 4-bit configuration circuit is illustrated in FIG. 2 and FIG. In the figure, portions corresponding to FIG. 1 are denoted by the same reference numerals.
The individual circuit configuration of each of the circuits 12 to 15 is generally widely used, and therefore detailed description of the operation is omitted.

On the other hand, the digital comparator circuit 14
Is raised to a specified pulse voltage by the level shifter 16 and supplied to the gate of the analog switch circuit 17 at the next stage. The input of the analog switch circuit 17 is connected to an analog input signal Ta for conversion. The analog input signal Ta for conversion is a comparison counter clock C from the timing generation circuit 11.
This is a ramp waveform from the conversion analog signal generation circuit 18 synchronized with the CLK and the start pulse Sp, which will be described later in detail.

Since the analog switch circuit 17 of each stage is turned on during the period in which the coincidence pulse Cp is supplied from the level shifter 16, the analog input signal Ta is sampled, and this voltage value becomes a voltage value corresponding to pixel data.
The output of the analog switch circuit 17 of each stage is directly supplied to the corresponding source line 28 of the TFT matrix array for driving the liquid crystal, and the scanning driver 26 controlled by the control signal from the timing generation circuit 11. Then, the liquid crystal of the pixel 20 is charged through the TFT 30 of each stage corresponding to one horizontal line selected and turned on.

As described above, the period in which the analog switch circuit 17 in each stage is ON is the period of the coincidence pulse Cp in each stage. This period is sufficiently long with respect to the pixel clock, so that the video can be stably written. It becomes possible. That is, for example, when the image effective period of one horizontal period and T _H, a period duration of T _H / 1000 is the pixel clock in the conventional configuration shown in FIG. 8 When 1000 the number of pixels in the horizontal direction, analog switches During the sampling period of the circuit 17,
In the configuration of the present invention shown in FIG. 1, when the pixel data is 8 bits, even if the pixel data is 1000 pixels, it becomes T _H / 256, and it is possible to take about four times as long.

FIG. 4 shows that an n-bit counter circuit 15 derives a coincidence pulse Cp from an m-stage n-bit digital comparator circuit 14, and obtains a source line output by a level shifter 16, an analog switch circuit 17, and a conversion analog signal generation circuit 18. It is a figure which shows the signal conversion process with respect to the time axis in the case, and has illustrated the case of the 4-bit signal of the L-th stage.

FIG. 4A shows a counter output waveform of the n-bit counter circuit (n = 4) 15. Assuming that the value of the L-th stage digital video signal input to the m-stage n-bit digital comparator circuit 14 is k, as shown in FIG. 4B, the counter output of FIG.
At this point, the coincidence pulse Cp is derived from the digital comparator circuit 14.

On the other hand, the conversion analog input signal Ta supplied from the conversion analog generation circuit 18 has a waveform that changes from a white level voltage to a black level voltage in a ramp shape as shown in FIG. In the figure, the higher voltage is the black level, but this is for a normally white mode liquid crystal element. In the normally black mode, the expressions of the black level and the white level may be switched.

Accordingly, after the coincidence pulse Cp shown in FIG. 4B derived from the digital comparator circuit 14 is raised to a prescribed pulse voltage by the level shifter 16, the analog input for conversion shown in FIG. The signal Ta is supplied to the analog switch circuit 17 together with the signal Ta, and the analog switch circuit 17 derives an L-th source line output voltage PL indicating an analog voltage value corresponding to the value of k as shown in FIG. . The source line output voltage PL is supplied to the L-th source line 28, and forms the pixel 20 connected to the TFT 30 via the TFT 30 located at the intersection of the horizontal line 29 selected by the scanning driver 26. Applied to the liquid crystal. Although the above description is for the L-th stage, pixel information corresponding to the input video signal is similarly supplied to the source lines 28 of each stage from the first stage to the m-th stage.

The liquid crystal is driven by an alternating current. To perform the alternating current, the polarity of a ramp waveform consisting of a straight line rising from the white level to the black level as shown in FIG. Alternately, a straight line descending to the right from black level to white level. In this case, it is necessary to change the voltage applied to the opposite electrode of the liquid crystal in accordance with the polarity, but since this is a known technique, the description is omitted here.

As described above, the voltage applied to the liquid crystal and the light transmittance characteristic generally have a curve 50 as shown in FIG. Therefore, in the range between the black level voltage and the white level voltage shown in FIG. 5, when a voltage is applied to the video signal linearly, the light output is reduced in the vicinity of black and in the vicinity of white, and there is no poor quality gradation reproducibility. It becomes a video. For this reason, so-called gamma correction for correcting an analog video signal or a digital video signal to be applied to the liquid crystal is performed in advance in consideration of the curve 50 indicating the transmittance characteristic of the liquid crystal.

In the present invention, the above gamma correction is performed as follows. That is, as shown in FIG.
Curve L of the straight line L ₁ showing the analog input signal Ta for the conversion of the derived from converted analog signal generating circuit 18 by the dotted line that varies linearly between the white level voltage and black level voltage to perform gamma correction of the liquid crystal Change to ₂ and derive this.

FIG. 7 is a block diagram of a gamma correction circuit. The gamma correction circuit is provided in the conversion analog signal generation circuit 18 of FIG. In FIG. 7, a comparison counter clock CCLK derived from a timing generation circuit 11 and a start pulse S output every one horizontal cycle are shown.
p is supplied to an n-bit counter circuit 71. The n-bit counter circuit 71 has the same configuration as the n-bit counter circuit 15 shown in FIG. 1, the counter output Q ₀ · ·
Deriving Q _n (n bits) and storing it in the next memory 72
Enter the address. The memory 72 is a data table, and the data content is a value corresponding to the correction curve of the gamma correction in the order of the address.

Therefore, the data output of the memory 72 is corrected by the gamma correction correction curve, and the data output after the gamma correction is applied to the D / A converter 7.
3 are provided as data inputs. As a result, at the step of the comparison counter clock CCLK, the D / A
The output of the converter 73 changes, and the analog input signal T for conversion having a correction curve for gamma correction for one horizontal period
a can be generated. In this case, since the number of steps of the comparison counter clock CCLK may be the number of steps corresponding to the gradation, the circuit itself may be a slower and cheaper memory than the conventional gamma correction memory shown in FIGS. 74
Is a buffer amplifier, and the buffer amplifier 74 can adjust the voltage of the white level and the black level.

Although the above-described embodiment of the present invention performs a monochromatic display, the same structure is used for the R, G,
B is provided for each signal, and R, G, and B primary color dots are 1
By forming pixels, a driving circuit of a liquid crystal display device which performs color display can be obtained.

[0036]

Since the present invention has the above configuration, it is not necessary to perform processing such as holding an analog video signal.
Even when a high-resolution display with an increased number of pixels in a line is to be performed, a TFT with a relatively simple configuration corresponding to the input video signal is used.
The array can be driven accurately. Also, when a digital signal value corresponding to a video signal level is converted into an analog signal and supplied to a TFT array, the analog input signal for conversion is a signal corrected in advance in accordance with the gamma correction of the liquid crystal. Liquid crystal gamma correction can be performed, and a display with excellent gradation reproducibility can be performed.

[Brief description of the drawings]

FIG. 1 is a block diagram of one embodiment of the present invention.

FIG. 2 is a block diagram showing a specific configuration of a main part of the present invention.

FIG. 3 is a block diagram showing a specific configuration of another main part of the present invention.

FIG. 4 is an operation explanatory diagram of the present invention.

FIG. 5 is a diagram showing transmittance characteristics of a liquid crystal with respect to an applied voltage.

FIG. 6 is an explanatory diagram of an operation of gamma correction of a liquid crystal.

FIG. 7 is a block diagram of a liquid crystal gamma correction circuit used in the present invention.

FIG. 8 is a configuration diagram of a conventional example.

FIG. 9 is a configuration diagram of another conventional example.

FIG. 10 is a configuration diagram of a liquid crystal gamma correction circuit in a conventional example.

FIG. 11 is a configuration diagram of another gamma correction circuit of a liquid crystal in a conventional example.

[Explanation of symbols]

 Reference Signs List 12 shift register circuit 13 data latch circuit 14 digital comparator circuit 15 n-bit counter circuit 17 analog switch circuit 18 conversion analog signal generation circuit 20 pixel 30 TFT

Claims (1)

(57) [Claims] 1. A matrix array comprising a thin film transistor made of polysilicon and driving a liquid crystal display device
A shift register circuit for sequentially storing digital video signals composed of a series of n-bit pixel data for one line, and a latch for holding one line of digital video signals sequentially stored in the shift register circuit for one horizontal period A digital comparator circuit for comparing each pixel data constituting one line of digital video signal output from the latch circuit with a data value output from the n-ary counter and generating a coincidence pulse at the time of coincidence; A conversion analog signal generation circuit for generating an analog ramp waveform between a white level and a black level for each horizontal cycle; and the matching pulse by sampling the analog ramp waveform from the conversion analog signal generation circuit with the matching pulse. an analog switch circuit which generates the level of the analog voltage corresponding to the generation timing of the Comprising, a sampling output from the analog switch circuit is supplied to the thin film transistor corresponding to a predetermined pixel in the horizontal line that is selected for the matrix array, supplying a predetermined analog video signal to a predetermined pixel of the liquid crystal display device Liquid crystal
In the display device driving circuit, the conversion analog signal generation circuit includes the analog lamp.
Video signals corresponding to the liquid crystal voltage / transmittance characteristics
A gamma correction circuit for performing gamma correction of a signal is provided .