JPS61176644U - - Google Patents

Info

Publication number
JPS61176644U
JPS61176644U JP5861285U JP5861285U JPS61176644U JP S61176644 U JPS61176644 U JP S61176644U JP 5861285 U JP5861285 U JP 5861285U JP 5861285 U JP5861285 U JP 5861285U JP S61176644 U JPS61176644 U JP S61176644U
Authority
JP
Japan
Prior art keywords
data
section
address
stores
disk
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5861285U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP5861285U priority Critical patent/JPS61176644U/ja
Publication of JPS61176644U publication Critical patent/JPS61176644U/ja
Pending legal-status Critical Current

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  • Signal Processing For Digital Recording And Reproducing (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案のデイスクのデータ制御装置の
ブロツク図、第2図は本考案のデイスクのデータ
制御装置の動作を示すフローチヤート、第3図は
本考案のデイスクのデータ制御装置の動作を説明
ためのトラツクの構成の具体例、第4図は一般的
なデイスクの構成を示す図、第5図はデイスクの
トラツクの構成を示す図である。 1……DMA制御回路、2……バツフア・メモ
リ、3……制御部、10……デイスク制御装置、
D……デイスク。
FIG. 1 is a block diagram of the disk data control device of the present invention, FIG. 2 is a flow chart showing the operation of the disk data control device of the present invention, and FIG. 3 is a block diagram showing the operation of the disk data control device of the present invention. A specific example of a track configuration for explanation, FIG. 4 is a diagram showing a general disk configuration, and FIG. 5 is a diagram showing a disk track configuration. 1...DMA control circuit, 2...Buffer memory, 3...Control unit, 10...Disk control device,
D...disc.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] データ情報を格納するデイスクから1トラツク
分のアンレス部及びデータ部を別個に読み出し起
動をかけるダイレクト・アクセス・メモリ制御回
路と、このダイレクト・アクセス・メモリ制御回
路によつて読み出されたアドレス部及びデータ部
を格納するバツフア・メモリと、このバツフア・
メモリに格納されたアドレス部を欠陥セクタに代
替セクタを置き換えるように並び変え操作を行な
うとともにこのアドレス部に対応するデータ部を
格納する走査を行なう制御部とからなるデイスク
のデータ制御装置。
A direct access memory control circuit that separately reads and activates the unresponsed part and data part of one track from a disk storing data information, and the address part and data part read by this direct access memory control circuit. A buffer memory that stores the data section, and a buffer memory that stores the data section.
A data control device for a disk, comprising a control section that rearranges an address section stored in a memory so as to replace a defective sector with an alternative sector, and performs scanning to store a data section corresponding to this address section.
JP5861285U 1985-04-19 1985-04-19 Pending JPS61176644U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5861285U JPS61176644U (en) 1985-04-19 1985-04-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5861285U JPS61176644U (en) 1985-04-19 1985-04-19

Publications (1)

Publication Number Publication Date
JPS61176644U true JPS61176644U (en) 1986-11-04

Family

ID=30584278

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5861285U Pending JPS61176644U (en) 1985-04-19 1985-04-19

Country Status (1)

Country Link
JP (1) JPS61176644U (en)

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