JPS6356452U - - Google Patents
Info
- Publication number
- JPS6356452U JPS6356452U JP14939986U JP14939986U JPS6356452U JP S6356452 U JPS6356452 U JP S6356452U JP 14939986 U JP14939986 U JP 14939986U JP 14939986 U JP14939986 U JP 14939986U JP S6356452 U JPS6356452 U JP S6356452U
- Authority
- JP
- Japan
- Prior art keywords
- disk
- cache
- cache control
- control device
- control means
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000002950 deficient Effects 0.000 claims 1
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Description
第1図は本考案を実施したデイスク・キヤツシ
ユ制御装置の構成を表わす図、第2図はキヤツシ
ユ制御手段内のキヤツシユ管理テーブルの内容を
表わす図である。
1……中央処理装置CPU、20……デイスク
制御装置、21……キヤツシユ制御手段、22…
…キヤツシユ・メモリ、23……デイスク制御手
段、D……デイスク装置。
FIG. 1 is a diagram showing the configuration of a disk/cash control device embodying the present invention, and FIG. 2 is a diagram showing the contents of a cache management table within the cache control means. DESCRIPTION OF SYMBOLS 1...Central processing unit CPU, 20...Disk control device, 21...Cache control means, 22...
...cache memory, 23...disk control means, D...disk device.
Claims (1)
るキヤツシユ・メモリを有するデイスク・キヤツ
シユ制御装置において、キヤツシユ制御手段に、
デイスク装置内の磁気記録特性欠陥部の代替セク
タ情報を格納するキヤツシユ管理テーブルを設け
たことを特徴とするデイスク・キヤツシユ制御装
置。 In a disk cache control device having a cache memory made of a readable/writable semiconductor memory element, the cache control means includes:
1. A disk/cache control device comprising a cache management table for storing alternative sector information for defective magnetic recording characteristics in a disk device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14939986U JPS6356452U (en) | 1986-09-29 | 1986-09-29 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14939986U JPS6356452U (en) | 1986-09-29 | 1986-09-29 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6356452U true JPS6356452U (en) | 1988-04-15 |
Family
ID=31064569
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14939986U Pending JPS6356452U (en) | 1986-09-29 | 1986-09-29 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6356452U (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63247853A (en) * | 1987-03-30 | 1988-10-14 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Dasd cash management |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6255744A (en) * | 1985-09-03 | 1987-03-11 | Nec Corp | Control system for cache memory |
-
1986
- 1986-09-29 JP JP14939986U patent/JPS6356452U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6255744A (en) * | 1985-09-03 | 1987-03-11 | Nec Corp | Control system for cache memory |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63247853A (en) * | 1987-03-30 | 1988-10-14 | インターナシヨナル・ビジネス・マシーンズ・コーポレーシヨン | Dasd cash management |
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