JPS6117628Y2 - - Google Patents

Description

[Detailed explanation of the idea] The present invention relates to a hysteresis width determining circuit.

Conventionally, when the input voltage of a comparator, etc. is near the threshold voltage, the output changes in response to slight fluctuations in the input voltage or power supply voltage, so a hysteresis loop has been provided to prevent malfunction. There is. However, the high level value and low level value of the hysteresis loop cannot be set independently and they influence each other.

FIG. 1 is a circuit diagram of a conventional hysteresis width determining circuit.

In the figure, 10 is a comparator, the input voltage V _IN is applied to the inverting input terminal (-), and the power supply voltage V _CC is applied to the non-inverting input terminal (+) by resistors _R1 and _R2. The output voltage V _OUT of the comparator 10 is fed back to the non-inverting input terminal (+) via the resistor R ₃ , and the voltage at this terminal becomes the comparison voltage V ₀ . FIG. 2 shows an operating waveform diagram of the comparator circuit shown in FIG. 1. Here, the hysteresis width is ΔV, the high level value of the hysteresis loop is V _TH , and the low level value is V _TL
Then, high level value V _TH and low level value V
_TL is determined by a predetermined relationship in a well-known operational amplifier based on the power supply voltage V _CC and the output voltage V _OUT . That is, the comparator 10 receives the input voltage V
When _IN rises and exceeds the high level value V _TH , the output voltage V _OUT becomes the low level voltage V _OL and the comparison voltage V ₀ becomes V _TL . Next, the input voltage V _IN falls below the low level value V _TL and V _O becomes V _TH . The output voltage V _OUT becomes the high level voltage V _OH . That is, the output voltage V _OUT is inverted with a hysteresis width of (V _TH −V _TL ), that is, ΔV volts.

Here, equivalent circuits for determining the high level value V _TH and low level value V _TL of the hysteresis are shown in FIGS. 3a and 3b.

FIG. 3a is an equivalent circuit for determining the high level value _VTH , and FIG. 3b is an equivalent circuit for determining the low level value _VTL . Now, in FIG. 3a, when the input voltage V _IN increases, the voltage at the non-inverting input terminal (+) at the time when the output of the comparator 10 is inverted is V _TH , and the output voltage V _OUT at the time of inversion is V _O
It is _H. The impedance between the non-inverting input terminal (+) and the input terminal of the comparator 10 is _R3 . Therefore, the circuit for determining the comparison voltage V _O of the non-inverting input terminal (+), that is, the high level value V _TH , is such that the power supply voltage V _CC is applied to one end of the resistor R ₁ and the high level value is applied to one end of the resistor R ₃ . A level voltage V _OH is applied, a connection point between R ₁ and R ₃ and one end of resistor R ₂ are connected, and the other end of resistor R ₂ is grounded. The potential V _O at this connection point is a high level value V _T
Corresponds to _H. The same applies to FIG. 3b, where one end of the resistor _R3 has a low level voltage V _OL
will be applied.

Here, for example, setting the low level value V _TL is done by changing the power supply voltage V _CC and the values of resistors R ₁ , R ₂ and R _{3 .} The high level value V _TH also changes with the determination of V TH . In other words, it is impossible to set V _TH and V _TL independently.

An object of the present invention is to provide a hysteresis width determining circuit that can independently set the high level value and low level value of a hysteresis loop without influencing each other.

The present invention will be explained below with reference to the drawings. FIG. 4 is a circuit diagram of a hysteresis width determining circuit according to an embodiment of the present invention. In FIG. 4, an input voltage V _{IN is applied to the inverting input terminal (-) of the comparator 10, and a power supply voltage V IN} is applied to the non-inverting input terminal (+).
_CC is applied through resistor _R1 . The output voltage V _OUT of comparator 10 is NPN through resistor R ₃
type transistor T _r to its base, which is grounded through a resistor R ₄ . A power supply voltage V _CC is applied to the collector of the transistor T _r ,
The emitter is grounded through resistor _R2 . and is grounded to the non-inverting input terminal (+). The operation of the comparator 10 is similar to the conventional comparator circuit shown in FIG. 1, which has already been described, and when the output voltage V _OUT is a high level voltage V _OH , the base potential is at a high level, so the transistor T _r is turned on. . Since the transistor T _r is an emitter follower, the output impedance of the transistor T _r is extremely low. Therefore, regardless of the presence of resistors _R1 and _R2, the emitter voltage is clamped to the voltage obtained by subtracting the base-emitter voltage from the base voltage of transistor _Tr . i.e. resistor R ₁
and R ₂ are substantially ignored, and the equivalent circuit for determining the emitter potential V ₀ , that is, the high level value V _{TH ,} is shown in FIG. 5a. This equivalent circuit shows that high level voltage V _OH is applied to one end of resistor _R3 , and
The other end of _R3 is grounded via a resistor _R4 , and a high level value _VTH is taken out via a diode D in the forward direction. Here, the diode D equivalently represents the base-emitter voltage of the transistor T _r . As a result, the high level value V _TH when ignoring the voltage drop across diode D
is given by the following equation.

V _TH =V _OH ×R ₄ /R ₃ +R ₄ ...(1) Next, when the output voltage V _OUT is the low level voltage V _OL , V _OUT is usually a residual voltage that is less than the terminal voltage of one diode, This V _OUT is canceled out by the diode characteristics between the base and emitter of the transistor T _r , and as a result, the transistor T _r is turned off. Therefore, the equivalent circuit for determining the low level value _VTL is as shown in FIG. 5b. This equivalent circuit shows that the power supply voltage V _CC is applied to one end of the resistor _R1 , and the resistor
The other end of _R1 is grounded via resistor _R2 , and a low level value _VTL is taken out. This low level value V
_TL is given by the following formula.

V _TL =V _CC ×R ₂ /R ₁ +R ₂ (2) As is clear from the above equations (1) and (2), since they do not have a common resistor, the high level value V _TH and low It becomes possible to set the level value _VTL individually.

As described above, the hysteresis width determining circuit of the present invention can easily set the low level value and high level value of hysteresis individually to arbitrary values.

Note that the transistor T _r explained in the circuit according to the embodiment of the present invention in FIG. 4 can be replaced with a switch element such as another active element such as an FET.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a conventional hysteresis width determining circuit, FIG. 2 is an operating waveform diagram of the circuit in FIG. 1,
3a is an equivalent circuit diagram for determining the high level value of the circuit of FIG. 1, and FIG. 3b is an equivalent circuit diagram for determining the low level value of the circuit of FIG. 1. 4 is a circuit diagram of a hysteresis width determining circuit according to an embodiment of the present invention, FIG. 5a is an equivalent circuit diagram for determining the high level of the circuit of FIG. 4, and FIG. 5b is a circuit diagram of the circuit of FIG. FIG. 3 is an equivalent circuit diagram for determining a low level. 10...Comparator, _R1 , _R2 ...Resistor of input side voltage divider circuit ( _R1 ...first resistor, _R2 ...second resistor), _R3 , _R4 ...output side voltage divider circuit resistor, V
_IN ……Input voltage, V _CC ……Power supply voltage, V _OUT ……
Output voltage, T _r ...transistor (switch element).

Claims (1)

[Claims for Utility Model Registration] A fixed voltage is applied to the non-inverting input terminal via an input voltage divider circuit including a first resistor and a second resistor, and a varying input voltage is applied to the inverting input terminal. a comparator that divides and draws out the output voltage of the comparator; an output voltage divider circuit that divides and draws out the output voltage of the comparator; the voltage drawn by the output voltage divider circuit is applied to a control terminal, and a predetermined constant voltage is applied to a power supply terminal. , a transistor having an output terminal connected to a non-inverting input terminal of the comparator, wherein the input voltage applied to the inverting input terminal of the comparator has a first voltage value preset by the output-side voltage dividing circuit. a transistor that operates off when the input voltage is above and turns on when the input voltage is equal to or lower than a second voltage value preset by the first and second resistors; and an output terminal for taking out the output voltage of the comparator, the logic level of which is inverted when the input voltage rises above the first voltage value and falls below the second voltage value.