JPS61172463A - Modulation-demodulation integrated circuit - Google Patents
Modulation-demodulation integrated circuitInfo
- Publication number
- JPS61172463A JPS61172463A JP1384385A JP1384385A JPS61172463A JP S61172463 A JPS61172463 A JP S61172463A JP 1384385 A JP1384385 A JP 1384385A JP 1384385 A JP1384385 A JP 1384385A JP S61172463 A JPS61172463 A JP S61172463A
- Authority
- JP
- Japan
- Prior art keywords
- modulation
- demodulation
- circuit
- input
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/24—Testing correct operation
- H04L1/242—Testing correct operation by comparing a transmitted test signal with a locally generated replica
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、主にデータ伝送用の変復調集積回路に係り、
その簡易４５！噛動作試験に関する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention mainly relates to a modulation/demodulation integrated circuit for data transmission.
That simple 45! Regarding the chewing motion test.
通常の変復調回路の簡易機能動作試験は、一般的には、
入力データとして信号源にモデムテスタを使用し、疑似
ランダム符号パターンを少゛鴫回路入力に印加し、その
疑似ランダム符号パターンに対応した変調回路出力を、
自分自身の復調回路に入力し、その復調回路出力と、上
記モデムテスタからの疑似ランダム符号とをモデムテス
タ内で比較することにより、誤り率、歪率を測定し、そ
の変復調回路のアナログ・ループ・バック試験を行なっ
ている。A simple functional operation test for a normal modulation/demodulation circuit is generally performed as follows:
Using a modem tester as a signal source as input data, a pseudo-random code pattern is applied to the input of the small circuit, and the output of the modulation circuit corresponding to the pseudo-random code pattern is
By inputting the input into its own demodulation circuit and comparing the demodulation circuit output with the pseudo-random code from the modem tester, the error rate and distortion rate are measured, and the analog loop of the modulation and demodulation circuit is measured. - Performing back test.
従来の変復調集積回路の簡易機能動作試験であるアナロ
グ・ループ・バック試験は、第２図に示すごとく入力デ
ータを変調回路入力端子３に入力し、変調回路１の変調
出力を変調出力端子５から、アナログ・ループ・バック
スイッチ２１．２２を介して、復調入力として復調入力
端子５へ接続し、アナログ・ループ・パック制御端子７
、プルダウン抵抗８、インバータ回路９からなる制御回
路によって制御端子７がｒｌ’ｌＪレベルの時上記スイ
ッチ２１．２２をモードｒｂＪ側に制御する試験方式で
あった。In the analog loop back test, which is a simple functional operation test of a conventional modulation/demodulation integrated circuit, input data is input to the modulation circuit input terminal 3, and the modulation output of the modulation circuit 1 is output from the modulation output terminal 5, as shown in FIG. , via analog loop back switches 21, 22, to the demodulation input terminal 5 as a demodulation input, and to the analog loop pack control terminal 7.
, a pull-down resistor 8, and an inverter circuit 9 were used to control the switches 21 and 22 to the mode rbJ side when the control terminal 7 was at the rl'lJ level.
式であった。It was a ceremony.
しかし、前述の従来技術では、変調出力をアナログ・ル
ープ・バックスイッチ２１．２２を介して復調入力へ接
続しており、上記スイッチは、一般的にアナログスイッ
チが使用される為、スイッチのオフ時においても、アナ
ログスイッチの両電極間の交流的な分ｌ１ｌｌＩ！は通
常約１／１００〜１／１０００程度しか得られず、荷に
全二重通信機能の変復調回路では、変ｇ４回路から復調
回路への影響は、１／１００００以下程度であ以下上が
必要されている為に、りａストークによる復調回路の８
７Ｎ劣化と言う致命的な問題点を有する。However, in the above-mentioned conventional technology, the modulation output is connected to the demodulation input via the analog loop back switch 21, 22, and since the above switch is generally an analog switch, when the switch is turned off, Also, the alternating current component between the two electrodes of the analog switch l1llI! Normally, only about 1/100 to 1/1000 can be obtained, and in a modem circuit with full duplex communication function in the load, the influence from the modulation G4 circuit on the demodulation circuit is about 1/10000 or less, and it is necessary to 8 of the demodulation circuit by Ria Stoke.
It has a fatal problem of 7N deterioration.
一方、上記問題点を回避する為に、変復？ｊＪ！１回路
の周辺に、別途外付部品としてアナログ−ループ０バツ
クの為のライン及び切換え手段（例えば、アナログスイ
ッチ等の半導体スイッチ・ｔｅ、）などを追加する必要
があり、スペースディメリットは当然の事、復ｉｓ回路
の人力インピダンスが、通常数１００キロオ一ム以上と
比較的高い為（＃段′の信号源からの伝送ロスを極力少
くする為に、通常この程度のインピダンスとなる０ ）
外来Ｘ！ｆに対して敏感で、実装基板上のシールド配慮
と、レイアウト那で比較的技術を必要とすると同時に、
部品増加、クロストークによる特性劣化と言う問題も有
する。On the other hand, in order to avoid the above problems, are there changes? jJ! It is necessary to add lines and switching means (e.g., semiconductor switches such as analog switches, TE, etc.) for analog-loop zero backing as separate external parts around one circuit, which naturally incurs a space disadvantage. This is because the human input impedance of the repeater circuit is relatively high, usually over several hundred kilohms (in order to minimize the transmission loss from the signal source of stage #', the impedance is usually around this level).
Outpatient X! It is sensitive to
There are also problems with the increase in parts and the deterioration of characteristics due to crosstalk.
そこで本発明は、このような問題点を解決するもので、
その目的とするところは、変復調集積回路の機能動作試
験において、外付部品増加がなく、特性劣化のない、変
復調集積回路を提供するところにある。Therefore, the present invention aims to solve these problems.
The purpose is to provide a modulation/demodulation integrated circuit that does not require an increase in external components and does not suffer from characteristic deterioration in functional operation tests of the modulation/demodulation integrated circuit.
本発明の変復調集積回路の機能動作試験は、変調回路出
力を復調回路入力に接続する手段と外部入力データを復
調回路入力に接続する手段とｔ選択制御する回路、及び
非選択時には、変調回路出力から復調回路入力へ至るラ
インを低インピーダンスへ接続する回路とを、同一チッ
プ上に形成したことを特徴とする。The functional operation test of the modulation/demodulation integrated circuit of the present invention includes a means for connecting the modulation circuit output to the demodulation circuit input, a means for connecting external input data to the demodulation circuit input, a circuit for controlling selection, and when not selected, the modulation circuit output A circuit that connects a line from to a demodulation circuit input to a low impedance circuit is formed on the same chip.
本発明の上記の構成を第一図に示すが、通常変復調回路
の動作状態においては、アナログ・ループ・バック制御
端子７は、プルダウン抵抗８でｒＬＪレベルが与えられ
、従ってインバータ回路９の出力はｒＨＪレベルとなり
、変調出力部切換えスイッチ１２．１３と復調入力部切
換えスイッチ１０．１１は全てモード（ａ）の状態とな
り、変調回路入力端子３から入力されたデータは変調回
ｊ１８１で変調され、上記切換えスイッチ１２を介して
、変調出力端子４から出力される。一方復調回路入力燗
子５から入力されたデータは切換えスイッチ１１を介し
て復調回路２へ入力され、復調回路入力晦子６から出力
される。尚、切換えスイッチ１０．１１はともにアナロ
グ・ループ・バックのラインを低インピーダンス（ここ
ではアナログ・グランド）に接続し、変調出力から復調
入力へのクロストークを防止している。The above configuration of the present invention is shown in FIG. 1. In the normal operating state of the modulation/demodulation circuit, the analog loop back control terminal 7 is given the rLJ level by the pull-down resistor 8, and therefore the output of the inverter circuit 9 is rHJ level, the modulation output section changeover switch 12.13 and the demodulation input section changeover switch 10.11 are all in mode (a), and the data input from the modulation circuit input terminal 3 is modulated by the modulation circuit j181, and the above The signal is output from the modulation output terminal 4 via the changeover switch 12. On the other hand, data input from the demodulation circuit input socket 5 is input to the demodulation circuit 2 via the changeover switch 11, and is output from the demodulation circuit input socket 6. Note that the changeover switches 10 and 11 both connect the analog loop back line to a low impedance (analog ground in this case) to prevent crosstalk from the modulation output to the demodulation input.
父、アナログ・ループ・バック試験時には、アナログ・
ループ・パック制御端子７は外部からｒＨＪレベルが与
えられ、インバータ回路９の出力はｒＬＪレベルどなり
、上記切換えスイッチ１０〜１３は全て状ｆｌ（ｂ）の
モードとなり、変ｖＩ４回路１で変調され走出力は、切
換えスイッチ１２゜１５、ＩＱ、１１を介して復調回路
２へ入力される。以上の方法により、先にも述べたごと
く、変調出力端子５と復調出力潮干６とのデータをモデ
ムテスタによって簡易的に動作試験を行なうことが可能
である。My father, when testing an analog loop back,
The loop pack control terminal 7 is given the rHJ level from the outside, the output of the inverter circuit 9 is at the rLJ level, the changeover switches 10 to 13 are all in the state fl(b) mode, and the variable vI4 circuit 1 modulates the output. The output is input to the demodulation circuit 2 via changeover switches 12, 15, IQ, and 11. By the above method, as described above, it is possible to easily perform an operation test on the data of the modulation output terminal 5 and the demodulation output terminal 6 using a modem tester.
以上述べたように本発明によれば、従来の変復調回路に
数個の切換え手段を追加するだけでクロストークを防止
できる為、通常変復調動作時に特性劣化を与えないで、
簡易機能動作試験を行なうことが可能となる。As described above, according to the present invention, crosstalk can be prevented by simply adding several switching means to a conventional modulation/demodulation circuit.
It becomes possible to perform a simple functional operation test.
周知のごとく、上記追加回路のＬＳＩ（大規模集積回路
）にｊｊけるチップコスト上昇はほとんど影響せず、又
、ＬＳＩ上で各ｒ’＋ｔスイッチのレイアウトを特に考
イせずに、外部帷音は当然の事、ＬＳＩ内部の信号源（
主に変調出力）からのクロスト−りと呼ばれるＳＩＮ劣
化の少ない、変復調集積回路を提供できると言う効果を
有する。As is well known, the increase in chip cost for the LSI (Large Scale Integrated Circuit) of the additional circuit described above has almost no effect, and the external Of course, the signal source inside the LSI (
This has the advantage that it is possible to provide a modulation/demodulation integrated circuit with less SIN deterioration called crosstalk (mainly from modulated output).
第１図は本発明の変復調集積回路の機能動作試験の一実
施列を示す主要回路図。
第２図は従来の変復調集積回路の機能動作試験の主要回
路図。
１・・・・・・変調回路
２・・・・・・復調回路
３・・・・・−１ｔｚｓ回路入力端子
４・・・−・変調回路出力端子
５・・・・・・復調回路入力端子
６・−・・・復調回路出力端子
７・・・・・・アナログ・ルーズ・パック制御入力端子
８・・・・・・プルダウン抵抗
９・・・・・・インバータ回路
１Ｇ、ｆｌ・・・・・・復調入力部切換えスイッチ１２
．１３−・・・・・変調出力部切換えスイッチ２１・・
・・・・従来の変調出力部切換えスイッチ２２・・・・
・・従来の復調入力部切換えスイッチ。
以上FIG. 1 is a main circuit diagram showing one implementation sequence of a functional operation test of a modulation/demodulation integrated circuit according to the present invention. FIG. 2 is a main circuit diagram of a conventional functional operation test of a modulation/demodulation integrated circuit. 1...Modulation circuit 2...Demodulation circuit 3...-1tzs circuit input terminal 4...Modulation circuit output terminal 5...Demodulation circuit input terminal 6...Demodulation circuit output terminal 7...Analog loose pack control input terminal 8...Pull-down resistor 9...Inverter circuit 1G, fl... ...Demodulation input section selector switch 12
．． 13-...Modulation output section changeover switch 21...
...Conventional modulation output section selector switch 22...
・Conventional demodulation input section selector switch. that's all
Claims (1)
積回路において、該変復調集積回路内に変調出力を復調
入力に接続する接続手段と外部入力データを復調回路入
力に接続する接続手段とを選択制御する回路、及び非選
択時には、変調出力から復調入力へ接続するラインを低
インピダンスとする回路とからなることを特徴とする変
復調集積回路。In a modulation/demodulation integrated circuit having a function of modulating and demodulating input data, a circuit for selectively controlling connection means for connecting a modulation output to a demodulation input and connection means for connecting external input data to a demodulation circuit input in the modulation/demodulation integrated circuit. , and a circuit that makes a line connecting the modulation output to the demodulation input low impedance when not selected.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1384385A JPS61172463A (en) | 1985-01-28 | 1985-01-28 | Modulation-demodulation integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1384385A JPS61172463A (en) | 1985-01-28 | 1985-01-28 | Modulation-demodulation integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61172463A true JPS61172463A (en) | 1986-08-04 |
Family
ID=11844555
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1384385A Pending JPS61172463A (en) | 1985-01-28 | 1985-01-28 | Modulation-demodulation integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61172463A (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5960708A (en) * | 1982-09-29 | 1984-04-06 | Matsushita Electric Ind Co Ltd | Magnetic recording and reproducing device |
-
1985
- 1985-01-28 JP JP1384385A patent/JPS61172463A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5960708A (en) * | 1982-09-29 | 1984-04-06 | Matsushita Electric Ind Co Ltd | Magnetic recording and reproducing device |
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