JPS6116697Y2 - - Google Patents

Description

[Detailed Description of the Invention] This utility model has been devised to enable electrical output of a semiconductor element to be performed even on the upper surface of the semiconductor element.

Taking a conventional integrated circuit (dual in-line package) as an example, its structure is such that an input/output terminal 1 is sandwiched between an upper package 2 and a lower package 3, as shown in FIG. Therefore, when measuring signals for this, input/output terminal 1
Measurement was carried out by pressing the push-type measuring terminal 4 against the hanging surface 1a of the holder, or by hanging the hanging-type measuring terminal 5. Therefore, with the push-type measuring terminal 4, the contact with the input/output terminal 1 is unstable and may slip and come off, and with the hanging-type measuring terminal 5,
When connecting, there were many inconvenient cases, such as short-circuiting with the adjacent input/output terminal 1, resulting in destruction of the device. In particular, boards with integrated circuits mounted on them are
In general, it is most often installed vertically to electronic equipment, and its location is extremely close to the floor or high near the ceiling, so the input/output of integrated circuits during actual operation is In reality, the measurability of terminal signals is extremely poor and inefficient.

As described above, conventional semiconductor devices are extremely inconvenient because electrical input/output cannot be performed through any terminal other than the input/output terminals.

The present invention was devised to eliminate this drawback, and to explain it with reference to Fig. 2, a notch is provided in the portion of the upper package 2 directly above the input/output terminal horizontal surface 1b for measurement purposes. A groove 6 is formed.

This makes it possible to measure by pressing the push-type measurement terminal 4 against the horizontal surface 1b of the input/output terminal from above the integrated circuit within the measurement groove 6. Note that when producing an integrated circuit having the package of the present invention, measurement grooves are formed in the mold of the upper package 2 at positions corresponding to each input/output terminal 1 in a number corresponding to the total number of input/output terminals 1. 6, an upper package 2 with a measurement groove 6 is manufactured, and an input/output terminal 1 is sandwiched together with the lower package 3 to form an integrated circuit.

FIG. 3 shows a case where the measurement groove 6 in FIG. 2 is formed with a curved surface. Of course, Figures 4 and 5
As shown in the figure, deformations such as cylindrical holes and triangular prisms are also possible.

In the embodiment of FIG. 4, a hole is provided above the conductor in the package and has a depth that extends to the conductor in the package, as shown.

Another embodiment shown in FIG. 6 differs from the embodiment shown in FIG. 2 in that the measurement groove 6 is provided at a portion slightly shifted from the position of the input/output terminal 1, and a cutout portion that also extends to the lower package 3 is provided. , the hanging type measurement terminal 5 can be hung on the input/output terminal horizontal surface 1b within the measuring groove 6 for measurement.

FIG. 7 shows an embodiment of the transistor of the present invention.

Since the present invention has the above-described structure, it is very convenient because electrical input and output of the semiconductor element can be performed on the upper surface of the semiconductor element.

The present invention has the above-mentioned contents, and by simply changing the structure of the insulating package, it is possible to easily handle signals of semiconductor devices at a low cost without impairing conventional functions. be able to.

[Brief explanation of the drawing]

FIG. 1 is a perspective view of a conventional integrated circuit and measurement terminal 1. FIG. 2 is a perspective view of an embodiment of the present invention.
FIG. 3 is a perspective view of another embodiment of the present invention.
FIG. 4 is a perspective view of another embodiment of the present invention.
FIG. 5 is a perspective view of another embodiment of the present invention.
FIG. 6 is a perspective view of another embodiment of the present invention.
FIG. 7 is a perspective view of an embodiment of the transistor of the present invention. 1...Input/output terminal, 1a...Input/output terminal hanging surface, 1b...Input/output terminal horizontal surface, 2...Upper package, 3...Lower package, 4...Push type measurement terminal, 5...Hatsu Hanging type measurement terminal, 6...
Measuring groove.

Claims (1)

[Scope of utility model registration request] In a semiconductor device having a plurality of input/output terminals for performing electrical input/output and a package, a hole is provided on the top surface of the package to reach the conductor in the package at a position above the conductor in the package, and the semiconductor device is 1. A semiconductor device comprising a package in which electrical input/output is possible not only at the input/output terminals but also at the upper surface of the package.