JPS61166169A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make the pattern fine and to reduce the junction capacity, by a method in which, using a laminated film pattern formed at an emitter region of a first semiconductor film, the first semiconductor film is removed, a first insulating film on the side of the first semiconductor film and a second semicon ductor film over the entire face are formed, the second semiconductor film on the pattern region is removed to a desired depth using a thin film formed thereon and then using the pattern and thin film as a mask, the pattern and thin film are removed, and then a second insulating film is formed using the oxidation preventing film as a mask. CONSTITUTION:After a first semiconductor film 25 is formed on a P-type semi conductor substrate 20, a desired laminated film pattern consisting of an oxida tion preventing film 26 and deposited film 27 is formed at a region acting as an emitter. After the non-doped polysilicon film 25 is etched using the laminated film pattern as a mask, selective oxidation is don using the oxidation preventing film 26 as a mask to form an SiO2 film 28 being a first insulating film. There after, the SiO2 film 28 is etched using the SiO2 film 27 as a mask, to leave the SiO2 film 28 only on the side of the non-doped polysilicon film 25.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for manufacturing a semiconductor device having characteristics of high speed and V power consumption.

Conventional technology: In order to achieve high speed and low power consumption in bipolar type transistors, it is necessary to miniaturize the nozzles and reduce the junction capacitance.

Therefore, studies have been made to miniaturize the pattern and reduce the junction capacitance by forming the base lead electrode with a polycrystalline silicon film (PolySi film). For example, IEEE J○URNALOF 5OL
ID-8TATE CIRCUTIS VOI.

5C-16,NO5,0CTOBER19sif is produced by the manufacturing method shown in Fig. 3.
A lyS i film 6a is being formed.

Problems to be Solved by the Invention However, the manufacturing method shown in FIG. 3 has the following problems.

(1) PolyS i film 6 serving as an emitter electrode
It is difficult to form b precisely and finely. In other words, as shown in FIG. 3(G), the PolyS i film 6 that becomes the emitter electrode is made of a boron-doped PolyS i film 6d into which boron ions are implanted using the 5102 film 8 as a mask, and a non-doped PolyS i film 6. A non-doped Po1ySi film 6 having a high etching rate is etched using the difference in etching rate. However, when the boron-doped PolySi film 6a is formed, the boron-doped PolyS i film 6a is also formed under the Sin and film 8 regions.
This becomes a Si film 6a. That's no good, no 1nd-
However, the Po1ySi film 6 can be etched.
It is necessary to side-etch the 813N4 film 7. "is,
Non-doped Polysi film 6 and boron-doped Pa
In order to completely separate the 1ySi film 6a, it is necessary to perform etching by the thickness of the non-doped Po1ySi film 6a. Therefore, at least a little non-doped Po1
There is a side etch corresponding to the thickness of the ySi film 6. Therefore, boron-doped Pol yS i
Intrusion of membrane 6a under 5102 membrane 8 area, 513N
4 Zydoenothi amount of film 7, non-doped PolyS
Variation in film thickness of i film 6, non-doped Poly
Due to the influence of variations in the etching time of the Si film 6:
The amount of side etching of the non-doped Po1ySi film 6 is different. Therefore, the non-doped P that becomes the emitter electrode
The pattern dimensions of the olySi film 6 vary from 1 to 5', and it is difficult to form a fine pattern with good accuracy.

(2) Base extraction electrode Totoru boron doped Po1
It is difficult to reduce the resistance of the ySi film 6a. As shown in FIG. 3(E), the boron-doped PolyS i film 6a is formed by forming a vertical 5102 film 1 by forming a Si○2 film 1017).
Approximately half of the film thickness of 0 is eaten away and becomes thinner, resulting in a higher resistance. Therefore, boron-doped Po
If the film thickness is increased in order to lower the resistance of the l yS i film 6a, as described above, the amount of side etching of the lower doped Po1ySi film 6 in the lower region of the Si○2 film 8 will increase, and it will become an emitter electrode. Non-doped PolyS
The accuracy of the pattern dimensions of the i-film 6 is reduced. At the same time, the distance between the non-doped PolySi film 6 and the boron-doped PolySi film 6a becomes wider, and the P+ diffusion layer 1
There are problems such as an increase in the resistance of 1 and an increase in the junction capacitance. Boron-doped Po 1 ySi film 6 due to oxidation
If the thickness of the St○2 film 1o is made thinner in order to reduce the erosion of a, the insulation properties of the Sio2 film 10 will become a problem.

6'-/ (3) Stress is likely to occur when forming the SiO2 film 1o. In other words, as shown in Figure 3 (to), non-doped Po
After separating the 1ySi film 6 and the boron-doped Po1ySi film 6a by etching,
When the O2 film 1o is formed, non-doped Poly
Since a recess is formed between the Si film 6 and the boron-doped PolySi film 6a, stress due to oxidation is applied to the recess. In this case, the narrower the interval, the greater the stress. Therefore, if the spacing is narrow, defects are likely to occur due to stress, which causes a decrease in yield.

In view of these conventional problems, it is an object of the present invention to provide a method for manufacturing a semiconductor device that solves these problems and has characteristics of high speed and low power consumption.

Means to Solve the Problems In order to solve the construction problems, the present invention forms a laminated film pattern consisting of an oxidation preventive film and a deposited film on the emitter region of the first semiconductor film that will serve as the emitter and base electrodes. a step of removing the first semiconductor film using the laminated film pattern as an etching mask; a step of forming a first insulating film on the side surface of the first semiconductor film; and a step of forming a second insulating film on the entire surface. a step of forming a semiconductor film, a step of forming a thin film on the second semiconductor film -J2 other than the laminated film pattern region, and a step of forming a thin film on the second semiconductor film -J2 on the laminated film pattern using the thin film as an etching mask. After removing the semiconductor film, etching the second semiconductor film to a desired depth using the laminated film pattern and the thin film as an etching mask, and removing the deposited film and the thin film. After that, the first semiconductor film, which will become an emitter electrode, and the second semiconductor film, which will become a base lead-out electrode, are insulated and separated by a step of forming a second insulating film using the anti-oxidation film as a selective oxidation mask. be.

Effects of the present invention Due to the above-described structure, (1) the first semiconductor film pattern that becomes the emitter electrode is etched using the laminated film pattern as a mask, so that it becomes a pattern that is faithful to the laminated film pattern, and the first semiconductor film pattern is etched using the laminated film pattern as a mask. Fine patterns that are independent of thickness can be formed.

(2) The pattern spacing between the first semiconductor film pattern serving as the emitter electrode and the second semiconductor film pattern serving as the base lead-out electrode is determined by the thickness of the first insulating film, and can be formed with fine spacing.

(3) Since the first insulating film and the second insulating film are formed separately, each film can be formed with a desired thickness and the insulation properties can be increased.

(4) Regardless of the first semiconductor film serving as the emitter electrode,
Since the second semiconductor film serving as the base lead-out electrode can be formed thickly, the resistance of the base lead-out electrode can be formed low.

(5) After removing the first semiconductor film other than the emitter region, the first insulating film is formed by oxidizing without the four-part shape, resulting in a high-yield semiconductor that does not generate stress or defects. The device can be manufactured.

Example 9 beno Hereinafter, the present invention will be explained in detail using Examples.

FIG. 1 is a diagram for explaining a method of manufacturing an NPN type bipolar transistor according to a first embodiment of the present invention.

In FIG. 1, N+ diffusion layer 21. P+ diffusion layer 22, N
A first semiconductor film, such as a non-doped Po1ySi film 25, is formed on a P-type semiconductor substrate (Si 2 substrate) 20 on which an epitaxial layer 23 and an S 102 film 24 have been formed. after that,
An anti-oxidation film (for example, 513N
4 film) 26 and a deposited film (e.g. 5IO film by CVD method)
2 films) Form a desired laminated film pattern consisting of 27 (
Figure 1 (~).

Next, using the laminated film pattern as a mask, undoped Po
After etching the 1ySi film 26, selective oxidation is performed using the oxidation prevention film 26 as a mask, and the first insulating film S10
Two films 28 are formed. Thereafter, using the 5LO2 film 27 as a mask, the JNiS102 film 28 is etched by anisotropic dry etching to form a non-doped film.

A SiO2 film 28 is entirely formed on the side surface of the polySi film 26 (FIG. 1(B)).

10"-Next, a second semiconductor film (for example, non-doped P
After forming the alySi film), boron ions are implanted to form a graft base diffusion layer to form a boron-doped PolySi film 29 (second semiconductor film). At this time, boron-doped Po1y was prepared using the CVD method.
The Si film may be directly formed. Thereafter, a thin film serving as an etching mask (
For example, the resist remains by etchback method)
30 (Fig. 1 (Q)).

Next, using the resist 30 as an etching mask, 5102
Boron-doped PolySi film 29
remove. After that, the 5lo2 film 27 and the resist 30
Using this as an etching mask, the boron-doped Po1ySi film 29, which is the second semiconductor film, is etched to a desired depth by anisotropic dry etching (see Figure 1).

Next, after removing the 5lo2 film 27 and the resist 3o,
Boron-doped Po1ySi that becomes the base extraction electrode
A pattern of the film 29 is formed. Then S 1 s N
Selective oxidation is performed using the 4-layer film 26 as a mask to form a Pl- diffusion layer 32 which becomes a diffusion layer (FIG. 1 (Enoki)).

Next, boron ions are implanted to form an active base diffusion layer to form a boron-doped 1-PolySj film 25a and a P- diffusion layer 33 that will become an active base diffusion layer (
Figure 1 (F)).

Next, after removing the 513N4 film 26, Ti1t element ions were implanted to form an emitter diffusion layer.
4 film 34 is formed, and arsenic-doped Po1y is formed by heat treatment.
Si film 25b and N″-diffusion layer 3 serving as an emitter diffusion layer
5 (Figure 1 0).

Next, after forming the base contact, if the Al wiring 36 is formed, as shown in FIG. Layer 36, P-diffusion layer 33 serving as an active base diffusion layer, and graft base diffusion layer P″
a diffusion layer 32, a boron drbute Po1ySi film 29 which becomes a base extraction electrode, an N11 layer 23 which becomes a collector,
It is possible to obtain an NPN type bipolar transistor having an N''-diffusion layer 21 serving as a collector buried diffusion layer and an SIO2 film 28.31 serving as an insulating film.

As described above, according to the first embodiment, the d emitter electrode is
The arsenic-doped Po1ySi film 25b is determined by the 513N4 film 26 and the 5102 film 2, which are the kit layer film patterns, as shown in FIG. It is possible to form fine patterns that are highly dependent on the thickness.

′? In addition, arsenic-doped Pol serves as an emitter electrode.
The distance between the ysi film 25b and the boron-doped Po1ySi film 29, which becomes the base extraction electrode, is determined by the Si02 film 28, which is the first insulating film, as shown in FIG.
It can be formed at minute intervals.

1, S102 film 28 and S102 film 3, which are insulating films.
The jIQ thickness of 1 can be formed to a desired film thickness, and high insulation properties can be formed.Furthermore, since the boron-doped Po1ySi film 29 can be formed thickly, a thick 5102 film 31 can be formed. Even if the base lead-out electrode has a low resistance η-.

Furthermore, as shown in FIG. 1(B), after removing the non-doped PoSi film 25 from the emitter region 1,
From the first step of forming the 102 film 28, no stress is generated and the film 28 can be formed without any defects.

Next, using FIG. 2, the NP in the second embodiment of the present invention will be explained.
A method of manufacturing an N-type bipolar transistor will be explained.

In FIG. 2, N+ diffusion layer 21. N epi layer 23°S 1
P-type semiconductor substrate (Si substrate) on which the 02 film 24 is formed
20 J: For example, the first semiconductor film is non-doped Po.
lyS i film is formed.

Next, boron ions are implanted to form an active base diffusion layer to form a heboron-doped PolySi film 25a and a P- diffusion layer 33 which will become an active base diffusion layer (FIG. 2(6)). Note that in this example, non-doped Po
The boron-doped PolySj film 25a was formed by implanting boron ions into the 1ySi film.
The Si film 25a may be formed directly.

Next, arsenic ions are implanted to form an emitter diffusion layer, and an arsenic-doped PolySi film 25b and an N'' diffusion layer 35, which will become an emitter diffusion layer, are formed.
An anti-oxidation film (for example, Si
3N4 film) 26 and a deposited film (e.g. 5 by CVD method)
102 films) A desired laminated film pattern consisting of 27 is formed (FIG. 2 (bowl)).

Next, using the laminated film pattern as a mask, arsenic-doped Po
After etching the lys i film 25b and the N″-diffusion layer 35, selective oxidation is performed using the anti-oxidation film 26 as a mask.
An S102 film 28, which is a first insulating film, is formed. Thereafter, the S102 film 28 is etched by anisotropic dry etching using the S102 film 27 as a mask, and the arsenic-doped Po1. Side surface VcS of ySi film 25b ] 0
2 film 28 remains (FIG. 2 (Q)).

Next, a second semiconductor film (for example, non-doped) is applied to the entire surface.
After forming the 'PolySi film), the graft base 15
Boron ions for the formation of diffusion layer? IE person'l-r
A boron-doped Po1ySi film 29 (second semiconductor film) is formed. At this time, a boron-doped Po1ySi film 29 (second semiconductor film) may be directly formed using the CVD method. After that,
A thin film (for example, a resist is left behind by etching back the boron-doped Po1ySi film 29-1- in the area other than the area where the laminated film pattern consisting of the 513N4 film 26 and the S]02 film 27 which will become the emitter region is formed) will become an etching mask. Stir) to form 30 pieces (Figure 2).

Next, using the resist 30 as an etching mask, 8102
The Boro 7 doped PolySi film 29 of the film 270 is removed. After that, the S102 film 27 and the resist 30
Using as an etching mask, the boron-doped Po1ySi film 29, which is the second semiconductor film, is etched to a desired depth 1 by anisotropic tri-etching (Fig. 2 (uniform)).
.

Next, the S i 02 film 27 and the resist 30 are removed.
After this, boron-doped Po, which will become the base extraction electrode, is
A pattern of the l yS j film 29 is formed. After that, 5
Selective oxidation is performed using the 13N4 film 26 as a mask, and the second
The 5102 film 31, which is an insulating film, is doped with boron 1-'
A PolySi film 29 is formed on soil. At the same time, a P'-diffusion layer 32 is formed by diffusion from the boron-doped 'PolySi film 29 to the graft base diffusion layer (FIG. 2 (Fl)).

Next, the 513N4 film 26 is removed and the base contact window 37 is formed (FIG. 2 (C1)).

Next, the AI wiring 36 is formed, as shown in FIG.
The N+ diffusion layer 35 becomes the emitter diffusion layer, the P− diffusion layer 33 becomes the active base diffusion layer, the P″ diffusion layer 32 becomes the graft base diffusion layer, the boron-doped PolySi film 29 becomes the base extraction electrode, and the collector becomes the collector. N epi layer 23, N"1-diffusion layer 21 which becomes the collector buried diffusion layer
, NPN with insulating film and S102 film 28.31
A type bipolar transistor can be called 1 (J).

Furthermore, in the second embodiment, the same effects as in the first embodiment can be obtained.

177＼ 7. In addition, in the first and second implementation 1+ mouths above, NP
Although the explanation was made using an N-type bipolar transistor, PN
P-type bipolar transistors can also be formed in a similar manner.

Although the first and second semiconductor films are Po1ySi films, the same effect can be obtained by using a semiconductor film such as amorphous 81.

The deposited film was also explained using the S102 film made by the CVD method, but it is also possible to use a deposited film that has etching selectivity with respect to the second semiconductor film and the anti-oxidation film, such as the Sr,02 film, which is made by the vapor deposition method. It's fine if it's fine, I explained using a resist as a thin film, but it's a CVD method.'': RuS 102
A similar effect can be obtained with a thin film that has etching selectivity with respect to the second semiconductor film, such as a film.

-Also, although the explanation has been made using an oxidized S102 film as the first insulating film, is it possible to obtain the same effect by using an insulating deposited film such as an S102 film produced by CVD? υ is rejected.

Effect of the invention 18・\-.

As described above, according to the present invention, the following effects can be obtained.

(1) A first semiconductor film pattern that becomes an emitter electrode having a fine pattern independent of the thickness of the first semiconductor film can be formed.

(2) The distance between the first semiconductor film serving as the emitter electrode and the second semiconductor film serving as the base lead-out electrode can be formed finely.

(3) Since the first insulating film between the first semiconductor film and the second semiconductor film and the second insulating film on the second semiconductor film are formed separately, each can be formed with a desired thickness; Insulation properties can be improved.

(4) Since the second semiconductor film can be formed thickly, the resistance of the base lead-out electrode can be formed low.

(6) Since the first insulating film is formed after removing the first semiconductor film other than the emitter region, no stress is generated and no defects occur.

As described above, the present invention makes it possible to lower the resistance of the base lead-out electrode, form a thick insulating film 19 for the base lead-out electrode, form the emitter electrode finely and accurately, and furthermore, Since the gap with the extraction electrode can be formed finely, the pattern can be made finer and the junction capacitance can be reduced, which greatly contributes to the high speed and low power consumption of bipolar transistors.

[Brief explanation of the drawing]

FIG. 1 (3) to (c) show N in the first embodiment of the present invention.
FIGS. 2A to 2C are cross-sectional views illustrating the manufacturing process of a PN-type bipolar transistor, and FIG. (8~(c) are conventional NP
FIG. 2 is a cross-sectional view for explaining the second step of manufacturing an N-type bipolar transistor. 21.35...N+ diffusion layer, 22.32...
1 diffusion layer, 24.31...S 102 film, 25
b...Arsenic-doped Po1ySi film, 29...
...Boron-doped PalySi film, 33...
...P-diffusion layer. Name of agent: Patent attorney Toshio Nakao and 1 other person
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Claims (4)

[Claims] (1) a step of forming a first semiconductor film on one main surface of a semiconductor substrate; a step of forming a desired laminated film pattern consisting of an antioxidant film and a deposited film on the first semiconductor film;
Using the laminated film pattern as an etching mask, the first
a step of forming a first insulating film on the side surface of the first semiconductor film; a step of forming a second semiconductor film on the entire surface; forming a thin film on the second semiconductor film; using the thin film as an etching mask to remove the second semiconductor film on the laminated film pattern; and then using the laminated film pattern and the thin film as an etching mask. etching the second semiconductor film to a desired depth; and after removing the deposited film and the thin film, etching a second insulating film on the second semiconductor film using the oxidation prevention film as a selective oxidation mask; A method for manufacturing a semiconductor device, comprising the step of forming a film. (2) After forming the second insulating film, the method for manufacturing a semiconductor device according to claim 1, further comprising the step of forming an active base diffusion layer and an emitter diffusion layer. . (3) After forming the first semiconductor film, the method for manufacturing a semiconductor device according to claim 1, further comprising the step of forming an active base diffusion layer and an emitter diffusion layer. . (4) A step of performing ion implantation for forming a graft base diffusion layer after forming the second semiconductor film on the entire surface of the semiconductor device according to claim 1. Production method.