JPS61166036A - Method of measuring dimensions - Google Patents

Method of measuring dimensions

Info

Publication number
JPS61166036A
JPS61166036A JP646985A JP646985A JPS61166036A JP S61166036 A JPS61166036 A JP S61166036A JP 646985 A JP646985 A JP 646985A JP 646985 A JP646985 A JP 646985A JP S61166036 A JPS61166036 A JP S61166036A
Authority
JP
Japan
Prior art keywords
resistor
contact
layer
dimensions
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP646985A
Other languages
Japanese (ja)
Other versions
JPH0133942B2 (en
Inventor
Masaharu Yamamoto
雅晴 山本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP646985A priority Critical patent/JPS61166036A/en
Publication of JPS61166036A publication Critical patent/JPS61166036A/en
Publication of JPH0133942B2 publication Critical patent/JPH0133942B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To contrive the automatic operation of measuring dimensions by obtaining the dimensions of a contact hole or a through hole from the resistance values of three kind of resistors. CONSTITUTION:A resistor formed with a diffusion layer or a wiring layer which has contact holes or through holes at the both ends, another resistor 5 of the same shape and construction to the resistor which is provided with a contact hole or a through hole to be measured the dimensions in the middle and an element for electrically obtaining the layer resistance and the width of the diffusion layer or the wiring layer provided nearby are constituted. That is, the resistor 5 W wide is brought into contact with part of electrodes 1, 2 with contact parts 3, 4 and is formed with the diffusion layer or the wiring layer which has the distance L1 between both the contact parts 3, 4. This enables to obtain the dimensions of the contact hole or the through hole from three kind of resistance values between the contact holes or the through holes, the layer resistance of the wiring layer or the diffusion layer and the width of the resistor.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、半導体集積回路装置におけるコンタクトホー
ルあるいはスルーホールの寸法を電気的に測定するため
の寸法測定方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a dimension measuring method for electrically measuring the dimensions of contact holes or through holes in semiconductor integrated circuit devices.

従来の技術 半導体集積回路の微細化が進むに従い、素子の寸法を正
確に測定する事は、素子特性の正確な把握および、製造
状態の判定に必須となってきている。
BACKGROUND OF THE INVENTION As semiconductor integrated circuits become smaller and smaller, accurate measurement of device dimensions has become essential for accurately understanding device characteristics and determining manufacturing conditions.

従来のコンタクトホールの寸法測定方法としては、顕微
鏡観察、または走査電子顕微鏡による方法がある。これ
らの方法では、自動化が出来ないため測定数が少量とな
り、正確な製造状態が把握できない。
Conventional methods for measuring contact hole dimensions include microscopic observation or scanning electron microscopy. Since these methods cannot be automated, the number of measurements is small, and accurate manufacturing status cannot be determined.

すなわち、顕微鏡観察では製造工程終了後では数種の層
間膜でおおわれているため観測が不正確であり、走査電
子顕微鏡観察では製造工程終了後の正確な観察は可能で
あるが、素子を汚染することになるか又は破壊しなけれ
ば観測できない場合もある。
In other words, microscopic observation is inaccurate after the manufacturing process is completed because the device is covered with several types of interlayer films, and scanning electron microscopy allows accurate observation after the manufacturing process, but it contaminates the device. In some cases, it may not be possible to observe it without destroying it.

発明が解決しようとする問題点 以上の様に従来の方法では、コンタクトホール、あるい
はスルーホールの正確な寸法を短時間で大量に、しかも
製造工程終了後で、素子破壊をせずに自動的に測定する
事は不可能である。
Problems to be Solved by the Invention As stated above, conventional methods are capable of automatically measuring the exact dimensions of contact holes or through holes in large quantities in a short time and without destroying the device after the manufacturing process is completed. It is impossible to measure.

本発明の目的は、半導体集積回路装置における、コンタ
クトホールあるいはスルーホールの寸法測定を、電気的
に行なう事を可能とし、寸法測定の自動化を計る事であ
る。
An object of the present invention is to make it possible to electrically measure the dimensions of contact holes or through holes in semiconductor integrated circuit devices, and to automate the dimension measurements.

問題点を解決するための手段 本発明の構成は、両端にコンタクトホールまたはスルー
ホールを有する拡散層あるいは配線層で形成される抵抗
体およびそれと同一の形状、構造を有する抵抗体の中間
部に寸法測定を目的とするコンタクトホールあるいはス
ルーホール間配した別の抵抗体とから構成され、さらに
その近傍に配した拡散層または配線層の層抵抗と幅を電
気的に導出するための素子からなる。
Means for Solving the Problems The configuration of the present invention includes a resistor formed of a diffusion layer or a wiring layer having contact holes or through holes at both ends, and a resistor having the same shape and structure as the resistor with dimensions in the middle part. It consists of a contact hole for the purpose of measurement or another resistor placed between the through holes, and an element for electrically deriving the layer resistance and width of a diffusion layer or wiring layer arranged near the contact hole or through hole.

作用 この構成により、コンタクトホールあるいはスルーホー
ル間の3種類の抵抗値と配線層または拡散層の層抵抗お
よび抵抗体の幅とからコンタクトホールあるいはスルー
ホールの寸法を導出することができる。
Function: With this configuration, the dimensions of the contact hole or through hole can be derived from three types of resistance values between the contact hole or through hole, the layer resistance of the wiring layer or diffusion layer, and the width of the resistor.

実施例 第1.2.3図は、それぞれ実施例の平面図を示したも
のである。
Embodiment Figures 1, 2 and 3 show plan views of each embodiment.

第1図は、幅Wで、電極1.2の一部に対して、コンタ
クト部3.4をもって接触し、両コンタクト部3,4間
の距離L1を有する拡散層まだは配線層5で形成される
抵抗体を示したものであり、電極1および2はそれぞれ
コンタクト部3.4に接続しており電圧測定用端子であ
る。電極6.7は、それぞれコンタクト部8.9をもっ
て、拡散層または配線層6に対して、電極1.2のコン
タクト3,4の後方延長部で接触する電極であり、電流
印加用端子である。電極6.7間に定電流工1を流した
とき、電極1.2間の電圧をvlとするとコンタクトホ
ール3,4間の抵抗R1はR1=V1/I t=Rsx
L1/W     =°°°°°°°−=−<1)と表
わされる。ここでRsは拡散層または配線層5の層抵抗
である、 第2図は別の抵抗体を示したものであり、幅W、コンタ
クト部16.17間の距離L2を有する拡散層または配
線層20で形成される抵抗体と、幅W、コンタクト51
7.18間の距離L3を有する拡散層または配線層20
で形成される抵抗体とが直列に接続されておりコンタク
ト部16.18間の距離は第1図示の抵抗体と同じLl
である。コンタクト部17の寸法はCWとする。コンタ
クト部15゜19に接続している電極13.14は定電
流印加用端子である。
In FIG. 1, a diffusion layer with a width W and a contact portion 3.4 is in contact with a part of the electrode 1.2, and a wiring layer 5 is formed with a distance L1 between both contact portions 3 and 4. Electrodes 1 and 2 are respectively connected to contact portions 3.4 and are terminals for voltage measurement. The electrodes 6.7 are electrodes that contact the diffusion layer or the wiring layer 6 at the rearward extensions of the contacts 3 and 4 of the electrode 1.2, each having a contact portion 8.9, and are current application terminals. . When constant current voltage 1 is applied between electrodes 6.7 and the voltage between electrodes 1.2 is vl, the resistance R1 between contact holes 3 and 4 is R1=V1/I t=Rsx
It is expressed as L1/W =°°°°°°°−=−<1). Here, Rs is the layer resistance of the diffusion layer or wiring layer 5. FIG. 20, a width W, and a contact 51.
7. Diffusion layer or wiring layer 20 having a distance L3 between 18
The distance between the contact portions 16 and 18 is Ll, which is the same as that of the resistor shown in the first diagram.
It is. The dimensions of the contact portion 17 are CW. Electrodes 13 and 14 connected to the contact portions 15 and 19 are constant current application terminals.

電極13.14間の印加電流を工2とし、電極10.1
1間の電圧をv2、電極11.12間の電圧をv3とす
ると寸法L2、同L3の各抵抗体の抵抗R2R3は R2=V2/l2=RsxL2/W     −=−−
−−−・・−・−(2)と表わされる。
The applied current between electrodes 13.14 is 2, and the current applied between electrodes 10.1 is
If the voltage between electrodes 11 and 12 is v2, and the voltage between electrodes 11 and 12 is v3, the resistance R2R3 of each resistor with dimensions L2 and L3 is R2=V2/l2=RsxL2/W -=--
−−・・−・−(2)

ここでRsは拡散層または配線層20の層抵抗であり、
第1図の抵抗体の層抵抗と同じである。
Here, Rs is the layer resistance of the diffusion layer or wiring layer 20,
This is the same as the layer resistance of the resistor shown in FIG.

また第2図にも示しである様に 1.1=L2+CW+L3     ・・・・・・・・
・・・・・・・(4)である。
Also, as shown in Figure 2, 1.1=L2+CW+L3...
......(4).

(1) 、 @ 、 (31式より L 1= W x R1/ Rs      由・・−
・・−・−・−1tslL2=WXR2/Rs    
   ・・・・・・・・・・・・・・・(6)L3工W
XR3/Rs       ・・・・・・・・・・・・
・・・(71となり、さらにfil 、+61 、 (
71式および(4)式より求めるべきコンタクトホール
あるいはスルーホールの寸法CWは CW=L1−(L2+L3’) =−x (R1−R2−R3)  ・・・・・・・・・
・・・(8)Rs となり、 拡散層あるいは配線層6(あるいは20)の層抵抗Ra
と幅Wが分かればCWが求まる事になる。
(1) , @ , (From formula 31, L 1 = W x R1/Rs...-
・・・−・−1tslL2=WXR2/Rs
・・・・・・・・・・・・・・・(6) L3 work W
XR3/Rs ・・・・・・・・・・・・
...(71, and then fil, +61, (
The dimension CW of the contact hole or through hole that should be determined from formula 71 and formula (4) is CW=L1-(L2+L3') =-x (R1-R2-R3)...
...(8)Rs, and the layer resistance Ra of the diffusion layer or wiring layer 6 (or 20)
If the width W is known, CW can be found.

ルあるいはスルーホールの寸法を求める本発明の原理を
実施例で説明した。
The principle of the present invention for determining the dimensions of holes or through-holes has been explained using examples.

ところで、第3図は従来から用いられている拡散層ある
いは配線層36の層抵抗Rsと幅Wを電気的に測定する
ためのvan der Pauw パターンとブリッジ
パターンを示したものであり、Van derP2Lu
wパターンの電極21.22,24.25はコンタクト
部28.29.31.32に接続しており電極21.2
2に印加電流IR8を流した時電極24.25間の電圧
をvRBとすると拡散層または配線層35の層抵抗Rs
は Rs=−x(vHs/l1s)  ++・・・・+山・
+・++(91n2 (4,532) と表わせる。
By the way, FIG. 3 shows a van der Pauw pattern and a bridge pattern for electrically measuring the layer resistance Rs and width W of the diffusion layer or wiring layer 36, which have been conventionally used.
The electrodes 21.22, 24.25 of the w pattern are connected to the contact part 28.29.31.32, and the electrode 21.2
If the voltage between the electrodes 24 and 25 is vRB when an applied current IR8 is applied to the electrode 2, the layer resistance Rs of the diffusion layer or wiring layer 35 is
is Rs=-x(vHs/l1s) ++・・・・+mountain・
It can be expressed as +・++(91n2 (4,532).

電極22.23に印加電流1.を流したとき電極26.
27間の電圧をVRとすると拡散層あるいは配線層36
の幅Wは W = R11XL4X IR/Vn   −−−−(
10)と表わせる。ここでL4はコンタクト部33と3
4間の距離である。
Current 1. applied to electrodes 22.23. When flowing the electrode 26.
If the voltage between 27 and 27 is VR, then the diffusion layer or wiring layer 36
The width W is W = R11XL4X IR/Vn -----(
10). Here, L4 is the contact part 33 and 3
It is the distance between 4.

以上の様に弐(91,(10)から拡散層あるいは配線
層の幅W、層抵抗Rsが求められれば式(8)より抵抗
体1,2.3の抵抗値R1,R2,R3から目的とすル
コンタクトホールあるいはスルーホールの寸法ONが求
められる事になる。
As mentioned above, if the width W and layer resistance Rs of the diffusion layer or wiring layer are found from 2(91, (10)), then from the resistance values R1, R2, R3 of resistors 1, 2.3, the purpose Therefore, the dimensions ON of the through contact hole or through hole are required.

発明の効果 本発明によると、拡散層または配線層で形成される同一
の幅を有する3種類の抵抗体の抵抗値と、それら抵抗体
の幅と層抵抗値との値から目的とするコンタクトホール
あるいはスルーホールの値ラミ気的に導出し、測定の自
動化が可能である。
Effects of the Invention According to the present invention, a target contact hole can be determined from the resistance values of three types of resistors having the same width formed in a diffusion layer or wiring layer, and the values of the widths of these resistors and the layer resistance values. Alternatively, the through-hole value can be derived mechanically and the measurement can be automated.

【図面の簡単な説明】[Brief explanation of drawings]

第1図、!2図、第3図は本発明の実施に用いた寸法測
定用抵抗体の平面図である。 1 .2.6.ア・・・・・・電極、3,4,8.9・
・・・・・コンタクト部、5・・・・・・抵抗体を形成
する拡散層まだは配線層。 代理人の氏名 弁理士 中 尾 敏 男 ほか1基型 
1 図 第2図 第3図
Figure 1! FIG. 2 and FIG. 3 are plan views of a resistor for dimension measurement used in carrying out the present invention. 1. 2.6. A... Electrode, 3, 4, 8.9.
. . . Contact portion, 5 . . . Diffusion layer forming the resistor and wiring layer. Name of agent: Patent attorney Toshio Nakao and 1 other type
1 Figure 2 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 一定の幅とそれより十分に長い適当な長さを有する拡散
層または配線層上の両端に同一形状、同一寸法のコンタ
クトホールを所定距離だけ離して配した第1の拡散抵抗
体または配線抵抗体と、前記拡散層または配線層と同一
形状、同一寸法を有する同種の拡散層または配線層上に
前記コンタクトホールと同一形状、同一寸法のコンタク
トホールを前記第1の拡散抵抗体または配線抵抗体の所
定距離と同寸法だけ離して両端に配し、さらにその中間
付近に前記各コンタクトホールと同一形状のコンタクト
ホールを配し、コンタクトホール間で形成される第2の
拡散抵抗体または配線抵抗体および第3の拡散抵抗体ま
たは配線抵抗体の合計3種類の抵抗体の抵抗値からコン
タクトホールあるいはスルーホール4の寸法を導出する
事を特徴とする寸法測定方法。
A first diffused resistor or wired resistor in which contact holes of the same shape and size are arranged at both ends of a diffusion layer or wiring layer having a certain width and an appropriate length sufficiently longer than that, separated by a predetermined distance. Then, a contact hole having the same shape and dimensions as the contact hole is formed on the same kind of diffusion layer or wiring layer having the same shape and dimensions as the diffusion layer or wiring layer. A second diffused resistor or a wiring resistor is placed between the contact holes, and a contact hole having the same shape as each of the contact holes is placed near the middle thereof, and a second diffused resistor or wiring resistor is formed between the contact holes. A dimension measuring method characterized by deriving the dimensions of a contact hole or a through hole 4 from the resistance values of a total of three types of resistors, a third diffused resistor or a wiring resistor.
JP646985A 1985-01-17 1985-01-17 Method of measuring dimensions Granted JPS61166036A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP646985A JPS61166036A (en) 1985-01-17 1985-01-17 Method of measuring dimensions

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP646985A JPS61166036A (en) 1985-01-17 1985-01-17 Method of measuring dimensions

Publications (2)

Publication Number Publication Date
JPS61166036A true JPS61166036A (en) 1986-07-26
JPH0133942B2 JPH0133942B2 (en) 1989-07-17

Family

ID=11639311

Family Applications (1)

Application Number Title Priority Date Filing Date
JP646985A Granted JPS61166036A (en) 1985-01-17 1985-01-17 Method of measuring dimensions

Country Status (1)

Country Link
JP (1) JPS61166036A (en)

Also Published As

Publication number Publication date
JPH0133942B2 (en) 1989-07-17

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