JPH05157780A - Resistance element process monitor device - Google Patents
Resistance element process monitor deviceInfo
- Publication number
- JPH05157780A JPH05157780A JP18442591A JP18442591A JPH05157780A JP H05157780 A JPH05157780 A JP H05157780A JP 18442591 A JP18442591 A JP 18442591A JP 18442591 A JP18442591 A JP 18442591A JP H05157780 A JPH05157780 A JP H05157780A
- Authority
- JP
- Japan
- Prior art keywords
- resistance
- resistance element
- resistance elements
- integrated circuit
- elements
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、集積回路の実回路と同
一の工程によって形成された抵抗素子の抵抗値を測定す
ることによって集積回路チップの製造工程をモニターす
るための抵抗素子プロセスモニター装置に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resistance element process monitoring apparatus for monitoring a manufacturing process of an integrated circuit chip by measuring a resistance value of a resistance element formed by the same process as that of an actual circuit of an integrated circuit. Regarding
【０００２】近年、特に、アナログ集積回路において、
特性の高精度化が進み、回路中の抵抗素子の抵抗値の絶
対精度および抵抗素子間の抵抗値の相対精度を向上する
ことが強く要望されている。そのため、抵抗素子の抵抗
値を高精度で、かつ、効率よく測定することができる抵
抗素子プロセスモニター装置が必要になる。In recent years, especially in analog integrated circuits,
As the precision of the characteristics has advanced, it has been strongly demanded to improve the absolute precision of the resistance value of the resistance elements in the circuit and the relative precision of the resistance value between the resistance elements. Therefore, a resistance element process monitor device capable of measuring the resistance value of the resistance element with high accuracy and efficiency is required.
【０００３】[0003]
【従来の技術】従来の抵抗素子プロセスモニター装置
は、集積回路チップに実回路と同一の工程によって形成
された抵抗素子の両端に測定用パッドを設けたもので、
集積回路装置の製造段階で適宜このモニター用抵抗素子
の抵抗値の絶対値を測定することによって、集積回路チ
ップの実回路内の抵抗素子の抵抗値を推定する方法が採
用されていた。2. Description of the Related Art A conventional resistance element process monitor is one in which a measuring pad is provided at both ends of a resistance element formed in the same step as an actual circuit on an integrated circuit chip.
A method has been adopted in which the resistance value of the resistance element in the actual circuit of the integrated circuit chip is estimated by appropriately measuring the absolute value of the resistance value of the monitoring resistance element at the manufacturing stage of the integrated circuit device.
【０００４】図２は、従来の抵抗素子プロセスモニター
装置の構成説明図である。この図において、１１は抵抗
素子、１２、１３は測定用パッド、１４、１５はコンタ
クト、Ｗは抵抗素子の幅、Ｌは抵抗素子の長さである。FIG. 2 is an explanatory view of the configuration of a conventional resistance element process monitor device. In this figure, 11 is a resistance element, 12 and 13 are measurement pads, 14 and 15 are contacts, W is the width of the resistance element, and L is the length of the resistance element.
【０００５】この従来の抵抗素子プロセスモニター装置
においては、集積回路基板の上の適宜の場所に、幅Ｗ、
長さＬの抵抗素子１１を形成し、その抵抗素子１１の両
端にコンタクト１４、１５によって接続された測定用パ
ッド１２、１３を形成して構成されている。In this conventional resistance element process monitor, the width W,
A resistance element 11 having a length L is formed, and measurement pads 12 and 13 connected to both ends of the resistance element 11 by contacts 14 and 15 are formed.
【０００６】そして、その測定用パッド１２、１３に測
定用プローブを接触させ、測定用パッド１２、１３間に
所定の電圧を印加し、この間に流れる電流を測定するこ
とによって、抵抗素子１１の抵抗値を測定していた。こ
の場合、抵抗素子１１の幅Ｗと長さＬは、実回路中の抵
抗素子の抵抗値をより正確に反映するように、実回路中
の抵抗素子の大きさ、形状に近似したものに設定されて
いる。Then, the measuring probe is brought into contact with the measuring pads 12 and 13, a predetermined voltage is applied between the measuring pads 12 and 13, and the current flowing between them is measured to measure the resistance of the resistance element 11. The value was being measured. In this case, the width W and the length L of the resistance element 11 are set to be close to the size and shape of the resistance element in the actual circuit so as to more accurately reflect the resistance value of the resistance element in the actual circuit. Has been done.
【０００７】[0007]
【発明によって解決しようとする課題】しかしながら、
上記の従来用いられていた抵抗素子プロセスモニター装
置によると、モニター用抵抗素子の抵抗素子の絶対精度
の測定はできるが、抵抗素子間の抵抗値の相対精度を測
定することができなかった。[Problems to be Solved by the Invention]
According to the above-mentioned conventionally used resistance element process monitor device, the absolute accuracy of the resistance element of the resistance element for monitoring can be measured, but the relative accuracy of the resistance value between the resistance elements cannot be measured.
【０００８】このように、製造工程や材料等のバラツ
キ、あるいは、不均一性によって発生した抵抗素子間の
抵抗値の相対精度を測定することができないため、抵抗
素子間の抵抗値の相対精度が悪いウェハは、半導体集積
チップの実回路が完成した後にその特性を試験するまで
は判明せず、最終的には破棄する集積回路チップに対し
て製造工程を加えることになり、また、後続の製造工程
に測定の結果をフィードバックすることができず、製造
効率の低下が避けられなかった。As described above, since it is impossible to measure the relative accuracy of resistance values between resistance elements caused by variations in manufacturing process, materials, etc., or non-uniformity, the relative accuracy of resistance values between resistance elements is reduced. The bad wafer is not known until the characteristics of the semiconductor integrated chip are completed and then tested, and eventually the manufacturing process is added to the discarded integrated circuit chip, and the subsequent manufacturing Since the measurement results could not be fed back to the process, the production efficiency could not be reduced.
【０００９】本発明は、製造工程や材料の特性のバラツ
キによって発生するモニター用抵抗素子の絶対精度の他
モニター用抵抗素子間の抵抗値の相対精度をも容易に測
定することができる抵抗素子プロセスモニター装置を提
供することを目的とする。According to the present invention, the resistance element process capable of easily measuring the relative accuracy of the resistance value between the monitor resistance elements as well as the absolute accuracy of the monitor resistance elements caused by variations in the manufacturing process and material characteristics. It is intended to provide a monitoring device.
【００１０】[0010]
【課題を解決するための手段】本発明にかかる抵抗素子
プロセスモニター装置においては、上記の問題点を解決
する手段として、半導体集積回路基板と、該半導体集積
回路基板上に実回路と同じ工程によって形成された複数
の抵抗素子と、これら複数の抵抗素子の端部を接続する
接続手段と、各抵抗素子の各端部に形成された測定用パ
ッドとをもって構成し、各抵抗素子の抵抗値の絶対精
度、および、異なる抵抗素子間の抵抗値の相対精度を測
定することができるようにした。In the resistance element process monitor apparatus according to the present invention, as means for solving the above-mentioned problems, a semiconductor integrated circuit substrate and the same process as an actual circuit on the semiconductor integrated circuit substrate are performed. A plurality of resistance elements formed, connecting means for connecting the ends of the plurality of resistance elements, and a measuring pad formed at each end of each resistance element, the resistance value of each resistance element Absolute accuracy and relative accuracy of resistance values between different resistance elements can be measured.
【００１１】また、この場合、２個の抵抗素子を直列接
続して配置し、該２個の抵抗素子の接続点に測定用パッ
ドを形成し、かつ、各抵抗素子の他端の各々に測定用パ
ッドを形成する構成を採用した。Further, in this case, two resistance elements are connected in series and arranged, a measurement pad is formed at a connection point of the two resistance elements, and measurement is performed at each of the other ends of the resistance elements. A structure for forming a pad for use is adopted.
【００１２】[0012]
【作用】上記のように、抵抗素子プロセスモニター装置
を、半導体集積回路基板と、該半導体集積回路基板上に
実回路と同じ工程によって形成された複数のモニター用
抵抗素子と、これら複数のモニター用抵抗素子の端部を
接続する接続手段と、各モニター用抵抗素子の各端部に
形成された測定用パッドとをもって構成することによっ
て、各モニター用抵抗素子の抵抗値の絶対精度、およ
び、異なるモニター用抵抗素子間の抵抗値の相対精度を
容易に測定することができる。As described above, the resistance element process monitor device is provided with a semiconductor integrated circuit board, a plurality of monitor resistance elements formed on the semiconductor integrated circuit board in the same process as an actual circuit, and a plurality of these monitor elements. The absolute accuracy of the resistance value of each monitor resistance element and the difference can be obtained by constructing the connection means for connecting the ends of the resistance element and the measurement pad formed at each end of each monitor resistance element. The relative accuracy of the resistance value between the monitor resistance elements can be easily measured.
【００１３】[0013]
【実施例】図１（Ａ）、（Ｂ）は、本発明の１実施例の
説明図である。この図において、１は第１の抵抗素子、
２は第２の抵抗素子、３は第１の測定用パッド、４は第
２の測定用パッド、５は第３の測定用パッド、６、７、
８、９はコンタクト、１０は配線層、Ｗは抵抗素子の
幅、Ｌは抵抗素子の長さ、ｒ1 は第１の抵抗素子の抵抗
値、ｒ2 は第２の抵抗素子の抵抗値である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIGS. 1A and 1B are explanatory views of one embodiment of the present invention. In this figure, 1 is the first resistance element,
2 is a second resistance element, 3 is a first measurement pad, 4 is a second measurement pad, 5 is a third measurement pad, 6, 7,
8, 9 are contacts, 10 is a wiring layer, W is the width of the resistance element, L is the length of the resistance element, r 1 is the resistance value of the first resistance element, and r 2 is the resistance value of the second resistance element. is there.
【００１４】本実施例の抵抗素子プロセスモニター装置
においては、図１（Ａ）に示されているように、集積回
路基板上の集積回路チップの適宜の場所に、第１の抵抗
素子１と第２の抵抗素子２を形成し、第１の抵抗素子１
と第２の抵抗素子２の一端の間を金属配線層１０によっ
て電気的に接続し、この接続部に第３の測定用パッド５
を形成し、第１の抵抗素子１と第２の抵抗素子２の開放
端に第１の測定用パッド３、第２の測定用パッド４が形
成されている。In the resistance element process monitor of the present embodiment, as shown in FIG. 1A, the first resistance element 1 and the first resistance element 1 are provided at appropriate positions on the integrated circuit chip on the integrated circuit substrate. 2 to form the resistance element 2 and the first resistance element 1
And one end of the second resistance element 2 are electrically connected by the metal wiring layer 10, and the third measurement pad 5 is connected to this connection portion.
The first measurement pad 3 and the second measurement pad 4 are formed at the open ends of the first resistance element 1 and the second resistance element 2.
【００１５】なお、コンタクト６、７、８、９は、第１
の抵抗素子１と第２の抵抗素子２の端部と配線層１０、
あるいは、第１の測定用パッド３、第２の測定用パッド
４、第３の測定用パッド５の間を接続する点である。ま
た、第１の抵抗素子１と第２の抵抗素子の幅Ｗ1 と
Ｗ2 、長さＬ1 とＬ2 は、実回路中の抵抗素子の抵抗値
をより正確に反映するように、実回路中の抵抗素子の大
きさ、形状に近似したものに設定されることがあるが、
抵抗素子の幅Ｗ1 とＷ2 および長さＬ1 とＬ2 は必ずし
も同一ではない。The contacts 6, 7, 8 and 9 are the first
End portions of the resistive element 1 and the second resistive element 2 and the wiring layer 10,
Alternatively, it is a point where the first measurement pad 3, the second measurement pad 4, and the third measurement pad 5 are connected. Further, the widths W 1 and W 2 and the lengths L 1 and L 2 of the first resistance element 1 and the second resistance element are set so as to reflect the resistance values of the resistance elements in the actual circuit more accurately. It may be set to a size close to the size and shape of the resistance element in the circuit.
The widths W 1 and W 2 and the lengths L 1 and L 2 of the resistance element are not necessarily the same.
【００１６】図１（Ｂ）は、本実施例の等価回路を示し
ている。この等価回路に沿って本実施例による測定方法
を説明する。FIG. 1B shows an equivalent circuit of this embodiment. The measurement method according to the present embodiment will be described along this equivalent circuit.
【００１７】１．絶対精度の測定 第１の測定用パッド３、第２の測定用パッド４、第３の
測定用パッド５に測定装置のプローブを接触させ、第１
の測定用パッド３と第３の測定用パッド５の間に電圧を
印加し、もしくは、電流を供給し、第２の測定用パッド
４は開放し、または、第３の測定用パッド５と接続し
て、従来の抵抗素子プロセスモニター装置と同様に第１
の抵抗素子１の抵抗値を測定することによって、第１の
抵抗素子１の絶対精度を測定する。なお、上記の説明と
は逆に、第２の抵抗素子２の抵抗値を測定するようにし
てもよい。1. Measurement of Absolute Accuracy The probe of the measuring device is brought into contact with the first measurement pad 3, the second measurement pad 4, and the third measurement pad 5,
Voltage is applied or current is supplied between the third measurement pad 3 and the third measurement pad 5, and the second measurement pad 4 is opened or connected to the third measurement pad 5. Then, like the conventional resistance element process monitor,
The absolute accuracy of the first resistance element 1 is measured by measuring the resistance value of the resistance element 1. Note that, contrary to the above description, the resistance value of the second resistance element 2 may be measured.
【００１８】２．相対精度の測定 第１の測定用パッド３と第２の測定用パッド４の間に電
圧を印加し、もしくは、電流を供給し、第３の測定用パ
ッド５の電圧を測定することによって抵抗素子間の相対
精度を測定する。2. Measurement of relative accuracy By applying a voltage or supplying a current between the first measurement pad 3 and the second measurement pad 4 and measuring the voltage of the third measurement pad 5, the resistance element is measured. Measure the relative accuracy between.
【００１９】すなわち、第１の測定用パッド３の電圧を
Ｖ1 、第２のパッド４の電圧をＶ2 とし、第３パッド５
の電圧をＶ3 とすると、第１の抵抗素子１の抵抗値ｒ1
と第２の抵抗素子２の抵抗値ｒ2 の相対精度は次のよう
にして求められる。 ｒ2 ／ｒ1 ＝（Ｖ3 −Ｖ1 ）／（Ｖ2 −Ｖ3 ） なお、上記の実施例においては、モニター用抵抗素子は
２個であったが、３個以上として、集積回路チップ上の
より広い範囲の抵抗値のバラツキを測定することもでき
る。上記のモニター用抵抗素子の配置形態においても、
接続形態においても、実回路中の抵抗素子の抵抗値をよ
りよく反映するように決定される。また、上記実施例に
おいて用いた抵抗素子として、拡散抵抗素子、厚膜抵抗
素子、薄膜抵抗素子等各種の抵抗素子を用いることがで
きる。That is, the voltage of the first measuring pad 3 is V 1 , the voltage of the second pad 4 is V 2, and the third pad 5 is
If the voltage of V 1 is V 3 , the resistance value r 1 of the first resistance element 1 is
And the relative accuracy of the resistance value r 2 of the second resistance element 2 is obtained as follows. r 2 / r 1 = (V 3 −V 1 ) / (V 2 −V 3 ) In the above embodiment, the number of monitor resistance elements was two, but the number of resistance elements for monitor is three or more, and the integrated circuit chip It is also possible to measure the variation in the resistance value in a wider range above. Even in the arrangement form of the monitor resistance element,
Also in the connection form, it is determined so as to better reflect the resistance value of the resistance element in the actual circuit. Further, various resistance elements such as a diffusion resistance element, a thick film resistance element, and a thin film resistance element can be used as the resistance element used in the above embodiment.
【００２０】[0020]
【発明の効果】以上説明したように本発明によれば、実
回路と同一の工程によって形成されたモニター用抵抗素
子の抵抗値の絶対精度および相対精度を測定することに
よって、実回路中の抵抗素子の製造工程や材料のバラツ
キによって発生する抵抗値のズレやバラツキを推定し
て、製造工程の諸条件設定にフィードバックしたり、特
性不良の集積回路チップを早期に発見して工程から除去
することができ、製造管理に寄与するところが大きい。As described above, according to the present invention, the resistance in the actual circuit is measured by measuring the absolute accuracy and the relative accuracy of the resistance value of the monitor resistance element formed in the same step as the actual circuit. Estimating deviations and variations in resistance value that occur due to variations in element manufacturing processes and materials, and feeding them back to the setting of various conditions in the manufacturing process, and early finding and removing integrated circuit chips with defective characteristics from the process. It is possible to contribute to manufacturing control.
【図１】（Ａ）、（Ｂ）は本発明の１実施例の説明図で
ある。1A and 1B are explanatory views of one embodiment of the present invention.
【図２】従来の抵抗素子プロセスモニター装置の構成説
明図である。FIG. 2 is a configuration explanatory view of a conventional resistance element process monitor device.
１ 第１の抵抗素子 ２ 第２の抵抗素子 ３ 第１の測定用パッド ４ 第２の測定用パッド ５ 第３の測定用パッド ６、７、８、９ コンタクト １０ 配線層 Ｗ1 第１の抵抗素子の幅 Ｗ2 第２の抵抗素子の幅 Ｌ1 第１の抵抗素子の長さ Ｌ2 第２の抵抗素子の長さ ｒ1 第１の抵抗素子の抵抗値 ｒ2 第２の抵抗素子の抵抗値1 1st resistance element 2 2nd resistance element 3 1st measurement pad 4 2nd measurement pad 5 3rd measurement pad 6, 7, 8, 9 contact 10 Wiring layer W 1 1st resistance Width of element W 2 Width of second resistance element L 1 Length of first resistance element L 2 Length of second resistance element r 1 Resistance value of first resistance element r 2 Second resistance element Resistance values
Claims (2)
路基板上に実回路と同じ工程によって形成された複数の
抵抗素子と、これら複数の抵抗素子の端部を接続する接
続手段と、各抵抗素子の各端部に形成された測定用パッ
ドとを有し、各抵抗素子の抵抗値の絶対精度、および、
異なる抵抗素子間の抵抗値の相対精度を測定することが
できるようにしたことを特徴とする抵抗素子プロセスモ
ニター装置。1. A semiconductor integrated circuit board, a plurality of resistance elements formed on the semiconductor integrated circuit board in the same process as an actual circuit, connecting means for connecting end portions of the plurality of resistance elements, and resistors. With a measurement pad formed at each end of the element, the absolute accuracy of the resistance value of each resistance element, and,
A resistance element process monitor device characterized in that the relative accuracy of resistance values between different resistance elements can be measured.
れ、該２個の抵抗素子の接続点に測定用パッドが形成さ
れ、かつ、各抵抗素子の他端の各々に測定用パッドが形
成されたことを特徴とする請求項１記載の抵抗素子プロ
セスモニター装置。2. Two resistance elements are connected in series and arranged, a measurement pad is formed at a connection point of the two resistance elements, and a measurement pad is provided at each of the other ends of the resistance elements. The resistance element process monitor according to claim 1, wherein the resistance element process monitor is formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18442591A JPH05157780A (en) | 1991-07-24 | 1991-07-24 | Resistance element process monitor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18442591A JPH05157780A (en) | 1991-07-24 | 1991-07-24 | Resistance element process monitor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05157780A true JPH05157780A (en) | 1993-06-25 |
Family
ID=16152932
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18442591A Withdrawn JPH05157780A (en) | 1991-07-24 | 1991-07-24 | Resistance element process monitor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05157780A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008205258A (en) * | 2007-02-21 | 2008-09-04 | Seiko Instruments Inc | Semiconductor device and its trimming method |
| JP2014160831A (en) * | 2009-07-28 | 2014-09-04 | Skyworks Solutions Inc | Semiconductor process sensor and method of characterizing semiconductor process |
-
1991
- 1991-07-24 JP JP18442591A patent/JPH05157780A/en not_active Withdrawn
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008205258A (en) * | 2007-02-21 | 2008-09-04 | Seiko Instruments Inc | Semiconductor device and its trimming method |
| JP2014160831A (en) * | 2009-07-28 | 2014-09-04 | Skyworks Solutions Inc | Semiconductor process sensor and method of characterizing semiconductor process |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19981008 |