JPS62286241A - Inspection of semiconductor device - Google Patents

Inspection of semiconductor device

Info

Publication number
JPS62286241A
JPS62286241A JP13079086A JP13079086A JPS62286241A JP S62286241 A JPS62286241 A JP S62286241A JP 13079086 A JP13079086 A JP 13079086A JP 13079086 A JP13079086 A JP 13079086A JP S62286241 A JPS62286241 A JP S62286241A
Authority
JP
Japan
Prior art keywords
value
external lead
average value
measured
vbe
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13079086A
Other languages
Japanese (ja)
Inventor
Yukio Ishii
石井 雪雄
Yutaka Katayama
方山 豊
Kenichi Tateno
立野 健一
Toshio Kawasaki
川崎 敏夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP13079086A priority Critical patent/JPS62286241A/en
Publication of JPS62286241A publication Critical patent/JPS62286241A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To remove only abnormal semiconductor devices accurately, by measuring constant current and voltage values in the forward direction at junctions through external lead wires, computing the difference between the individual measured value and the average value of the measured values in the population of the same manufacturing lot, comparing the computed value with a standard value, thereby judging the quality. CONSTITUTION:A semiconductor element is bonded to a substrate supporting body. Each electrode of the semiconductor element is connected to an external lead wire with a thin metal wire. The constant current and voltage values in the forward direction at a junction are measured through the external lead wire. Based on the difference between the individual measured value and the average value of the measured values of the population of the same manufacturing lot, the defective individual measured values are detected. The distribution of the forward voltage (VBE) for every manufacturing lot is estimated by the measurements of a small amount of samples. The average value of the VBE of said manufacturing lot is obtained. A standard value is provided with respect to the average value. Then the dispersion in VBE among the manufacturing lots can be offset. The abnormal dispersion, which is yielded in the manufacturing processes can be detected accurately.

Description

【発明の詳細な説明】 3、発明の詳細な説明 産業上の利用分野 本発明は、半導体素子の電極と各々の外部電極の結線状
態を電気的に検出する方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION 3. Detailed Description of the Invention Field of Industrial Application The present invention relates to a method for electrically detecting the connection state between an electrode of a semiconductor element and each external electrode.

従来の技術 従来この種の検査は、半導体素子の接合順方向電圧が安
定した一定の値を持つことに着目して、半導体素子の極
性領域と金属電極および外部導出線と金属′S線の結合
部のばらつきや、金属細線の太さや変化分が、半導体素
子個有の順方向電圧に加算されることを利用して規格設
定を行ない、素子上外部導出線の結合状態を検査する方
法が一般的に行なわれている。特に大電流を扱う半導体
素子の場合、部分的に結合が不完全であったり、金属細
線の太さが異なると、半導体装置の中では回路の一部に
高い抵抗が存在することになり、部分的な発熱、疲労が
起って半導体装置にとって致命的な断線不良となり、そ
の半導体装置を組み込んだ電子機器の市場トラブルを発
生させるため、特に厳重なる規格設定と、検査が行なわ
れている。
Conventional technology This type of inspection conventionally focuses on the fact that the junction forward voltage of a semiconductor element has a stable and constant value, and examines the coupling between the polar region of the semiconductor element and the metal electrode, and the external lead wire and the metal 'S line. A common method is to set standards by taking advantage of the fact that variations in parts, thickness and changes in thin metal wires are added to the forward voltage unique to semiconductor elements, and to inspect the coupling state of external lead-out wires on the element. It is carried out according to Particularly in the case of semiconductor devices that handle large currents, if the coupling is incomplete in some areas or the thickness of the thin metal wires is different, high resistance will exist in some parts of the circuit in the semiconductor device. Particularly strict standards are set and inspections are carried out to avoid excessive heat generation and fatigue, which can lead to fatal disconnections in semiconductor devices and cause market troubles for electronic equipment incorporating such semiconductor devices.

発明が解決しようとする問題点 このような従来の方法は、半導体素子の極性領域と金属
電極の接触、電極と金属細線の接続面積や強度、金属細
線の形状のばらつき、さらには、外部導出線と金属細線
の接続面積や強度などの製造ロット毎のばらつきに加え
て、髄々のばらつきが加わっており、検査規格を厳しく
すると、製造歩留りを悪くシ、一方、ゆるくすると、品
質が確保できないという不都合を生じている。
Problems to be Solved by the Invention These conventional methods have problems such as the contact between the polar region of the semiconductor element and the metal electrode, the connection area and strength between the electrode and the thin metal wire, variations in the shape of the thin metal wire, and furthermore, In addition to the variations between production lots, such as the connection area and strength of thin metal wires, there are also significant variations, and if inspection standards are made too strict, the production yield will be adversely affected, while if they are made too lax, quality cannot be ensured. It is causing inconvenience.

本発明は、このような不都合を排除することを目的とし
て、製造ロット内の全体のばらつきを把握し、その製造
ロットの特性値が分布から飛び離れた異常な半導体装置
のみを精度よく取り除くことのできる方法に関するもの
である。
The present invention aims to eliminate such inconveniences by grasping the overall variation within a production lot and accurately removing only abnormal semiconductor devices whose characteristic values deviate from the distribution of the production lot. It's about how you can do it.

問題点を解決するための手段 本発明は、半導体素子を基板支持体に接着し、半導体素
子の各電極と外部導出線とを金属細線で連結した後、前
記外部導出線を通じて、接合順方向定電流電圧値を測定
し、個々の測定値と同一製造ロット内母集団の測定値平
均値との差から、前記側々の測定値の不良を検知する半
導体装置の検宵している。例えば、トランジスタのエミ
ッタ。
Means for Solving the Problems The present invention provides a method for bonding a semiconductor element to a substrate support, connecting each electrode of the semiconductor element and an external lead wire with a thin metal wire, and then determining the forward direction of bonding through the external lead wire. The semiconductor device is tested by measuring current and voltage values and detecting defects in the measured values on each side based on the difference between individual measured values and the average measured value of a population within the same manufacturing lot. For example, the emitter of a transistor.

ベース領域上にアルミニウム蒸着によって電極を形成し
た場合、そのアルミニウム蒸着膜厚が若干異ったり、エ
ミッタ、ベース電極と、金属細線を結合する際、ボンデ
ィング・ウェッジの寸法で決まるボンディング面積が若
干異ったり、また、金属細線のボンディング部の形状が
異なる等である。このような、わずかなばらつきは、大
電流になる程大きな抵抗値を示し、同一条件でエミッタ
、ベース電極間に一定の順方向電流を流しても順方向電
圧(VBE)は大きな差となって現われるために、一定
のVIE規格を設ける場合、ある程度ゆるい規格を設定
しなければならない。
When an electrode is formed by aluminum vapor deposition on the base region, the thickness of the aluminum vapor deposition film may vary slightly, and when bonding the emitter, base electrode, and thin metal wire, the bonding area determined by the dimensions of the bonding wedge may vary slightly. In addition, the shape of the bonding portion of the thin metal wire is different. Such slight variations indicate a larger resistance value as the current becomes larger, and even if a constant forward current is passed between the emitter and base electrodes under the same conditions, there will be a large difference in the forward voltage (VBE). If a certain VIE standard is established in order to appear, the standard must be set to a certain extent.

そこで、製造ロット毎のVB[!の分布を少量のサンプ
ル測定で推定し、且つその製造ロットのvBEの平均値
を求め、平均値に対して規格値を設ければ、製造ロット
間のVBHのばらつきは消去され、また、製造工程で生
じた異常ばらつきは極めて精。
Therefore, VB [! By estimating the distribution of VBH by measuring a small amount of samples, finding the average value of vBE for that manufacturing lot, and setting a standard value for the average value, variations in VBH between manufacturing lots can be eliminated, and the manufacturing process can be The abnormal variation that occurred was extremely precise.

度よく検出することが可能となる。This allows for accurate detection.

実施例 図面は、本発明の検査方法をわかり易くするために、実
施例の半導体装置として、大電力型トランジスタによる
定電流(Ig=7A>時のベース。
In order to make it easier to understand the inspection method of the present invention, the drawings show a semiconductor device of the embodiment at a constant current (Ig=7A>) using a high-power transistor.

エミッタ間電圧VB[!の分布と、検査方法を表わした
図である。
Emitter voltage VB[! FIG.

本発明にかかる検査例で、各々のロットから数個(10
〜60)のサンプリングによって、そのロットの分布と
平均値AA、AB、ACをデーター処理演算し、その平
均値に対して規格幅(ad)(この例ではad=o、0
4V)を付加した規格値BA、BB、BCを設定する平
均値の偏差は工程差であり、これは許容限度内で容認さ
れるが個々の測定値がロット毎の規格値をこえるものは
不良品と判定できる。これによって製造上の異常品は、
確実に除去される。
In an inspection example according to the present invention, several (10
~60), data processing is performed on the distribution and average values AA, AB, AC of the lot, and the standard width (ad) (in this example, ad=o, 0) is calculated for the average value.
The deviation of the average value for setting the standard values BA, BB, BC with 4V) is a process difference, and this is acceptable within the tolerance limit, but it is unacceptable if the individual measured value exceeds the standard value for each lot. It can be judged to be a good product. As a result, products with manufacturing defects are
definitely removed.

発明の効果 以上のように本発明は、製造ロット間の変化と、製造工
程中の作り込みの異常を明確に分け、極めて精度の高い
検査が可能おなり、特に、製品の市場品質上最も重要な
電極と外部導出線の結線状、態を厳密に検査することが
でき増々増大する電子機器の信頼性を格段に向上させる
ことが可能となる。
Effects of the Invention As described above, the present invention clearly distinguishes between manufacturing lot-to-manufacturing abnormalities and manufacturing abnormalities during the manufacturing process, making it possible to perform extremely accurate inspections. It is possible to rigorously inspect the connection state of electrodes and external lead wires, making it possible to significantly improve the reliability of the ever-increasing number of electronic devices.

【図面の簡単な説明】[Brief explanation of the drawing]

図釈は本発明の半導体装置の検査方法をVBE特性測定
値の分布によって表わしたものである。
The illustration represents the semiconductor device testing method of the present invention by the distribution of VBE characteristic measurement values.

Claims (1)

【特許請求の範囲】[Claims] 半導体素子を基板支持体に接着し、半導体素子の各電極
と外部導出線とを金属細線で連結した後、前記外部導出
線を通じて、接合順方向定電流電圧値を測定し、個々の
測定値と同一製造ロット内母集団の測定値平均値との差
を演算し、その演算値とあらかじめ設定した規格値とに
照らして良否を判定する半導体装置の検査方法。
After adhering the semiconductor element to the substrate support and connecting each electrode of the semiconductor element and an external lead wire with a thin metal wire, the junction forward direction constant current voltage value is measured through the external lead wire, and the individual measured values and A semiconductor device inspection method that calculates the difference between the measured value and the average value of a population within the same manufacturing lot, and determines the quality of the semiconductor device by comparing the calculated value with a preset standard value.
JP13079086A 1986-06-05 1986-06-05 Inspection of semiconductor device Pending JPS62286241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13079086A JPS62286241A (en) 1986-06-05 1986-06-05 Inspection of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13079086A JPS62286241A (en) 1986-06-05 1986-06-05 Inspection of semiconductor device

Publications (1)

Publication Number Publication Date
JPS62286241A true JPS62286241A (en) 1987-12-12

Family

ID=15042746

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13079086A Pending JPS62286241A (en) 1986-06-05 1986-06-05 Inspection of semiconductor device

Country Status (1)

Country Link
JP (1) JPS62286241A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6466577A (en) * 1987-09-07 1989-03-13 Nec Yamaguchi Ltd Apparatus for testing semiconductor device
US6810344B1 (en) 1999-11-11 2004-10-26 Kabushiki Kaisha Toshiba Semiconductor testing method and semiconductor testing apparatus for semiconductor devices, and program for executing semiconductor testing method
CN101992679A (en) * 2009-08-24 2011-03-30 上海华普国润汽车有限公司 Double planetary row four-axis hybrid power transmission device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6466577A (en) * 1987-09-07 1989-03-13 Nec Yamaguchi Ltd Apparatus for testing semiconductor device
US6810344B1 (en) 1999-11-11 2004-10-26 Kabushiki Kaisha Toshiba Semiconductor testing method and semiconductor testing apparatus for semiconductor devices, and program for executing semiconductor testing method
CN101992679A (en) * 2009-08-24 2011-03-30 上海华普国润汽车有限公司 Double planetary row four-axis hybrid power transmission device

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