JPS6116322A - Memory sharing system of display terminal equipment - Google Patents

Abstract

PURPOSE:To eliminate duplication of hardware to reduce the physical quantity by sharing a display memory and a data buffer memory in a display terminal equipment. CONSTITUTION:A memory system of the display terminal equipment consists essentially of one shared memory 22 and is provided with a control part 1 and a data converting part 3. The control part 1 receives display data and display command data sent from a high-order data processor and decodes them to control read/write the shared memory 22 and sends out display data form the shared memory 22. Six mode control operations such as display data output, etc. are always transmitted to a CRT display device to updata the display memory, read/write data from/on the data buffer memory, etc.; and for example, the control operation of display data output is performed by a command 1, and display data output and read/write of the display memory are performed by a command 2.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a memory sharing system for 5-display terminal devices, and particularly for display terminal devices having multiple memory configurations such as an image display memory and a data buffer memory. The present invention relates to a memory sharing method for display terminal devices that saves hardware space and eliminates redundant control circuits by sharing memory.

[Prior art]

A conventional display terminal device of this type will be explained with reference to FIG.

In the figure, C and / are control units that receive display data sent from a higher-level data processing device and perform processing such as writing them into memory, Y is a display memory, 3 is a data buffer memory, and Hiroshi is from a display memory. This is a data conversion unit that converts data.

The control unit 1 decodes commands and data sent from a higher-level data processing device, generates various timings for displaying data, and transmits and receives data to and from the display memo IJ2. A data converter that generates display data receives data from the one-display memory, converts it into data necessary for one-image display, and transmits the image display data to a CR8 display unit, monitor television, etc. as one-image display output. Further, the latest display data is always stored in the data backup memory 3 and can be output to a printer as necessary.

Hard copies are also available at any time.

In such conventional display terminal devices, the data buffer memory 3 existed independently as a hardware configuration equivalent to the display memory core. However, unlike display memory, this data baggage memory is not frequently read out, and in a configuration equivalent to one display memory, the hardware capacity is not fully utilized. There was a problem that the amount of hardware increases. Furthermore, since a control circuit similar to that of the display memory is required, there is a problem that the amount of hardware required for the apparatus is large.

[Summary of the invention]

The present invention was made to solve the above-mentioned problems, and includes a display data memory that stores display data;
Equipped with this display data memory address control circuit, multiple memory configurations such as one image display memory and data buffer memory can be configured by assigning a memory area to each ℃ by common display data memory address control. It is characterized by making the memory unique. This allows you to save hardware space and also.

It is also possible to eliminate redundant control circuits.

[The fruits of invention. Example]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a principle diagram of the configuration of a memory system of a display terminal device showing an embodiment of the present invention. The memory configuration in this display terminal device is mainly composed of one common shared memory. / is the control section.

Reference numeral 3 denotes a data conversion section which is similar to the memory system shown in FIG. The control unit 1 receives display data and 1 display command data sent from the upper data processing device, decodes this command data, performs read/write control to the shared memory λ according to its contents, and shares 1 display data. Sent from Memory Coco. That is, shared memo IJ,
2- is controlled by the control section 1 to accumulate 1 display data and output it via the data conversion section 3, or output the data directly. There are six modes for this operation as shown in the table below, and each control operation is performed as specified by the command. Table Command Control Contents / Display Data Output S Display Data Output + Display Memory Read/Write child data buffer memory read The control operations for these six modes are performed using C as one display data.
'In addition to being constantly transmitted to the RT display device, updating of one display memory and data backup memory reading/writing are performed.

For example, command 1 only controls the output of display data, while command CO outputs display data and reads/writes the display memory. FIG. 3 is a block diagram showing a detailed review of the memory system configuration of FIG. 1 together with peripheral circuits of the shared memory. In this figure 3,
yi, yi' are address conversion units for the display memory and data buffer memory, respectively; 32 selects either the display memory address or the data buffer memory address and supplies it to the left of the shared memory unit 3; Address selector 1. ? 3 is a data selector that selects either display memory data or data buffer memory data and supplies it to the shared memory section 35; 3 is a memory that decodes the command sent from the control section 1 and issues a control signal. control unit,
3! r is a shared memory section, and 36.degree. and 36' are conversion sections for converting output data into a predetermined format as required. The memory control section 3 decodes the command sent from the control section 1 and sends an address selector 72 to select addresses and data for the common memory section 35 as necessary. Controls the data selector 33. This allows reading and writing to the shared memory section J and CRT respectively.
Used as data for display on a display device, etc., and buffer data for making hard copies. In this shared memory section 3, a display memory area and a data buffer memory area are used by allocating addresses. This address control is achieved by setting the base addresses of the display memory area and data buffer memory area in the address conversion units 3/, 3/'.

3/' is performed by adding a set pace address to each address data sent and outputting the same address data.

〔Effect of the invention〕

As explained above, according to the present invention, in one display terminal device, the display memory and data buffer memory, which were conventionally configured independently, can be made common (by eliminating duplication of hardware, Physical quantities can be reduced.

[Brief explanation of drawings]

FIG. 7 is a block diagram of the memory configuration of a conventional display terminal device, FIG. 1 is a block diagram of the memory configuration showing the principle of the memory sharing method of the present invention, and FIG. 3 is a block diagram of the memory configuration of FIG. 1. FIG. 2 is a block diagram showing in detail the shared memory section in the figure together with peripheral circuits. In the figure, l is a control unit and c is a display memory. 3 is a data buffer memory, Hiro is a data converter, 2U is a common memory, and 3/ and J/' are address converters. 3 is an address selector, 33 is a data selector, 3 is a memory control section, Jj is a common memory section, and 36° and 36' are a data converting section. In each figure, the same reference numerals indicate the same or corresponding parts. Banknote 1 figure Leather figure 2 '72 M3 figure

Claims (1)

[Claims] The display data sent from the upper data processing device is stored in the image display memory and data buffer memory, and
A display terminal device for RT display and printer output includes a display data memory for accumulating display data and a display data memory address control circuit, and the image display memory and the data buffer memory are connected to a common display data memory address control circuit. A memory sharing method in a display terminal device, characterized in that the display data memory is divided and allocated to an image display memory area and a data buffer memory area, respectively.