JPS61151757A - Microprogram control device - Google Patents

Abstract

PURPOSE:To obtain a microprogram (muP) control device for preventing to lose the function of the control device reading by changing over to other side when one side of a reading/writing memory part stored, where two sets of muPs are stored, becomes an obstacle. CONSTITUTION:A reading/writing memory part selecting means 5 indicates an access to both memory access indications 6001 and 6002 of reading/writing memory parts 2 and 3 at the time of writing the data. At the time of reading the data, the access indication is executed to one side stipulated beforehand out of the memory access indications 6001 and 6002. When the detection of the error is informed by reading data error information 5001, thereafter, the other reading/writing memory part access indication is outputted. A control part 1, when the detection of the error is informed by reading data error information 5001, continues or starts an action over again by muP stored in the reading/writing memory part which is newly selected by its condition at the time of generating the error.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a microprogram control device.

(Prior Art) A conventional microprogram control device stores a microprogram for operating itself in at most one set of read/write storage units (read/write storage unit).

(Problems to be Solved by the Invention) In such a conventional configuration, if a failure occurs in the read/write storage unit, it will no longer be able to function, and the functions of the information processing device including the microprogram control device will deteriorate. However, there is a problem in that the system crashes and causes the system to go down.

Therefore, the object of the invention is to prepare two sets of read/write memory sections for storing microprograms, so that when a failure occurs in one read/write memory section, the other read/write memory section is By switching to read the microprogram, even if one of the two sets of read/write storage sections fails, the function as a microprogram control device will not be lost. The purpose is to provide a microprogram control device that does not require a microprogram control device.

(Means for Solving the Problems) To this end, the device of the present invention includes two sets of readable and writable storage units for storing microprograms each having the same content, and two sets of memory units that are readable and readable. a selection means for selecting a predetermined one of the storage sections and selecting both of the storage sections at the time of writing; and a selection means for checking read data from the storage section selected by the selection means and determining whether the read data is abnormal. The present invention is characterized by further comprising a check means for instructing the selection means to switch the storage unit to be selected at the time of reading from the previously selected group to another group when the storage unit is selected.

(Example) Next, the present invention will be explained in detail with reference to the drawings.

In FIG. 1 showing an embodiment of the present invention, this embodiment shows the following:
It is composed of a control section 1, two sets of read/write storage sections 2' and 3, a parity generation/check circuit 4, and a read/write storage section selection means 5.

The first set of read/write storage units 2 and the second set of read/write storage units 3 are addressed by the control unit 1 via an address bus 2001. The stored data is sent to the control unit 1 through the data bus 3001. ! ]! The distance between the output/write storage section 2 and the read/write storage section 3 is 9. Also, data bus 3
001, the parity data generated or checked by the parity generation/check circuit 4, which is the read data checking means, is transmitted to the parity generation/check circuit 4.001. It is exchanged between the read/write storage section 2 and the read/write storage section 3.

A memory access instruction 4001 from the control section 1 is input to the parity generation/check circuit 4 and the read/write storage section selection means 5. The read data error information 5001 from the parity generation/check circuit 4 is transmitted to the control unit 1 and the read/write
The data is input to the write storage section selection means 5.

A first set of read/write storage unit memory access instructions 6001 and a second set of read/write storage unit memory access instructions from the read/write storage unit selection means 5
A write storage unit memory access instruction 6002 is input to the read/storage unit 2 and the read/write storage unit 3, respectively.

The control unit 1 exchanges information with a host device or external storage via an external interface signal $1001.

The microprogram of this microprogram control device is read/written from the host device or external storage according to the address from the control unit 1 via the control unit 1 and data bus 3001 from the external interface signal line 1001. A transfer path is stored in the read/write storage unit 3.

The read/write storage unit 2 and the read/write storage unit 3 receive a read/write storage unit memory access instruction 6001 and a read/write storage unit, respectively.
When the write storage unit memory access instruction 60'o2 is input, it becomes active for the address bus 3001, and when there is no instruction, it becomes a high impedance state.

When writing data, the parity generation/check circuit 4
Generates write data and parity data, and connects data bus 3.
Send to 001. Also, when reading data, a parity check is performed on successive data, and if the read data is abnormal,
Error detection is output to read data error information 5001.

When writing data, the read/write storage section selection means 5 receives a read/write storage section memory access instruction 6001 and a read/write storage section memory access instruction 6001.
Access instructions are output to both write storage section memory access instructions 6002. Furthermore, when reading data, a read/write storage unit memory access instruction is output. When the detection of Sheller is notified by the read data error information 5001, an instruction to access the other read/write storage section is thereafter output.

When the control unit 1 is notified of the detection of Sheller by the read data error information 5001, it operates according to the microprogram stored in the read/write storage unit newly selected according to its own state at the time of error occurrence. Continue or redo.

(Effects of the Invention) As explained above, the present invention includes two sets of read/write storage sections in which microprograms are stored, and when a failure occurs in one read/write storage section, one set of read/write storage sections is provided. Other reading/
By configuring to use the write storage section, there is an effect that the reliability of the microprogram control device that functions by the microprogram can be improved.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention. 1... Control section, 2, 3... Read/write storage section, 4... Parity generation/check circuit,
5... Read/write storage section selection means. Hey)

Claims (1)

[Scope of Claims] Two sets of memory units that can be read and written to store microprograms having the same contents, and a predetermined set of the two sets of memory units are selected at the time of reading, and a predetermined set of the memory units is selected for writing. Selecting means for sometimes selecting both of the two sets of storage units, and checking the read data from the storage unit selected by the selecting means, and if the read data is abnormal, selects the selection unit at the time of reading to the selection means. 1. A microprogram control device comprising: checking means for instructing to switch the storage unit from the previously selected set to another set.