JPS61150243A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61150243A JPS61150243A JP27101084A JP27101084A JPS61150243A JP S61150243 A JPS61150243 A JP S61150243A JP 27101084 A JP27101084 A JP 27101084A JP 27101084 A JP27101084 A JP 27101084A JP S61150243 A JPS61150243 A JP S61150243A
- Authority
- JP
- Japan
- Prior art keywords
- package body
- glass
- cavity
- semiconductor device
- ceramic package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は通信装置、電子計算装置などの電子回路に用い
られる半導体装置に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a semiconductor device used in electronic circuits such as communication devices and electronic computing devices.
第3図は従来のデュアルインラインパッケージ型の半導
体装置を示す図であり、aは上面図、bは側面図、Cは
a図のc−c線における断面図である。これは図に示す
如(セラミックパッケージ本体lのキャビティ2に集積
回路のチップ3を収容し、リード4を挟んで蓋5をガラ
ス6で接着封止したものである。FIG. 3 is a diagram showing a conventional dual in-line package type semiconductor device, in which a is a top view, b is a side view, and C is a cross-sectional view taken along line c-c in diagram a. As shown in the figure, an integrated circuit chip 3 is housed in a cavity 2 of a ceramic package body 1, and a lid 5 is adhesively sealed with glass 6 with leads 4 sandwiched therebetween.
上記の構成のものにあっては、最近の千ノブの大型化に
伴ってキャビティ2の大きさを拡げるとガラス接合部の
長さlが短くなって接合強度が落ち、またガラス封止の
際の加熱により集積回路保護用の樹脂等から出るガスに
よりガラス部にピンホールが発生し易くなるという問題
があった。In the case of the above structure, when the size of the cavity 2 is expanded due to the recent increase in the size of the Sennobu, the length l of the glass joint becomes shorter and the joint strength decreases. There has been a problem in that pinholes are likely to form in the glass portion due to gas emitted from the resin used to protect the integrated circuit due to heating.
本発明は、上記問題点を解消した半導体装置を提供する
もので、その手段は、半導体集積回路のチップをキャビ
ティに収容したセラミックパッケージ本体にリードを挾
んでセラミック製蓋をガラスにて接着封止して成る半導
体装置において、ガラス封止部をセラミックパッケージ
本体の上面から側面に沿って底部に達するように設けた
ことを特徴とする半導体装置によってなされる。The present invention provides a semiconductor device that solves the above-mentioned problems, and its means include sandwiching leads in a ceramic package body in which a semiconductor integrated circuit chip is housed in a cavity, and adhesively sealing a ceramic lid with glass. The semiconductor device is characterized in that a glass sealing portion is provided from the top surface of the ceramic package body along the side surfaces to the bottom.
を作 用〕
上記半導体装置は、セラミックパッケージのガラス↑、
を止部をパッケージ本体の上面から側面に沿って設ける
・二とにより、パッケージ上面のガラス封止部分を短く
することかでき、キャビティを大きくとることができる
。またガラス封止部の長さはパッケージの側面を利用す
ることにより従来より長くなり、チップの樹脂保護膜等
より出ろガスによるピンホールの発生も抑圧することが
できる。] The above semiconductor device is made of ceramic package glass ↑,
By providing the stop portion along the top and side surfaces of the package main body, the glass sealing portion on the top of the package can be shortened and the cavity can be made larger. Furthermore, the length of the glass sealing part is made longer than before by utilizing the side surface of the package, and the generation of pinholes due to gas leaking from the resin protective film of the chip, etc. can be suppressed.
以下、図面を参照して本発明の実施例を詳細に説明する
。Embodiments of the present invention will be described in detail below with reference to the drawings.
第1図は本発明の一実施例を示す図であり、aは一ヒ面
図、bはa4のb−b綿における断面図、Cはa図のC
−’C線における断面図である。同図において1.10
はセラミックパッケージ本体、11はキャビティ、12
は集積回路のチップ、13はリード、14は蓋、15は
ガラスをそれぞれ示している。FIG. 1 is a diagram showing an embodiment of the present invention, in which a is a front view, b is a cross-sectional view taken along the line bb cotton of A4, and C is a cross-sectional view of C in FIG.
-' It is a sectional view taken along the C line. In the same figure, 1.10
is the ceramic package body, 11 is the cavity, 12
13 indicates an integrated circuit chip, 13 a lead, 14 a lid, and 15 a glass.
本実施例は第1図に示す如く、セラミックパッケージ本
体10はそのキャビティ11を大きく形成し、蓋14は
箱伏にしてその側面の壁をパノケ一シ本体IOの側面を
底部に達する千で覆ろよらに1[し、パッケ−ジ本体1
0のキャビティ11にチップ12を収容したのら、パ、
ろ一−シ本体10の−L面ル、び(tl1曲と蓋14の
内側との間にり一ド13を挟んでガラス15に、Vり接
着せ11−シたものである。In this embodiment, as shown in FIG. 1, the ceramic package main body 10 has a large cavity 11, and the lid 14 is boxed up and its side walls are covered with a panoply. 1 [Package body 1]
When the chip 12 is accommodated in the cavity 11 of 0,
The -L surface of the filter body 10 is glued to the glass 15 with a gap 13 between the loop and the inside of the lid 14.
このように構成されl二本実施例は、ガラスN +1部
をパッケージ本体10の側面まで延■−することにより
、[一部の水パ[部分の巨さpを従来に比して短くする
ことかでき、それによりキャビう−イ11を大きくする
ことかできろ。またガラス村11一部は水平部分を短く
しても垂直部分を加えた全体の長さは従来に比して長<
jKろため、封111部の接着強度が向トすると共に
、ガラス封1ト時の力11熱によりチップ保護用樹脂膜
等から出るガスの11:力に月向し易くなり、ピンホー
ルの発生を抑えろことができる。In this embodiment, constructed as described above, by extending the glass N+1 part to the side surface of the package main body 10, the size of the part of the glass part can be made shorter than the conventional one. Is it possible to do this, and thereby make the cab 11 larger? In addition, even if the horizontal part of some parts of Glass Village 11 is shortened, the total length including the vertical part is longer than before.
Due to the filtration, the adhesive strength of the seal 111 decreases, and the gas released from the resin film for protecting the chip due to the force 11 heat generated when the glass seal is sealed becomes more susceptible to the force, resulting in the generation of pinholes. You can suppress it.
第2図は本発明の他の実施例を示す図であり、aは上面
図、bはaしIのb−b線における断面図、Cはa図の
c−c綿における断面図である。同図において第1図と
同一部分は同一符号を付して示した。FIG. 2 is a diagram showing another embodiment of the present invention, in which a is a top view, b is a cross-sectional view taken along line bb of a-I, and C is a cross-sectional view taken along c-c cotton in figure a. . In this figure, the same parts as in FIG. 1 are designated by the same reference numerals.
本実施例が前実施例と異なるところは、114の側面の
壁を長手方向のみとしたことである。このように構成さ
れた本実施例は、キャビティ11の大きさを従来に比し
て横方向にのみ拡大することができる。なお他の効果は
前実施例と同様である。This embodiment differs from the previous embodiment in that the side walls 114 are formed only in the longitudinal direction. In this embodiment configured in this way, the size of the cavity 11 can be increased only in the lateral direction compared to the conventional one. Note that other effects are the same as in the previous embodiment.
以上説明したように本発明によれば、セラミックパッケ
ージのカラス封止部をパッケージ本体の上面から側面に
沿って設けることにより、パッケージ−上面のガラス封
止部分の長さを短くすることができ、キャビティを大き
くとることができ・る。As explained above, according to the present invention, by providing the glass-sealed portion of the ceramic package along the side surface from the top surface of the package body, the length of the glass-sealed portion on the top surface of the package can be shortened. The cavity can be made larger.
またガラス封止部の長さは、パッケージの側面を利用す
ることにより従来より長くなるため、゛ガラス封止用の
加熱時にチップの樹脂保護膜等より出るガスによるピン
ホールの発生を防止することができる。In addition, the length of the glass sealing part is longer than before by using the side surface of the package, so it is possible to prevent the formation of pinholes due to gas emitted from the resin protective film of the chip during heating for glass sealing. Can be done.
第1図は本発明の半導体装置の一実施例を説明するため
の図、第2図は本発明の他の実施例を説明するための図
、第3図は従来の半導体装置を説明するための図である
。
図中、10はセラミックパッケージ本体、11はキャビ
ティ、12は集積回路のチップ、13はリード、14は
蓋、15はガラスをそれぞれ示す。FIG. 1 is a diagram for explaining one embodiment of the semiconductor device of the present invention, FIG. 2 is a diagram for explaining another embodiment of the present invention, and FIG. 3 is a diagram for explaining a conventional semiconductor device. This is a diagram. In the figure, 10 is a ceramic package body, 11 is a cavity, 12 is an integrated circuit chip, 13 is a lead, 14 is a lid, and 15 is a glass.
Claims (1)
ラミックパッケージ本体にリードを挟んでセラミック製
蓋をガラスにて接着封止して成る半導体装置において、
ガラス封止部をセラミックパッケージ本体の上面から側
面に沿って底部に達するように設けたことを特徴とする
半導体装置。1. In a semiconductor device consisting of a ceramic package body in which a semiconductor integrated circuit chip is housed in a cavity, a ceramic lid is adhesively sealed with glass, with leads sandwiched between them.
A semiconductor device characterized in that a glass sealing portion is provided from the top surface of a ceramic package body along the side surfaces to the bottom.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27101084A JPS61150243A (en) | 1984-12-24 | 1984-12-24 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP27101084A JPS61150243A (en) | 1984-12-24 | 1984-12-24 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61150243A true JPS61150243A (en) | 1986-07-08 |
Family
ID=17494151
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP27101084A Pending JPS61150243A (en) | 1984-12-24 | 1984-12-24 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61150243A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100868593B1 (en) | 2005-12-06 | 2008-11-13 | 야마하 가부시키가이샤 | Semiconductor device and manufacturing method thereof |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5561291A (en) * | 1978-11-01 | 1980-05-08 | Tlv Co Ltd | Driving device by motor |
JPS56129803A (en) * | 1980-02-19 | 1981-10-12 | Gen Atomic Co | Position indicator |
JPS59138912A (en) * | 1983-01-31 | 1984-08-09 | Toshiba Corp | Apparatus for detecting opening degree of isolating valve of main vapor |
-
1984
- 1984-12-24 JP JP27101084A patent/JPS61150243A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5561291A (en) * | 1978-11-01 | 1980-05-08 | Tlv Co Ltd | Driving device by motor |
JPS56129803A (en) * | 1980-02-19 | 1981-10-12 | Gen Atomic Co | Position indicator |
JPS59138912A (en) * | 1983-01-31 | 1984-08-09 | Toshiba Corp | Apparatus for detecting opening degree of isolating valve of main vapor |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100868593B1 (en) | 2005-12-06 | 2008-11-13 | 야마하 가부시키가이샤 | Semiconductor device and manufacturing method thereof |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR880003419A (en) | Semiconductor devices | |
SG60102A1 (en) | Lead frame semiconductor package having the same and method for manufacturing the same | |
TW344870B (en) | Semiconductor package and manufacturing method of lead frame | |
JPS61150243A (en) | Semiconductor device | |
JPS6148945A (en) | Hibrid ic module | |
JP2006216950A (en) | Substrate with slot | |
JPS58121652A (en) | Hybrid integrated circuit device | |
JP2003318654A (en) | Quartz oscillator for surface mounting | |
JPH083059Y2 (en) | Piezoelectric vibration parts | |
JPH0431260A (en) | Seal structure for semiconductor packaging material | |
JPS6056297B2 (en) | Airtight mounting structure for integrated circuit elements | |
JPH01123428A (en) | Resin sealed semiconductor device | |
JPH01220837A (en) | Semiconductor integrated circuit device | |
JPS5680148A (en) | Semiconductor device | |
JPH02134832A (en) | Method of molding integrated circuit chip | |
JPH01155643A (en) | Integrated circuit device using ceramic package as external packaging | |
JPS6218049Y2 (en) | ||
JP2622211B2 (en) | Semiconductor pressure sensor | |
JPS62108545A (en) | Printed substrate type package | |
JPH0464255A (en) | Semiconductor device | |
JPS614251A (en) | Semiconductor package | |
JPH06138072A (en) | Micro-sensor | |
JPH01114061A (en) | Semiconductor package | |
KR940010292A (en) | Semiconductor package | |
JP2001102714A (en) | Resin encapsulated printed wiring board |