JPS61147533A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To suppress the damage of an element to the minimum limit by forming an SiO2 film under an Si3N4 film by a vapor phase growing method. CONSTITUTION:A hole for drawing an electrode is formed at an SiO2 film 8 formed on the surface of a substrate. An SiO2 film 14 is entirely grown by a vapor phase growing method, and an Si3N4 film 10 is grown by a reduced pressure vapor phase growing method. Then, the films 10, 14 of the hole are removed by dry etching to form holes. The, electrodes 11, 12, 13 are formed. Since the SiO2 film under the Si3N4 film is formed by a vapor phase growing method, the thickness of the SiO2 film of the hole of the diffused region is the same.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of patterning an integrated circuit, and more particularly to a method of dry etching a 5isNa film.

[Conventional technology]

As the performance of semiconductor integrated circuits improves, pattern sizes are becoming smaller year by year. Among the fine pattern processing techniques, the most important technique is the etching technique. In conventional solution (wet) etching, 5in2 and M can be etched using a photoresist, which is a polymeric material, as a mask, but in the case of 5isN4 and polycrystalline silicon, the resist has poor resistance to the solution during etching. The method shown in FIGS. 2(a) to 2(e) is used. That is, in order to improve adhesion, in the case of polycrystalline silicon, the surface is oxidized, and in the case of the Si3N4 film 30, the entire SiO2 film 38 is grown by vapor phase growth, and a photoresist 31 is formed. Next, as shown in FIG. 2(b), a photoresist 3 is applied.
1 as a mask, the 5in2 film 38 is etched. Then, as shown in FIG. 2(e), rLfcS is formed.
This required an extremely complicated process of etching the polycrystalline silicon or Si3N4 film again with a solution using the iOz film 38 as a mask.

Furthermore, etching of Si3N4 film is usually carried out at 160°C.
Etching is performed using hot phosphoric acid (H3PO) before and after the etching process, but the rate of etching fluctuates due to changes in the amount of water contained in the phosphoric acid, and the high temperature makes handling dangerous.

Therefore, dry etching has been proposed in place of wet etching. FIGS. 3(a) and 3(b) are cross-sectional views shown in the order of steps to explain conventional dry etching. As shown in FIG. 3(a), in dry etching, the Si3N4 film 30 is etched using the resist 31 as a mask.
Since the photoresist mask can be directly etched, the photoresist mask is formed directly on the 5isN4 film. In other words, the manufacturing process can be simplified. At the same time, the dimensional accuracy of pattern processing improved, and since no solution was used, there were fewer pollution problems, so it rapidly came into use. FIG. 3(b) is a sectional view after etching.

Si3N4 is widely used as a mask and material for selective oxidation in LOCO8, and as a pad page attack film on the Hellet surface. In addition, a structure shown in FIG. 4(e) has been proposed for the purpose of preventing characteristic fluctuations due to heavy metal contamination. This is to prevent heavy metal contamination by covering the surface of a thermal SiO2 film 90 with a 5iaN4 film 10 grown by low pressure vapor phase growth or the like.

FIGS. 4(a) to 4(e) are cross-sectional views shown in order of steps to explain the conventional method of manufacturing the semiconductor device shown in FIG. 4(e).

First, the structure shown in FIG. 4(a) shows a state in which regions that will become the base, emitter, and collector of a general NPN transistor are formed. In the figure, 1 is a P-type semiconductor substrate;
2 is an N-type high concentration buried layer, 3 is an N-type epitaxial layer, 4
is P-type isolation In, 5 is P-type base region, 6 is N-type emitter region, 7 is N-type collector electrode extraction region, 8 is St
It is an ow film.

Next, as shown in FIG. 4(b), openings for leading out the electrodes are provided in the SiO2 film 8.

Next, as shown in FIG. 4(e), an SiOg film 9 of 500A or less is formed in the opening by oxidation, and a 1lJsisN4 film 10 is further grown by low pressure vapor deposition.

The Stow film 9 is provided to prevent the crystallinity of the Si surface from deteriorating when the Si3N4 film is grown directly on St 2 . The SiOz film 9 is generally formed by oxidation at a relatively low temperature of around 900°C.

Next, as shown in FIG. 4(d), the Si3N4 film 10 and the Sing film 9 in the openings are dry etched using the resist as a mask. 5isN4 or 8i (h is CF4+0
Etching is performed by a plasma etching method using 2 or a glue active ion etching method using CF4+H2.

Next, as shown in FIG. 4(e), M or the like is attached to form an electrode.

In the figure, 11 is an emitter electrode, 12 is a base electrode,
13 is a collector electrode.

[Problem that the invention seeks to solve]

The underlying S of the Si3N4 film 10 formed in FIG. 4(e)
The iO2 film 9 has different thicknesses above the opening in the emitter region and above the opening in the base region. The upper part of the emitter opening is S.
The ioz film becomes thicker. For example, the surface impurity concentration is I
When an emitter region of 10"cm-3 and a base region with a surface impurity concentration of I x 10110l8'i are oxidized in a dry atmosphere at a temperature of 900°C, the thickness of the SiO2 film formed on the surface of the emitter region is ': :300A.

Further, the surface of the base region becomes Th100A.

Therefore, when the 5ixN4 film 10 and the SiO2 film 9 are dry-etched, when the opening in the emitter region is just etched, the opening in the base region is already over-etched.

Further etching is usually performed because the opening in the emitter region must be completely etched. The openings in the base region are therefore significantly overetched and the Si surface is severely attacked. This is unfavorable in terms of characteristics and reliability.

SUMMARY OF THE INVENTION An object of the present invention is to provide a dry etching method for a 5isNa film that eliminates the above-mentioned drawbacks and easily reduces damage to devices.

[Means for solving problems]

The method for manufacturing a semiconductor device of the present invention includes the step of providing a contact opening in a first SiO2 film covering the surface of a semiconductor substrate on which an element is formed, and the step of providing a contact opening on the surface of the semiconductor substrate provided with the opening. A step of forming a second 5iO2pi film by a phase growth method, and a step of forming a Si3N4 film on the surface of the second SiOz film.
A step of forming a film, and a step of forming the Si formed in the opening.
The method includes a step of forming openings in the 3N4 film and the second SiO2 film by dry etching.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings. FIGS. 1(a) to 1(e) are cross-sectional views shown in order of steps to explain an embodiment of the present invention.

First, as shown in FIG. 1(a), an emitter region 6, a space region 5, and a collector electrode lead-out region 7 of a general NPN transistor are formed, and an Si02 film 8 formed on the substrate surface including the regions is formed. The figure shows a state in which an opening for drawing out the electrode is provided.

In addition, other reference numerals are given to the same parts as in the conventional example.

Next, as shown in FIG. 1(b), 5
The in2 film 14 is grown to a thickness of about 300A over the entire surface, and the 5iaN4 film 10 is further grown by low pressure vapor phase growth or the like.

Next, as shown in FIG. 1C, the Si3N4 film 10 and SiO2 film 14 in the opening are removed by dry etching using the resist as a mask to form an opening.

Next, as shown in FIG. 1(d), after depositing an electrode metal such as M, an emitter electrode 11, a pace electrode 12, and a collector electrode 13 are formed to complete the present embodiment.

〔Effect of the invention〕

As explained above, according to the present invention, since the SiO2 film underlying the Si3N4 film is formed by vapor phase growth, the thickness of the 5tOz film at the opening of the diffusion region is the same. Therefore, even if the Si3N4 film and the 5t(h film) in the opening are dry-etched, damage to the element can be kept to a minimum.

[Brief explanation of drawings]

FIGS. 1(a) to (d) are cross-sectional views shown in the order of steps to explain an embodiment of the present invention, FIGS. 2(a) to (C), and FIGS. 3(a) and (b). 4 are cross-sectional views shown in the order of steps to explain the conventional wet etching and dry etching methods, and FIGS. It is. l...P-type semiconductor substrate, 2...N-type high concentration buried layer, 3...N-type epitaxial layer, 4
...P type separation layer, 5 ... P type base region, 6 ... N type emitter region, 7 ...
N-type collector electrode extraction area, 8...5i0
2 vs 9...Thermal SiO2 film, 10...
...5isN4 film, 11...emitter electrode,
12...Pace electrode, 13...Collector electrode, 14...CVDSiO2 film. ￥1j) 1 sub-mochi 2 times Hayabusa 31ffl) 4 times

Claims (1)

[Claims] A first SiO layer covering the surface of the semiconductor substrate on which the element is formed.
_2 A step of providing a contact opening in the film, and a step of forming a second contact hole on the surface of the semiconductor substrate provided with the opening by vapor phase growth.
a step of forming a second SiO_2 film;
a step of forming a Si_3N_4 film on the surface of the film; and a step of forming the Si_3N_4 film formed in the opening and the second
A method for manufacturing a semiconductor device, comprising the step of forming an opening in the SiO_2 film by dry etching.