JPS61144856A - Semiconductor device - Google Patents

Abstract

PURPOSE:To make the parasitic resistance subsequent to the electric current concentration 0 at the silicide contact part, by a method wherein the silicide contact part is formed on the whole two vertical side of a Si film resistance body so that the electric current concentration may not occur at the contact part. CONSTITUTION:An Si substrate 1 and a polycrystal Si film resistance body 3 are electrically separated by an SiO2 film 2, and the upper surface of resis tance body is covered by a film 4. An opening 5 for an electrode is provided on a film 4 near both ends of this resistance body 3, and at this part the resistor 3 is replaced with a platinum silicide 9. The interface 10 of this silicide 9 and the resistance body 3 is nearly perpendicular to the interface of the resistance body 3 and the film 4. The silicide 9 is connected to an Al electrode wiring 6 at the opening part. This silicide 9 is a material having small electric resis tance rate, and a metallic electrode wiring 12 seems to have nearly the same electric patential. Accordingly, the electric concentration does not occur, and the parasitic resistance subsequent to this does not exist.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a semiconductor device, and particularly to a resistor with low contact resistance when a highly accurate resistance value is required.

[Background technology]

Conventionally, diffusion resistors and polycrystalline silicon resistors have been mainly used as resistors in semiconductor packages. These resistors have a structure in which an insulating film is formed on the resistor, and a part of the insulating film is opened and metal wiring is brought into contact with the resistor, allowing current to flow from one metal wiring to the other metal wiring through the resistor. The required resistance value can be obtained by flowing .

6 and 7 are a longitudinal sectional view and a simplified plan view of essential parts, respectively, showing an example of a conventional polycrystalline silicon resistor.

In these figures, 1 is a silicon substrate, and a KSi01 film 2 and a polycrystalline silicon film 3 are formed on this silicon substrate 1.
are formed in a commonly known manner. An opening 5 is provided in the fcSiO2 film 4 formed thereon, and the AJ electrode wiring 6 is connected through this opening 5.

In a polycrystalline silicon resistor having such a configuration, the resistance value is considered to be the sum of the resistance values of the following first to third terms, since the resistance of the metal portion is sufficiently low.

1. Distance between openings L (cm) * Width w (cm 1,
Polycrystalline silicon film resistor 3 with sheet resistance ρS [Ω/port]
The electrical resistance of is given by ρs L / W.

2. When a current flows into or out of the polycrystalline silicon film resistor 3 from the AI electrode wiring 6, the current path passes through the opening 5.
At the end of the Alt ultra-fine wiring 6 in contact with the crystalline silicon film resistor 3, the electrical resistance generated by the concentration K as shown by the lines of electric force 7 in FIG. 8 is the polycrystalline silicon film resistance. If the thickness of the body 3 is a and the width of the opening 5 is ignored, then approximately 2ρ5aaln4/W is obtained. In here represents a natural logarithm. In FIG. 8, 8 is an equipotential line, which is indicated by a dotted line.

3. There is an interface electrical resistance when a current crosses the interface between the metal of the AI electrode wiring 6 and the polycrystalline silicon of the polycrystalline silicon film resistor 3. This interfacial electrical resistance is determined by the metal material, the impurity concentration on the surface of the polycrystalline silicon film, and the opening size C, but has not been formulated yet.

For these resistance values, refer to Chung-Yu Ting
“Study of the contact
ts of diffused resisto
r” (Som d 5tate Electronics
Pergamon Press 1971°Vol
14. PP, 433-438)).

Of the three terms above, the second term, which can also be called parasitic resistance, is I
! The electrical resistance in term 3 changes depending on the surface impurity concentration of the polycrystalline silicon film resistor 3 and the dimension C of the opening 5, so it is difficult to control with high precision, and it also changes with the increasing integration and miniaturization of devices. The ratio of the second term to the M1 term, which is absent, increases, making it difficult to realize a resistance value as designed. For example, if the length L is 4 μm, the width W is 2 μm, the sheet resistance ρS is 300 Ω, and the thickness a of the polycrystalline silicon film is 0.3 μm, the resistance of the first term is 600 Ω, and the resistance of the second term is 600 Ω. The total resistance of the electrodes is 250Ω, and the resistance value of the second term reaches 42% of the resistance value of the first term. Further, the third term, the interfacial electrical resistance, is detailed as follows. That is,
In the opening 5, the AJ electrode of the AJ electrode wiring 6 is attached to the upper surface of the polycrystalline silicon film of the polycrystalline silicon film resistor 3. This interface is unstable in terms of cleanliness, and the polycrystalline silicon film near the interface The impurity concentration inside is not stable. Furthermore, it is difficult to control the dimension C of the opening 5 with high precision;
The contact area (interface area) between the polycrystalline silicon film resistor 3 and the AI electrode of the AI electrode wiring Is6 in the opening is unstable. Therefore, the variation in interfacial resistance is large, making it difficult to achieve the designed resistance value as described above.

Furthermore, A at the opening 5! The concentration of the Kl flow at the end of the contact portion between the electrode rim 6 and the polycrystalline silicon film resistor 3 causes the electrode portion to become disconnected due to electromigration.

[Purpose of the invention]

An object of the present invention is to provide a resistor having an electrical resistance value with surface accuracy.

Another object of the present invention is to prevent current concentration from occurring at the contact portion, to reduce parasitic resistance at the contact portion to zero, and to prevent disconnection of the electrode portion due to electromigration. Our goal is to provide resistors.

Another object of the present invention is to provide a resistor with Kl,7' that reduces variations in interfacial resistance at the interface between a silicon film and an electrode.

Another object of the invention is to provide a resistor with low contact resistance.

Another object of the present invention is to provide a resistor that can contribute to high integration in integrated circuits.

The above and other objects and novel features of the present invention are:
It will be clear from the description of this specification and the accompanying drawings.

[Summary of the invention]

A brief overview of typical inventions disclosed in this application is as follows.

In other words, silicide contact portions are formed on both vertical sides of the polycrystalline silicon film resistor so that the lines of electric force within the polycrystalline silicon film resistor are straight. This eliminates concentration, reduces the resulting parasitic resistance at the contact part to zero, prevents disconnection of the electrode part due to electromigration silicon, and further reduces variation in the interfacial resistance of the contact part, resulting in low contact resistance. It is possible to obtain highly accurate electrical resistance values and contribute to higher integration in integrated circuits.

〔Example〕

#! FIG. 1 shows an embodiment of a semiconductor device, particularly a polycrystalline silicon resistor, according to the present invention, and FIGS.
An embodiment of the manufacturing method shown in FIG. 5 is shown, and FIG. 5 shows electric lines of force in a polycrystalline silicon resistor according to the present invention.

The present invention will be explained below using FIGS. 1 to 5. In FIGS. 1 to 5, the same or equivalent parts as in FIGS. 6 and 8 are given the same reference numerals. In FIG. are electrically isolated by a SiOx film 2, and the upper surface of the polycrystalline silicon M resistor 3 is covered with a film 4 containing S10. Near both ends of this polycrystalline silicon film resistor 3, electrode openings 5 are provided in the film 4.
In this part, the polycrystalline silicon film resistor 3 is replaced with platinum silicide (Pt@5i) 9. This Pt@Si
The interface 10 between the polycrystalline silicon film resistor 3 and the polycrystalline silicon film resistor 3 is substantially perpendicular to the interface between the polycrystalline silicon film resistor 3 and the Sin@ film 4 .

PT on the entire vertical both sides of the polycrystalline silicon film resistor 3
・Ma-fCPt・ which has a shape in which Si9 is formed.
Si9 is connected to the AJ electrode wiring 6 through the opening 5.

The polycrystalline silicon resistor having Km is manufactured as follows.

That is, first, as shown in FIG. 2, a 5-ins film 2 and a polycrystalline silicon film resistor 3 are formed on a silicon substrate 1 by a commonly known method, and then 840111! I4
810. at two locations on both sides of the polycrystalline silicon resistor 3. Membrane 4 is etched to provide openings 5. Furthermore, the surface of the polycrystalline silicon film resistor 3 in the opening 5 is partially etched, and the remaining film thickness of the polycrystalline silicon film resistor 3 is set to b as shown in the figure.

Next, as shown in Figure 3, platinum (
Pt ) is deposited to form P tMl 1.

The thickness of this Pt film 11 needs to be thicker than the remaining thickness of the polycrystalline silicon film resistor 3 in order to perform complete silicidation later.

Annealing at 1K500℃ or higher using O, gas (or N).

gas) for several tens of minutes. As a result, where the polycrystalline silicon of the polycrystalline silicon film resistor 3 and the Pt of the PT film 11 directly touch each other in the opening 5, platinum silicide (Pt1181) 9 is formed as shown in FIG. If the fc film thickness relationship is maintained, the polycrystalline silicon of the polycrystalline silicon film resistor 3 directly under the opening 5 will be completely silicided and will change to Pt-8i9. After this, nitric acid (HNO), hydrochloric acid ( H (1) and water (H, O
) was used to remove only pt[11], and an Al film was deposited and patterned using a commonly known method, thereby forming the desired AJ electrode wiring 6 as shown in FIG. polycrystalline silicon resistors are made.

The polycrystalline silicon resistor 3 shown in FIG.
This means that the gold II% electrode wiring 12 consisting of the and AI electrode wiring #6 are electrically connected.

And on the side of polycrystalline silicon expanded resistor 3? The touching Pt-8i (platinum silicide) is a material with low electrical resistivity, and the metal electrode #12 can be considered to have approximately the same potential. Therefore, when a current is applied, since PtaSi9 has approximately the same potential, the lines of electric force 7 at that time become approximately linear as shown in FIG. Parasitic resistance 5 does not exist, and disconnection of the electrode portion due to electromigration does not occur (this improves the reliability of the electrode. That is, P
The interface 10 between the t#Si9 and the polycrystalline silicon film resistor 3 is formed by platinum C, which was originally inside the polycrystalline silicon film.
It is formed as a result of an alloy reaction between Pt) and polycrystalline silicon. Therefore, such an interface is cleaner than the interface when the upper surface KA of the polycrystalline silicon film of the polycrystalline silicon film resistor 3/AJ of the electrode wiring 6 is deposited as shown in FIG. 6 of the conventional example. The impurity concentration in the nearby polycrystalline silicon film is also stable.

Furthermore, the area of this interface is (width W of the polycrystalline silicon film resistor) x (opening width C of the SiOz film 4
), whereas in the present invention, (width W of polycrystalline silicon film resistor 30) x (thickness a of polycrystalline silicon film resistor 3)
) is determined. Therefore, since controlling the thickness a of the polycrystalline silicon film resistor 3 is easier than controlling the aperture width C of the 5iOv film 4, in the present invention, the polycrystalline silicon film resistor 3 and the pt-8
Contact area of i9 (silicide electrode) (area of interface 10)
is stable.Thus, due to the above two stability factors, the variation in interfacial resistance is reduced in the embodiment shown in FIG.

From the above, the electrical resistance value of the polycrystalline silicon resistor in the semiconductor device is determined by the photomask dimensions (determine the length L and width W of the polycrystalline silicon film resistor 3) and the polycrystalline silicon film resistor 3.
the electrical resistance value of the first term determined by the sheet resistance ρS of;
It is only the sum of the photomask dimension (which determines the width W of the polycrystalline silicon film resistor 3), the thickness a of the polycrystalline silicon film resistor 3, and the interfacial resistance value of the third term determined by the electrode material.

Therefore, the accuracy of the resistance value of the resistor is significantly improved.

Even with the minute resistors required in fCLSI, the parasitic resistance (electrical resistance in item 2 above) due to current concentration at the contact area is eliminated, and the parasitic resistance at the contact area is greatly reduced (low contact resistance). ), it is possible to achieve a lower resistance value with high precision than conventional methods. Note that when it is desired to further reduce the electrical resistance value in the WJ1 term, the conventional method solves the problem by increasing the width W of the polycrystalline silicon film resistor 3. In contrast, in the present invention, the resistance value can be reduced by proceeding with silicidation in the direction of arrow 13. In this case, for example, the film thickness shown in FIG. 2 can be reduced by etching, or the film thickness shown in FIG. The amount of Pt buried in the etched recess of the polycrystalline silicon film resistor 3 shown in FIG. By adjusting the time of ゜annealing in gas), a desired lower resistance value can be obtained. [Effects] (1) Silicide contact portions are formed on the entire vertical sides of the silicon film resistor. When the silicon film resistor is formed and a current is applied, the lines of electric force within the silicon film resistor become linear, which eliminates current concentration at the contact area, and reduces parasitics at the contact area. It is possible to reduce the resistance to zero, prevent disconnection of the electrode portion due to electromigration shimming, and improve the reliability of the electrode.

(2) Since the interface between the silicon film resistor and the electrode is formed as a result of an alloying reaction, the interface is cleaner than conventional interfaces, and the impurity concentration in the silicon film near the interface is also stable. K. The area of the interface is also more stable than that of the prior art because the thickness of the silicon film resistor can be easily controlled with high precision, so fluctuations in the interface resistance can be reduced.

(3) The electrical resistance value is only the sum of the electrical resistance value determined by the length, width, and sheet resistance ρS of the silicon film resistor and the interfacial electrical resistance value, making it possible to provide a resistor with a highly accurate electrical resistance value. Even with the minute resistor required for 41LSI, the parasitic resistance due to current concentration at the contact part can be reduced to zero, and the parasitic resistance at the contact part can be significantly reduced (low contact resistance can be achieved). It is possible to achieve high accuracy down to a lower resistance value than before.

(5) By controlling (shortening) the length of the silicon film resistor by controlling the silicided region, the electrical resistance of the resistor can be controlled to be small.

(6) It becomes easy to design the resistance value.

(This can be applied to higher integration in integrated circuits such as 71LSI.

Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the above Examples and can be modified in various ways without departing from the gist thereof. Nor. For example, although a Sin film 2.4 is used in FIG. 1, any insulating film such as a Si3N4 film may be used. Further, although a polycrystalline silicon film is used for the resistor 3, a single crystal silicon film may be used. The silicide forms Pt@Si (platinum silicide) 9, but other metals such as Mo, Ti, and W are used to form the metal silicide (MoSi2゜TiSi, WS).
i, etc.).

[Application field]

゛ In the above explanation, the invention made by the present inventor was mainly applied to the application field of semiconductor snowmaking such as integrated circuits, which is the background field of application. It can also be applied alone.

[Brief explanation of drawings]

FIG. 1 is a longitudinal sectional view showing an embodiment of the polycrystalline silicon resistor according to the present invention, FIGS. 2 to 4 are process sectional views showing an embodiment of the manufacturing method of FIG. 1, and FIG. A cross-sectional view showing lines of electric force in a polycrystalline silicon resistor according to the present invention, FIG. 6 is a longitudinal cross-sectional view showing an example of a conventional polycrystalline silicon resistor, and FIG. 7 is a simplified plan view of the essential parts of FIG. 6. , FIG. 8 is a simplified cross-sectional view showing lines of electric force of the polycrystalline silicon resistor of FIG. 6, 3... polycrystalline silicon film resistor, 5... opening, 6
...AJ electrode wiring, 7... Lines of electric force, 8... Equipotential lines, 9... Pt@Si (platinum silicide), 1o.
...Interface, 11...Pt film, 12...metal electrode wiring. /""-", Agent Patent Attorney Akio Takahashi,)-to,/ Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

Claims: 1. A semiconductor device having a silicon film resistor, characterized in that the silicon film resistor substantially in the contact hole portion is entirely silicided in the vertical direction. 2. The semiconductor device according to claim 1, wherein polycrystalline silicon is used as the silicon film resistor. 3. The semiconductor device according to claim 1, wherein single crystal silicon is used as the silicon film resistor. 4. A semiconductor device according to any one of claims 1 to 3, which is formed of a silicide of a metal such as platinum, molybdenum, or titanium.