JPS61140154A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61140154A JPS61140154A JP59260750A JP26075084A JPS61140154A JP S61140154 A JPS61140154 A JP S61140154A JP 59260750 A JP59260750 A JP 59260750A JP 26075084 A JP26075084 A JP 26075084A JP S61140154 A JPS61140154 A JP S61140154A
- Authority
- JP
- Japan
- Prior art keywords
- fiber
- substrate
- semiconductor device
- fibers
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/145—Organic substrates, e.g. plastic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔技術分野〕
本発明はペレット取付基板に関し、半導体装置の信顛性
向上に適用して有効な技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a pellet mounting board, and relates to a technique that is effective when applied to improving the reliability of semiconductor devices.
（背景技術〕
半導体装置のコスト低減に有効な手段の１つに、パッケ
ージの全部または一部を樹脂で形成することが考えられ
る。(Background Art) One effective means for reducing the cost of semiconductor devices is to form all or part of a package from resin.
前記パッケージを形成するに適した材料に、いわゆる繊
維強化樹脂がある。Materials suitable for forming the package include so-called fiber-reinforced resins.
繊維強化樹脂の１つであるガラス繊維強化エポキシ樹脂
（以下、ガラスエポキシという、）は、通常布織されて
いるガラス繊維に未硬化エポキシ樹脂を含浸させた後、
加圧下で加熱して硬化反応を行わせると同時に、板状等
の所定形状に成形することにより形成することができる
ものである。Glass fiber-reinforced epoxy resin (hereinafter referred to as glass epoxy), which is one type of fiber-reinforced resin, is produced by impregnating uncured epoxy resin into glass fibers, which are usually woven into cloth.
It can be formed by heating under pressure to cause a curing reaction and at the same time molding it into a predetermined shape such as a plate shape.
前記ガラスエポキシを板状に形成してなるもの
。A product formed by forming the glass epoxy into a plate shape.
.
を所定形状に裁断し、その所定部にベレット取付用の凹
部であるキャビティを穿設してペレット取付基板である
パフケージｌ［を形成し、該基板を用いて半導体装置を
形成することができる、ところが、前記の如くガラスエ
ポキシ樹脂の内部には縦および横方向に延長するガラス
繊維が埋設されており、該繊維と樹脂との接着界面は僅
かではあるが水分が浸透する性質を存している。is cut into a predetermined shape, a cavity for pellet attachment is formed in a predetermined portion thereof to form a puff cage l[, which is a pellet attachment substrate, and a semiconductor device can be formed using the substrate. However, as mentioned above, glass fibers extending vertically and horizontally are buried inside the glass epoxy resin, and the adhesive interface between the fibers and the resin has the property of allowing moisture to penetrate, albeit slightly. .
したがって、前記の如きパフケージ基板を用いて半導体
装置を形成する場合は、該基板の側面より前記凹部にま
で水分が浸透していき、該凹部に取り付けられているベ
レットの電極または配線等に腐食を生じさせるという問
題があることが本発明者により見い出された。Therefore, when a semiconductor device is formed using a puff cage substrate as described above, moisture permeates into the recess from the side surface of the substrate, causing corrosion to the electrodes or wiring of the pellet attached to the recess. The inventors have discovered that there is a problem in that this occurs.
また、たとえばリードレスチップキャリア（以下、ＬＣ
Ｃと言う、）型半導体装置の如く、パンケージ基板にス
ルーホールを形成し、該スルーホールを電極または配線
等の目的で使用する場合にあっては、スルーホール間の
電流リークもパッケージ基板に埋設されているガラス繊
維と樹脂との界面に浸透した水分により大きな影響を受
けることが、本発明者による明らかにされた。In addition, for example, leadless chip carrier (hereinafter referred to as LC)
When through-holes are formed in a pan-cage substrate and used for purposes such as electrodes or wiring, such as in a )-type semiconductor device (referred to as C), current leakage between the through-holes is also buried in the package substrate. The present inventors have clarified that the interface between the glass fiber and the resin is significantly affected by moisture that has penetrated into the interface.
なお、繊維強化樹脂からなるパッケージ基板については
、株式会社サイエンスフォーラム、昭和５８年１１月２
８日発行の「超ＬＳＩデバイスハンドブックＪ Ｐ２４
３以下に説明されている。Regarding package substrates made of fiber-reinforced resin, see Science Forum Co., Ltd., November 2, 1982.
“Very LSI Device Handbook J P24” published on the 8th
3 is explained below.
本発明の目的は、ペレット取付基板に関し、半導体装置
の耐湿性向上に適用して有効な技術を提供することにあ
る。An object of the present invention is to provide an effective technique for improving the moisture resistance of semiconductor devices regarding a pellet mounting board.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
本願において開示される発明のうち代表的なものの概要
を簡単に説明すれば、次の通りである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、半導体装置のベレット取付基板を、縦横に織
布状に配列されている繊維を埋設して形成されている板
状等の繊維強化樹脂を、繊維方向に対しほぼ４５″の傾
斜で裁断して四角形状に形成することにより、ベレット
取付基板の側面から該基板のほぼ中央に穿設されている
キャビティ璧までの繊維長さを繊維方向に沿って裁断す
る場合に比べ拡大することができることより、水分等の
浸透経路の延長が達成される。That is, a plate-shaped fiber-reinforced resin formed by embedding fibers arranged in a woven fabric pattern in the vertical and horizontal directions of a pellet mounting board for a semiconductor device is cut at an inclination of approximately 45'' with respect to the fiber direction. By forming the fiber into a rectangular shape, the length of the fiber from the side surface of the pellet mounting board to the cavity wall bored approximately in the center of the board can be increased compared to when cutting along the fiber direction. , extension of the penetration path for moisture, etc. is achieved.
また、同様にペレット取付基板の側面またはその近傍等
の穿孔部に形成されている配線または電極等に関し、隣
接する穿孔部間の繊維に沿った長さを延長することがで
きるので、該繊維界面に浸透した水分等が原因で生じる
前記穿孔部間の電流のリークを防止することができ、前
記目的が達成されるものである。Similarly, regarding the wiring or electrodes formed in the perforations on or near the side surface of the pellet mounting board, the length along the fibers between adjacent perforations can be extended, so the fiber interface It is possible to prevent leakage of current between the perforated portions caused by moisture or the like that has penetrated into the perforation, and the above object is achieved.
第１図は本発明による一実施例である半導体装置に適用
されるベレット取付基板であるパッケージ基板の概略を
、その平面図で示すものであり、第２図は前記パッケー
ジ基板の側面近傍をその拡大部分平面図で示すものであ
る。FIG. 1 is a plan view schematically showing a package substrate, which is a bullet mounting substrate applied to a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a plan view showing the vicinity of the side surface of the package substrate. It is shown in an enlarged partial plan view.
第３図は本実施例の半導体装置の概略を、そのほぼ中心
を切る面における断面図で示すものである。FIG. 3 schematically shows the semiconductor device of this embodiment in a cross-sectional view taken approximately at its center.
本実施例の半導体装置は、いわゆるＬＣＣ型であり、繊
維強化樹脂の１つであるガラスエポキシでパッケージ基
板１が形成され、該基板のほぼ中央に凹部であるキャビ
ティ２が穿設され、またその周囲には穿孔部であるスル
ーホール３が形成され、該スルーホール３壁面には、基
板上面に銅等をプリント形成してなる配線４と裏面電極
５とを電気的に接続するための配線６が形成されている
。The semiconductor device of this embodiment is of the so-called LCC type, and has a package substrate 1 made of glass epoxy, which is one of fiber-reinforced resins, and a cavity 2, which is a concave portion, is bored approximately in the center of the substrate. A through hole 3 as a perforation is formed around the periphery, and a wiring 6 is formed on the wall of the through hole 3 to electrically connect a wiring 4 formed by printing copper or the like on the top surface of the board and a back electrode 5. is formed.
また、前記基板１のキャビティ２にはベレット７が接着
剤８で取り付けられ、該ペレット７は金等のワイヤ９で
前記配線４と電気的に接続された後、シリコーンゲルｌ
Ｏをボッティングすることにより封止されてなるもので
ある。または、シリコーンゲルに代えてエポキシレジン
をポツティングすることもできる。Further, a pellet 7 is attached to the cavity 2 of the substrate 1 with an adhesive 8, and after the pellet 7 is electrically connected to the wiring 4 with a wire 9 made of gold or the like, the pellet 7 is attached with a silicone gel.
It is sealed by botting O. Alternatively, epoxy resin can be potted instead of silicone gel.
なお、本実施例の半導体装置は、実装基板上の電極に前
記裏面電極５を半田等で接合することにより、外部との
電気的接続と実装とを同時に行うものである。Note that the semiconductor device of this embodiment is electrically connected to the outside and mounted at the same time by bonding the back electrode 5 to the electrode on the mounting board by soldering or the like.
本実施例の半導体装置の特徴は、第１図に示すようにパ
ッケージ基板１が、破線で示すガラス繊維１１が縦横に
配列された状態で埋設されてなるガラスエポキシを該繭
繊維の方向に対し、はぼ４５″の傾斜で裁断し、かつそ
のほぼ中央に所定形状のキャビティ２を穿設することに
より形成されていることにある。The feature of the semiconductor device of this embodiment is that, as shown in FIG. 1, a package substrate 1 has glass epoxy embedded in which glass fibers 11 shown by broken lines are arranged vertically and horizontally in the direction of the cocoon fibers. , is formed by cutting with an inclination of 45'' and drilling a cavity 2 of a predetermined shape approximately in the center thereof.
以上説明した如く、パッケージ基板が埋設ガラスＩｌｌ
維の配列方向に対し４５°の傾斜で裁断されていること
より、通常水分等が基板１の側面よりキャビティ２内ま
でガラス繊維１１の界面を通って浸透してい（場合、こ
の浸透経路である基板ｌ側面から前記キャビテイ２壁面
までのガラス繊維長さを、縦または横のいずれかの方向
に沿ってガラスエポキシを裁断する場合に比べ、約７倍
に延長することができるものである。なぜならば、前者
の繊維長さは直角二等辺三角形の底辺に相当し、後者は
他の１つの辺に相当することによる。As explained above, the package substrate has embedded glass Ill.
Since the fibers are cut at an angle of 45° to the direction in which the fibers are arranged, moisture or the like normally permeates from the side surface of the substrate 1 into the cavity 2 through the interface of the glass fibers 11 (in this case, this permeation path is The length of the glass fiber from the side surface of the substrate 1 to the wall surface of the cavity 2 can be extended approximately 7 times compared to the case where the glass epoxy is cut along either the vertical or horizontal direction. For example, the former fiber length corresponds to the base of a right-angled isosceles triangle, and the latter corresponds to one other side.
それ故に、本実施例の半導体装置のキャビティ内部は、
耐湿性向上が達成されるものである。Therefore, the inside of the cavity of the semiconductor device of this example is as follows.
This results in improved moisture resistance.
また、第２図に示す如く、本実施例の半導体装置は、そ
の基板１周囲には該基板裏面に配線を引き廻すため配線
を形成するスルーホール３が形成されているが、該基板
１に水分等が浸透するとスルーホール間に電流がリーク
する原因となる。ところが、本実施例に適用されるパフ
ケージ基板を用いる場合は、隣接するスルーホール間に
おけるガラス繊維長さを、基板を繊維方向に沿って裁断
する場合に比べ、同様に約２倍に延長することができる
ので、咳スルーホール間のリークを防止することをも達
成できるものである。事実、６５℃下湿度９５％の状態
に所定時間放置して行う強制耐湿試験においては、スル
ーホール間の電気抵抗が前者のほうが１０３〜１０ｓ倍
の値を有していた。In addition, as shown in FIG. 2, in the semiconductor device of this embodiment, a through hole 3 is formed around the substrate 1 to route the wiring to the back surface of the substrate. If moisture or the like penetrates, it will cause current to leak between the through holes. However, when using the puff cage substrate applied to this example, the length of the glass fiber between adjacent through holes must be approximately twice as long as when the substrate is cut along the fiber direction. Therefore, it is possible to prevent leakage between the cough through holes. In fact, in a forced humidity test in which the former was left at 65° C. and 95% humidity for a predetermined period of time, the electrical resistance between the through holes was 10 3 to 10 s times higher.
（１）、繊維強化樹脂でペレット取付基板が形成されて
なる半導体装置において、縦または横の繊維の配列方向
に対し、約４５°の傾斜で裁断してペレット取付基板を
形成することにより、該基板のほぼ中央に穿設されてい
るキャビテイ壁面までの繊維長さを、繊維の配列方向に
沿って裁断してなるパッケージ基板に比べ、約２倍に延
長することができるので、水分等が該繊維界面を通って
キャビティ内に浸透して行きに（くすることができる。(1) In a semiconductor device in which a pellet mounting board is formed of fiber-reinforced resin, the pellet mounting board is formed by cutting at an angle of approximately 45° to the direction in which the vertical or horizontal fibers are arranged. The length of the fibers up to the wall of the cavity, which is drilled in the center of the board, can be approximately twice as long as that of a package board that is cut along the direction in which the fibers are arranged. It can penetrate into the cavity through the fiber interface.
（２）、前記ｆ１＋により、キャビティ内に取り付けら
れているペレットの電極または配線等の腐食を防止する
ことができる。(2) The f1+ can prevent corrosion of the pellet electrodes or wiring installed in the cavity.
（３）、前記（１）に記載するペレット取付基板につい
て、該基板周囲または周囲近傍の基板に穿孔部からなる
配線または電極等を形成することにより、隣接する穿孔
部間の繊維に沿った長さを約η倍に延長することができ
るので、該穿孔部間の電流のリークを防止することがで
きる。(3) Regarding the pellet mounting board described in (1) above, by forming wiring or electrodes, etc. consisting of perforations on the board around or in the vicinity of the board, the length along the fibers between adjacent perforations can be extended. Since the length can be increased by approximately η times, leakage of current between the perforations can be prevented.
（４）、前記［１１〜（３）により、耐湿性の高い半導
体装置を提供することができる。(4) According to [11 to (3)] above, a semiconductor device with high moisture resistance can be provided.
（５）、繊維強化樹脂として、ガラスエポキシを使用す
ることにより、耐湿性の向上した半導体装置を安価に提
供することができる。(5) By using glass epoxy as the fiber-reinforced resin, a semiconductor device with improved moisture resistance can be provided at low cost.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、繊維強化樹脂としてはガラスエポキシについ
てのみ説明したが、これに限るものでなく、繊維として
炭素繊維等の他の繊維でもよく、また樹脂材料もエポキ
シ以外のポリエステル等の他の樹脂であってもよい。For example, although only glass epoxy has been described as the fiber-reinforced resin, it is not limited to this, and the fibers may be other fibers such as carbon fiber, and the resin material may also be other resins other than epoxy, such as polyester. Good too.
また、基板周囲またはその近傍に形成した穿孔部として
は、スルーホールに限るものでなく、実装用の外部端子
を植設する孔であってもよく、基板壁面に被着形成して
なる配線であっても、さらには、基板壁面に半円形等の
溝を設けて、液溝に被着形成してなる配線であっても当
然に良く、前記実施例と同様の効果が得られるものであ
る。Furthermore, the perforations formed around or near the board are not limited to through holes, but may also be holes for planting external terminals for mounting, or wiring formed by adhering to the wall surface of the board. However, it is also possible to form a semicircular groove on the wall surface of the substrate and form the wiring by adhering it to the liquid groove, and the same effect as in the above embodiment can be obtained. .
以上の説明では主として本発明者によってなされた発明
をその費景となった利用分野である、いわゆるＬＣＣ型
半導体装置に適用した場合について説明したが、それに
限定されるものではなく、たとえば、ピングリフトアレ
イ型であってもよく、また時計やカメラ等に用いられる
、いわゆるチップオンボード（ＣＯＢ）型の半導体装置
、その他繊維強化樹脂を用いてパッケージ形成されてな
る半導体装置であれば如何なるものについても通用して
有効な技術である。The above explanation has mainly been about the application of the invention made by the present inventor to a so-called LCC type semiconductor device, which is the field of application in which the invention was made. It may be an array type semiconductor device, or it may be a so-called chip-on-board (COB) type semiconductor device used in watches, cameras, etc., or any other semiconductor device packaged using fiber-reinforced resin. It is a commonly used and effective technique.
第１図は本発明による一実施例である半導体装１に適用
されるパッケージ基板の概略を示す平面第２図は前記パ
フケージ基板の一部周囲を示す拡大部分平面図、
第３図は本実施例の半導体装置を示す断面図である。
■・・・基板、２・・・キャビティ、３・・・スルーホ
ール、４・・・配線、５・・・裏面電極、６・・・配線
、７・・・ペレット、８・・・接着剤、９・・・ワイヤ
、１０・・・シリコーンゲル、１１・・・繊維。
第 ２ 図
第 ３ 図FIG. 1 is a plan view schematically showing a package substrate applied to a semiconductor device 1 which is an embodiment of the present invention. FIG. 2 is an enlarged partial plan view showing a part of the periphery of the puff cage substrate. FIG. 2 is a cross-sectional view showing an example semiconductor device. ■... Substrate, 2... Cavity, 3... Through hole, 4... Wiring, 5... Back electrode, 6... Wiring, 7... Pellet, 8... Adhesive , 9...Wire, 10...Silicone gel, 11...Fiber. Figure 2 Figure 3
Claims (1)
傾斜で裁断された四角形の繊維強化樹脂で形成されてな
る半導体装置。 ２、繊維強化樹脂が、ガラス繊維強化エポキシ樹脂であ
ることを特徴とする特許請求の範囲第１項記載の半導体
装置。 ３、半導体装置が、チップキャリア型半導体装置である
ことを特徴とする特許請求の範囲第１項記載の半導体装
置。[Scope of Claims] 1. A semiconductor device in which a pellet mounting substrate is formed of a rectangular fiber-reinforced resin cut at an angle of approximately 45° with respect to the fiber direction. 2. The semiconductor device according to claim 1, wherein the fiber reinforced resin is a glass fiber reinforced epoxy resin. 3. The semiconductor device according to claim 1, wherein the semiconductor device is a chip carrier type semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59260750A JPS61140154A (en) | 1984-12-12 | 1984-12-12 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59260750A JPS61140154A (en) | 1984-12-12 | 1984-12-12 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61140154A true JPS61140154A (en) | 1986-06-27 |
Family
ID=17352218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59260750A Pending JPS61140154A (en) | 1984-12-12 | 1984-12-12 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61140154A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008159860A (en) * | 2006-12-25 | 2008-07-10 | Kyocera Corp | Mounting structure of semiconductor element |
-
1984
- 1984-12-12 JP JP59260750A patent/JPS61140154A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008159860A (en) * | 2006-12-25 | 2008-07-10 | Kyocera Corp | Mounting structure of semiconductor element |
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