JPS61135194A - Hybrid ic - Google Patents
Hybrid icInfo
- Publication number
- JPS61135194A JPS61135194A JP25781384A JP25781384A JPS61135194A JP S61135194 A JPS61135194 A JP S61135194A JP 25781384 A JP25781384 A JP 25781384A JP 25781384 A JP25781384 A JP 25781384A JP S61135194 A JPS61135194 A JP S61135194A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- magnetic field
- present
- inductance element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はインダクタンス素子を含む混成集積回路に関し
、特にインダクタンス素子よシ発生される漏れ磁界が周
辺の電子部品に及ぼす影響を防止した混成集積回路に関
する。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a hybrid integrated circuit including an inductance element, and in particular to a hybrid integrated circuit that prevents the influence of leakage magnetic fields generated by the inductance element on surrounding electronic components. Regarding.
従来の強磁性体材料よシ構成される電子部品とインダク
タンス素子とが混在する混成集積回路内では、第4図に
示すように、複数インダクタンス素子2の混成集積回路
基板1上での搭載位置を互いのもれ磁界4を相殺する位
置に配置して強磁性体材料の電子部品がもれ磁界によシ
誤動作することを防止していた。In a conventional hybrid integrated circuit in which electronic components made of ferromagnetic materials and inductance elements coexist, as shown in FIG. By arranging them at positions where their leakage magnetic fields 4 cancel each other out, electronic components made of ferromagnetic material are prevented from malfunctioning due to leakage magnetic fields.
上述の従来技術によるインダクタンス素子の搭載方法に
よると、もれ磁界が効果的に相殺出来る利点を有するが
、かかる配置の搭載を実現する為には、混成集積回路基
板の両面にインダクタンス素子を実装する必要がある為
、回路基板の両面に搭載パターンを印刷する必要がちシ
、又素子搭載工程においては半田ディツプや半田リフロ
ーの作業工数が2倍となる等コストアップの原因となっ
ていた。The method of mounting an inductance element according to the above-mentioned conventional technology has the advantage of effectively canceling out leakage magnetic fields, but in order to realize mounting in this arrangement, the inductance element must be mounted on both sides of the hybrid integrated circuit board. Because of the necessity, it is often necessary to print mounting patterns on both sides of the circuit board, and in the element mounting process, the number of man-hours for solder dip and solder reflow is doubled, causing an increase in costs.
本発明によれば、混成集積回路基板上の任意の端部にイ
ンダクタンス素子を集中搭載することによシ、インダク
タンス素子よシ発生される合成磁界を局部的に集中した
混成集積回路装置を得る。According to the present invention, by centrally mounting inductance elements on arbitrary ends of a hybrid integrated circuit board, a hybrid integrated circuit device is obtained in which a composite magnetic field generated by the inductance elements is locally concentrated.
この為、インダクタンス素子から発する合成磁界の強度
および方向を考慮して、上述した磁気サーやフロッピー
ディスク等の強磁性体材料で構成された電子部品のに動
作をインダクタンス素子からの磁界が影響しない位fl
K配置することにより、インダクタンス素子からの合成
磁界による誤動作を防止することが可能となる。Therefore, considering the strength and direction of the composite magnetic field emitted from the inductance element, the magnetic field from the inductance element should not affect the operation of electronic components made of ferromagnetic materials, such as the above-mentioned magnetic circuit and floppy disk. fl
By arranging K, it is possible to prevent malfunctions caused by the composite magnetic field from the inductance element.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例を示した一部縦断面図である
。混成集積回路基板1上の周辺の所定部に他の部品3と
は別に複数のインダクタンス素子2が集中的に配置され
ている。第2図、第3図は本発明による混成集積回路7
を強磁性体で構成される電子部品5の近傍に配置した際
の両者の相対的位置の一例を示す。第2図は合成磁界6
が該電子部品5の磁気特性に悪影響を与える場合を示し
ており、本発明の望ましくない用い方を表わしている。FIG. 1 is a partial vertical sectional view showing an embodiment of the present invention. A plurality of inductance elements 2 are arranged in a concentrated manner at a predetermined peripheral portion of the hybrid integrated circuit board 1, apart from other components 3. FIGS. 2 and 3 show a hybrid integrated circuit 7 according to the present invention.
An example of the relative position of the electronic component 5 when the electronic component 5 is placed near the electronic component 5 made of ferromagnetic material is shown. Figure 2 shows the composite magnetic field 6
This shows a case where the magnetic properties of the electronic component 5 are adversely affected, and represents an undesirable use of the present invention.
一方、第4図は、合成磁界6が直接強磁性体の電子部品
5に作用しないように位置されてお夛、安定動作が得ら
れる。On the other hand, in FIG. 4, the composite magnetic field 6 is positioned so that it does not directly act on the ferromagnetic electronic component 5, thereby providing more stable operation.
以上説明した様に、混成集積回路の任意の端部にインダ
クタンス素子を集中配置することにより、合成磁界を相
殺するかわ夛に、搭載位置により定まる合成磁界の発生
方向が一方向に定まる為混成集積回路及び強磁性体材料
より構成される電子部品との相対的搭載位置を巧みに配
することによシ、もれ磁界による誤動作を防止すること
が出来る。As explained above, by arranging inductance elements concentrated at any end of a hybrid integrated circuit, the direction of generation of the composite magnetic field determined by the mounting position is fixed in one direction, which cancels out the composite magnetic field. By skillfully arranging the mounting position relative to the circuit and electronic components made of ferromagnetic material, malfunctions due to leakage magnetic fields can be prevented.
又前記の如〈従来技術によるインダクタンス素子の両面
搭載が不要な為、コストダウン効果がある。Further, as mentioned above, since it is not necessary to mount inductance elements on both sides according to the conventional technology, there is a cost reduction effect.
第1図は本発明の一実施例を示す一部断面図である。
第2図、第3図はそれぞれ本発明の使用形態を示す断面
図である。
第4図は従来の混成集積回路の要部を示す断面図である
。
1・・・・・・混成集積回路基板、2・・・・・・イン
ダクタンス素子、3・・・・・・他の搭載素子、4・・
・・・・もれ磁界、5・・・・・・強磁性体よりなる電
子部品、6・・・・・・合成磁界、7・・・・・・混成
集積回路。
第1図
第2図
墾3図FIG. 1 is a partially sectional view showing an embodiment of the present invention. FIG. 2 and FIG. 3 are sectional views each showing a mode of use of the present invention. FIG. 4 is a sectional view showing the main parts of a conventional hybrid integrated circuit. 1... Hybrid integrated circuit board, 2... Inductance element, 3... Other mounted elements, 4...
... Leakage magnetic field, 5 ... Electronic component made of ferromagnetic material, 6 ... Synthetic magnetic field, 7 ... Hybrid integrated circuit. Figure 1 Figure 2 Figure 3
Claims (1)
意の端部に集中して搭載したことを特徴とする混成集積
回路。A hybrid integrated circuit characterized in that a plurality of inductance elements are mounted concentratedly at arbitrary ends of a hybrid integrated circuit board.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25781384A JPS61135194A (en) | 1984-12-06 | 1984-12-06 | Hybrid ic |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP25781384A JPS61135194A (en) | 1984-12-06 | 1984-12-06 | Hybrid ic |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS61135194A true JPS61135194A (en) | 1986-06-23 |
Family
ID=17311474
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP25781384A Pending JPS61135194A (en) | 1984-12-06 | 1984-12-06 | Hybrid ic |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS61135194A (en) |
-
1984
- 1984-12-06 JP JP25781384A patent/JPS61135194A/en active Pending
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