JPS6113296A - Electronic musical instrument with key split function - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] [Technical field of invention] The present invention relates to an electronic musical instrument with a key split function.

[Prior art]

In the case of a conventional electronic musical instrument with a key split function, when key splitting is performed, for example, in the case of an instrument with 8-note volifonics, for example, the left key works as a 4-note vorifonics, and the right key works as a 4-note vorifonics. It is fixed as follows.

[Problems with conventional technology]

In the conventional method, the keys on the right and left sides are
Because the maximum number of voices is limited, for example, the keys on the right may not be used at all, but the keys on the left may be limited to a maximum of 4 keys), which may be undesirable for performance. .

[Purpose of the invention]

When key splitting is performed, the maximum number of pronunciation channels can be obtained for both the right and left keys.
The purpose is to provide an electronic musical instrument with a key split function that allows preferred performance with simple operations.

[Key points of the invention]

Channels are assigned according to the key operation order regardless of the key split key group, and each assigned channel is assigned a tone that is set according to the key group of the operation key, and musical tones are emitted using this set tone. This is what I tried to do.

〔Example〕

Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

The keyboard 1 has a plurality of keys, and the output of each key is CP
It is input to U (central processing unit) 2 and key code size comparison section 3. The CPU 2 controls all operations of this electronic musical instrument and is composed of a microprocessor and the like. It also receives outputs from a switch input section 4, which includes switches for controlling timbre, rhythm, etc., and an f-color register section 5.

On the other hand, the key split switch 6 is a switch that instructs to divide the keyboard 1 into a treble side and a bass side at an arbitrary key position and set different tones for each side.
The output of the switch 6 is input to the split control section 7. In response to this, the split control section 7 gives a control signal to the key split code generation section 8 to set a key split code indicating the pitch to internal KSP 10g, which will be described later, and outputs the output from KSP Reg as the key code. It is given to the size comparison section 3. This comparison section 3 compares the pitch relationship between the signal from the keyboard 1 and the key split chord during the key split performance mode, and provides a signal C as a result to the CPU 2. The tone register section 5 is CP
Under the control of U2, tones corresponding to the treble side and the bass side are set to tone registers 9 selected from among a plurality of tones (20 types in this embodiment) preset.
TONERe g y L T O N E Reg
A CTON that has a CTON and stores a number (1 to 20) corresponding to the timbre set for the musical tone currently being sounded.
It has an E Reg. In this embodiment, there are eight musical tone creation channels using a time-sharing processing method, and the tone can be set independently for each channel. It serves as a table indicating the tone color, and provides the CPU 2 with the necessary tone color number (1 to 20). Then, based on this tone number, CPU2
Corresponding tone data is obtained from the E register 9.

The CPU 2 has a register group 1 that includes various registers that will be described later.
1 and is used for various calculations. Then, a control signal for creating a musical tone corresponding to the input signal from each section is given to the musical tone generating section 12, so that a musical tone signal is created and the amplifier 13
, is emitted as a musical tone through the speaker 14.

Next, referring to FIG. 2, all of the timbre-related switches on the switch input section 2 will be explained. In the case of the electronic musical instrument of this embodiment, data for each of the 20 types of tones that are preset in the tone creation mode in the tone register 9 by the switch operation described below will be explained conceptually in FIG. 3. As can be seen from the memory configuration of the tone register 9, three types of volume, harmonic component suppression, and pitch
It consists of different types of envelope data and waveform data indicating basic waveforms. And the tone register 9 in FIG.
In the example of the memory configuration, there are n types of volume envelope data, m types of waveform envelope data, e types of pitch envelope data, and 2 types of basic waveforms, and registers with corresponding capacities are prepared. In addition, there are X types of tones (actually, X = 20), each consisting of a total of four pointers for each envelope data and waveform data of the volume, harmonic component suppression, and pitch, and a switch described later. Each is arbitrarily selected and stored by operation.

Therefore, returning to FIG. 2, the basic waveform memory selection SW, 16
The waveform data of the 10 types of basic waveforms in the case of -10 described above are stored in the corresponding registers (1 to 1) of the tone register 9.
k), and the basic waveform generation unit switch 17 is a switch for specifying one of five types of basic waveforms. Switch 17A (11,
21°31', 41.51) designates one period in the first half, and switch 17B (12, 22, 32, 42, 52) designates one period in the latter half. Here, among the numbers written on the switches 17A and 17B, the numbers in the 10s are the waveforms shown in FIG.
The numbers are the waveforms shown in Figure 4 (2), the 30s are the waveforms shown in Figure 4 (3), and the 40s are the waveforms shown in Figure 4 (3).
The waveform shown in Figure (4), the 50s, is
) represents the waveform shown. Switch 17C
is an octave modulation switch that alternately specifies the waveform specified in the first half and the waveform specified in the second half every cycle.

When this switch 17C is off, only the waveforms specified in the first half are specified. The switch 16A is a write switch for writing the contents set by the switch 17 into the switch 16.

FIG. 4 shows the shapes and data of five types of waveforms that are the basis for forming the ten types of basic waveforms. Furthermore, Fig. 5 shows the data structure of the waveform data of the basic waveform.
The ORM consists of the 3-bit data set to the waveform shown in Figure 4, the next 3-bit OCT, and the MODULATION W.
The 3-bit data shown in FIG. 4 is also set for AVE FORM.

The next 1 bit data is OCT, MODUL ATIO
This is data indicating the presence or absence of N. Furthermore, 1 bit of the LSB is not used and is invalid.

Returning to Figure 2, volume envelope memory selection 5W18
, the harmonic component suppression envelope memory selection 5W19, and the pitch envelope memory selection switch 20 are for the cases of n-10, m=10, and e=10, respectively, and the timbre R
Registers 0 to n, 1 to m, which store each envelope data of volume, harmonic component suppression, and pitch in AMd.
These are switches for specifying 1 to 1e, and the actual operation is to first specify any one of the envelope switches 18 to 19 for volume, harmonic component suppression, and pitch.
Next, operate the switches for each step of the rate value designation slide 5w21, level value designation slide 5W22, and sustain point designation SW23, which are provided eight times each corresponding to the eight steps 0 to 7, and then Turn on the write 5W 24, 25, or 26 corresponding to the selected envelope of volume, harmonic component suppression, or pitch.

FIG. 6 shows the waveforms of the volume, harmonic component suppression, and pitch envelopes. Eight envelopes are arbitrarily formed by operating the slide SWs 21 and 23 in accordance with the eight steps described above. It consists of a broken line part. The height of the end of the broken line portion of the envelope (indicated by points A to H in the figure) is expressed as a level value, and the distance between each level value is expressed as a rate value (the slope of the broken line portion).

FIG. 7 shows the data structure of the envelope data. In the figure, A-Ht= represents the data storage section corresponding to the points A-H at the end of the envelope waveform in FIG.
It has a capacity of 8 bits. Then, 1-bit data indicating the direction of the MSBFi rate (inclination direction of the broken line part) 1- in the upper 8 bits is stored, and becomes each direction when it is '0'' and - when it is 12. is 1 piece data that represents the rate value data and MSBFi sustain information in the lower 8 bits; when it is '1'', it indicates that the sustain point has been reached, and when it is 60'', it indicates that the sustain point has not been reached. .

The next 7-bit data indicates the level value. Note that the direction of the rate (/, \) mentioned above is automatically determined from the change in level value.

FIG. 8 shows an example of an actual envelope, and FIG. 9 shows an example of actual data for the envelope of FIG. In this example, point F is the sustain point, and the envelope level of this key remains constant until the next key-off.

At this time, the value of point G becomes irrelevant.

Returning to FIG. 2 again, the tone memory selection switch 27 is
The register in the tone register 9 that stores the data of 20 kinds of tones in the case of x=20 (Register 1 in FIG. 3)
-X), and in the timbre creation mode, the timbre data (
Four numbers for each envelope data (waveform data of the basic waveform, volume, harmonic component suppression, and pitch) are written into the registers 1 to X when the write 5W28 is turned on. In addition, in normal performance mode, tone memo selection 5
By simply turning on any one of W27, the four pointers of the corresponding tone data are read from the registers 1 to
The data is read from each register 1 to m and 1 to 1.1 and processed.

Next, the specific configuration of the musical tone creating section 11 will be explained with reference to FIG. In the figure, 3o is an interface through which data is input/output with the CPU 2, and the CPU 2 connects to this interface 30 to a volume envelope generation circuit 31, a harmonic component suppression envelope generation circuit 32, and a pitch envelope generation circuit 33. On the other hand, each envelope data consists of the rate value, level value, etc. shown in FIG. 7 (as shown in FIG. 10, each data is AMP Ramp, WAVE, Ramp, Freq,
(also called Ramp). And each envelope
The step circuits 31, 32, and 33 calculate the current value of the rate value, level value, and the current value, respectively, and convert it into the corresponding Exp, (exponential).
ROM34, band limit circuit 35, frequency ROM3
Give to 5. Furthermore, when the current value reaches the rate value at that time, each envelope circuit 31°3
2.33 generates an interlaced signal lNTi, sends it to the CPU 2 via the interface 30, and outputs data AMP Ramp for the next steps 0 to 7 (points A-H).
, WAVE Ramp, Freq, and Ramp (however, in the case of the above-mentioned sustain point, the interlaced signal INT is not output).

F r eq, ROM 36 stores frequency information (phase angle information) according to the output from pitch envelope circuit 33.
FIt- is generated and applied to the band limit circuit 35 and phase generator 37. This seven-stage generator 37/fi accumulates the phase angle information FI't- and provides the resulting data to the division circuit 38. Further, the band limit circuit 35 prevents the occurrence of aliasing distortion based on the sampling theorem based on the output from the waveform envelope circuit 32 and the phase angle information, and provides its output to the division circuit 38. Further, the division circuit 38 is also given predetermined waveform type selection data sent from the CPU 2 via the interface 30 and the waveform generation circuit 39. The division circuit 38 includes the phase generator 37, the band limit circuit 35,
A division process is performed on each output from the waveform generation circuit 39, and the Uniibu generator 40 is accessed based on the resulting data to generate waveform data and send it to the multiplication circuit 41. The specific structure of the division circuit 38 has already been proposed by the present applicant, for example, in Japanese Patent Application No. 57-22126.
The implementation circuit described in the patent application specification No. 6 can be used.

EXP and control data read from the ROM are also input to this multiplication circuit 41, and therefore the waveform data and control data are multiplied and the resulting data is sent to an accumulation circuit 42.
give to This accumulation circuit 42 accumulates the accumulated data 'f, DAc every time it accumulates the result data for 8 channels.
I/F (D-A converter interface) 43
As a result, a synthesized musical tone is emitted from the speaker 14.

Next, the configurations of the volume, harmonic component suppression, and pitch envelope circuits 31, 32, and 33 will be specifically explained with reference to FIG. Note that since these circuits 31 to 33 have the same configuration, the circuit shown in FIG. 11 is assumed to be, for example, the volume envelope circuit 31.

In the figure, 45° indicates 8 stages of shift register with 8-bit capacity.
This is a group of shift registers connected in parallel, and the level value sent from the CPU 2 via the transfer gate 46 is input in parallel to the first stage. In addition,
The shift register group 45 corresponds to the existence of an 8-channel musical tone creation system configured by connecting 8 stages of shift registers in parallel. The same applies to other shift register groups to be described later.

The level value input to the first stage of the shift register group 45 is then shifted to the subsequent stage, outputted from the eighth stage, returned to the first stage via the transfer gate 47, and applied to the B input terminal of the comparator 48. Further, the transfer gate 46 is controlled to open and close by applying a preset signal sent from the CPU 2 to the gate via an inverter 49t, and the transfer gate 47 is controlled to open and close by directly applying the preset signal to the gate. Note that this preset signal is at the "0" level only when the level value is sent.

On the other hand, the rate value is input to the transfer gate group 50 via the transfer gate 51, and when outputted from the shift register group 50, it is returned to the shift register group 50 via the transfer gate 53, and the B input terminal of the adder/subtractor 53 It is also given to The transfer gates 51 and 52 are controlled to open and close by applying the preset signal to the gates via the inverter 54 or directly.

Further, output data (current data) from the shift register group 55 is inputted back to the transfer gate 56' and also applied to the input terminal of the adder/subtractor 530. And the result data ANS of the adder/subtractor 53
I is applied to the shift register group 55 via the transfer gate 57, and also to the input terminal 48 of the comparator 48. The MSB data (data indicating the rate direction) of the rate value output from the shift register group 50 is input to the control terminal SUB of the adder/subtractor 53 as a subtraction command, and this subtraction command is 1'. When , subtraction is performed, and when '02, addition is performed. Further, the data of the MSB of the rate value is inputted to the control terminal ≧ of the comparator 48 as a comparison method selection command, and when the comparison method selection command is “1”, if A≦B, the comparison result of the comparator 48 is inputted. Signal ANS2ij, ″1
``, if A>B, ITOIll; on the other hand, when the comparison method selection command is 0', if A2B, the comparison result signal ANS2 is 1', and if A<B, 0''. The comparison result signal ANS2 is sent to transfer gates 56 and 57, respectively.
The voltage is applied to the gate directly or via the inverter 58f to control opening and closing, and is also applied to one end of the Nantes gate 59. On the other hand, the MSB data (sustain information) of the level value output from the shift register group 45 is inverted at the other end of the Nant gate 59, and the output of the Nant gate 59 is the interlat signal, IN
It is sent to the CPU 2 as T.

Next, various registers will be explained with reference to FIG.

12+1) are registers provided in the register group 11. Each register OPleg, WP R in the diagram
Both ag and FP Reg are used for indexing each line (pointing to a channel).

That is, OP Reg holds the value of the channel where the key was previously turned on. W,P Rag! d key assigner (
This is a work pointer which is a circuit that assigns channels to operation keys by the calculation processing of this key assigner FicpU2. FPReg holds the value of an empty line when it is found. FOUNDF
Rag is set by the CPU 2 to TRUE when there is an empty line and FALSE when there is no empty line.

Next, each register in FIG. 12(2) is also a register in the register group 11. 8-bit capacity NL Reg (No.
w Lrne st & tus) is its 0 bit meaning,
The 1st bit, . . . , 7th bit correspond to channel 0, channel 1, . . . , channel 7, respectively, and when a new channel is designated, the corresponding bit is turned on. The contents of each bit are turned OFF every time the check of all lines is completed, and the contents of NK Rag are transferred to the corresponding bits of OLRag, which will be described next, in preparation for the next channel assignment.

The OL Reg has a capacity of 8 bits, corresponds to channels 0 to 7 from the lower order side, and data from the NL Reg is transferred and stored.

TL Rag (Trigger Line 5
Similarly to tatus)ti, it has a capacity of 8 bits and corresponds to channels 0 to 7 from the lower side. And O when the key is on
N: Turns off when the key is turned off.

SCReg (Scale Code) has eight registers with a capacity of 8 bits, and each register corresponds to channels 0 to 7 and stores the scale code of the key assigned to that channel.

RTONE Rag is a register that has a tone number that identifies the tone data that corresponds to the right key, and LTONE Reg is a register that has a tone number that identifies tone data that corresponds to the left key.
EO~TONEn (nFi now up to 20)Fi,,2
CTONE ((1-CTONE7Fi, registers corresponding to channels o to 7, respectively.
TONEo~CTONE7 has the above LTONE Re.
The contents of g or RTONEReg are copied. That is,
This shows the current tone color number of each line.

Next, taking as an example the case of playing music w in FIG. 18, the operation will be explained with reference to the flowcharts in FIGS. 13 to 17. It is assumed that 20 types of tones have already been set in the tone register 9 in the tone creation mode.

When the power switch is turned on and a performance is started, initialization processing of steps S, , S, initialization (11) and initialization (22) is performed.

In the initialization (11), the flowchart in FIG. 15 is executed, and the TLSN in the register group 11 is first
The L and OL registers are set to 0FFk for all channels (step I). Then SCRag is cleared (
), and OPRag is reset (step XS).

Next, the key split position currently set in KSPReg,
For example, the pitch of C4 is set. In this case, since the output of the key split switch 6 is input to the split control section 7, the control section 7 gives a predetermined control signal to the key split code generation section 8, and thereafter outputs a key code of pitch C4. and gives it to the key code size comparison section 3.

Next, enter the tone data number of the right key (for example, one to 7) in RTONE Rag and LTONE l (eg17c
The tone data numbers (for example, violin) of the left keys are respectively set (steps Is, Is).

In this case, among the tone color memory selection switches 27 on the switch input section 4, those corresponding to the flute and violin are selected, respectively, and the register RTON in the CPU 2 is selected.
Set to E Reg and LTONE Reg.

In the initialization (22), the data of the NL register is transferred to the OL register according to the flow shown in FIG. 6 (step N,), and then each channel of the NL register is set to OFF (step Nt).

Next, a key common signal for keyboard 1 is output to the CPU2/li pass line BUS to perform a key scan (
Step S,). Therefore, the output of each key on the keyboard 1 is input to the CPU 2 (step S4), and the CPU 2 determines whether or not a key is pressed from the data content (step Ss).
). If it is determined that no key has been pressed, it is determined whether all keys have been scanned (step S). If rNOJ, the process returns to step S8, and the process continues until all keys are scanned.
, -86 are repeated.

Next, the first three simultaneous musical tones C1- shown in the score in Figure 18
When the keys Et and Gt (both whole notes) are pressed at the same time, for example, if the C1 key is detected as the first on key in step S, the key code C1 is set to C8CReg (step S). S7
) 0 and oPReg data “0” is WP Reg
(step S6), and further [FOUND R
Data rFALSEJ is set in ag (step S). Then, the process of step S1o is performed to obtain the contents of SCReg using the data "0" of WP Reg as an index, and since this is the first key-on, the scale code of the 0 channel of SCR'eg is not available.

Next, the process advances to step 811, and the data “C” of C8C18g is
3" and the SCReg data roJ, rNO
Since it is J, proceed to step S21, use the content "0" of WP Rag as an index, look at the content of TL Rag (0 channel is now "0FFJ"), and read TLReg.
It is determined whether the data of is ON (step 522).

However, since it is rNOJ, proceed to step SI5, and F
It is checked whether the data of OUND Rag is rFALSEL or not, but since it is rYESJ, the process advances to step S16.
Set data rTRUEJi to FOUNDF Reg. Also WP 18g data r OJ 't”
Set to F P Reg (Step 5 then WP
Reg'ii-increments to "1" and determines whether the result is "8" or not (step 5
18) is not true, so proceed to the next step 51g. In addition, when WP Rag becomes "8", ro is automatically
Work to return to J.

Next, step S1. Now, the data of WP Reg “1
” matches the data “0” that OP 18g has, and since it is “No”, the next step S1
゜, and thereafter the step S1. The WP register is incremented and the current WP register data is
Until ``1'' is returned to ``o'', ``the step Sl
ls,. +S11+ S! I+S! ,S,U*
S 1 ay S 1? + S 18?
S111 is repeated seven times. That is, during this period, WPRe
The gO value is 1°2.3. ..., 7. Changes to o. Then, when the value becomes "o" and a match of data "0" of OP Reg is detected in step srs, the process proceeds to step Sto, where it is determined whether FOUNDF Reg is TRUE or not. However, rY'E S J and step Sts
Proceed to FP Rag contents rOJ i index as SCRegKC8c Reg y”-ta “C1”
Store. That is, SCReg. The scale code C6 that was keyed on to the channel has been registered.

Next, NL RegirONJ is performed using the contents of FP Rag (channel 0) as an index, and therefore data "ON" is set in the 0th channel of NL Reg (step S, 4). And FP Reg
TL using the contents (0 channel) as an index
Set "ONJ" to the 0 channel of 18g (step S2.).Add [FPReg data rOJ eOP
Reg (step S2). This is an update of the key assigner's search start line pointer.

Next, in step S27, C3CRθg and KSP
The magnitude relationship of each data of RQg is determined.

So now C8CReg is C, and KSP Reg is C.
4, C3C (because it is related to KSP, step 82M)
Then, tone data is extracted using the contents of LTONE Reg as an index. And CTONE R
The contents of LTONE Rag are set to CTONEO in Qg. Then, T according to the contents of CTONEo
Violin tone data is extracted from the ONE register and sent to the musical tone creation section 12 (step S2), and data of C8CRθg, that is, the key code of C3, is also sent to the musical tone creation section 12 (step S, ). . Furthermore, the CP'U2 gives a key-on instruction to the musical tone creating section 12 (step 5a1), so that the musical tone creating section 12
Creation of musical tones in key No. 2 is started.

Then, the process returns to step S6, where it is determined whether or not all keys have been scanned, and the process proceeds to step S or step b (key-off process in FIG. 14, described later).

Next, if key E, which was operated at the same time as key C, is electrically detected, step S, t - step s
, s, ,s, the key code E is written to csCReg, the data rOJ of OP Reg is set to WPReg, and FOUNDF 18g
Data rFALSEj is set in . and SC1
Data “C2” of ○ channel of 8g is obtained (step 5IO), and then data “E,” of C8CRag is obtained.
It is determined that there is a mismatch with the SCReg data “C2”.
Step S++), Step S7. Proceed to.

And TL Reg 0 channel data “ON”
is detected (step S, 1), and step S1. is detected via step S2°. Then, W P Reg is incremented by 1 and becomes "1".

Next, WP Reg(rlJ) and OF Reg(
“0”), the process proceeds to step SIo and the SCR
The data of the first channel of ag (now without a scale code) is obtained, the mismatch with C8CReg is determined (step 5at), the data rOFFJ of the first channel of TL Reg is read, and step S! The process advances to step S15 via ffi. Then, by step 818, the FO
FALSE of UNDF Reg is determined and FQUN
Data rTRTJEJ is written to DF Reg.

Next, data “1” is set in FRReg, and WP
Reg is incremented by 1 and becomes “2” (step S, 8
).

Next, in step S1゜, the WP B and egO values are OP.
The previous key-on pointer held in Rag
Until it is incremented to 0, step SI
O+ SIN Stl+ 5ffil+ -1,000 SI Bysta+ SNI is repeated. Then, when WPReg becomes "0", step S. Proceed to
Furthermore, scale code E2 is stored in the first channel of ScReg by step srs (step S, 3).
.

Further, the first channel of NL Rag is set to "ON" (step S2), and the first channel of TL Reg is also set to "ON" (step 5ts).
.

Next, data from OP Reg & CFP Rag “
1'' is set (step 5za), and step S
! ? +S'18* 52Qt JO+ is executed in the same way as when sat is key C6. Therefore, the creation of the key musical tone of E is also started with the tone of the violin.

The same applies to C, E and the simultaneous operation key G, and this key G is assigned to the second channel. Therefore, data "2" is set in both OP Reg and FP Reg, and NLR@g ST L
Data “ON” is set in Reg, and SCR
A scale code G is written in the second channel of eg. As a result, musical tones C1°E, , and G are both emitted by the violin tone.

Next, when the dotted half note key of pitch C8 is turned on one beat later, the keys C, , E, , G,
Similarly, processing for the left key is executed, so that musical tone is emitted simultaneously with C2+E, , G and the violin tone in the sixth channel.

The same goes for the next musical note (Gs, Bs).
They are respectively treated as keys on the left side, and the 4th channel, respectively.
In the fifth channelization, each musical tone is emitted by the violin tone at the same time as the other Ct, E, , G, , C. Therefore, of the total eight channels of the musical tone creation system, six channels are used for the left key, and the remaining two channels (channels 6 and 7) are empty channels.

Next, when the first measure ends, all six keys are turned off. In this case, for example, to explain the key-off process of C7, after the process of step S, the flowchart of FIG. 14 is executed.

That is, W P Reg is cleared (step F
, ) 0 channel is specified, and then by step F, TL Re gloL Re gs NLRe by WP Reg
Data for each 0 channel of g is obtained. And T.L.
It is determined whether each data of RegXNL Reg and OL Rag is "ON", and then each of them is ONJ,
When roFFJ and rOFFJ are reached, it is determined that the key is off, and the process proceeds to step F6 via steps Fs, Fa, and Fa.
TLReg00 channel is turned off. Then, a key-off instruction is issued to the musical tone generating section 12, and as a result, the musical tone C1 is muted (step F't). Next, W.P.
Reg is incremented to ``1'', 1 channel is specified, and WP l (egO value is determined to be ``use'' or not, the process returns to step F2, and key-off is performed for the key E assigned to 1 channel. Processing is executed.

Thereafter, in the same manner, the G2. C8, C8, and B3 are also keyed off in the same way.

Even after entering the second measure, the channel assignment operation is the same, and the simultaneous operation keys of B2 HD3 + Fs are 6, respectively.
,7,0 channel. Then, when the next As key is turned on, it is assigned to channel 1, and 4-2
A musical tone is emitted with the tone of a violin.

Next, when the key 04 is turned on, this key belongs to the keys on the right, so the processing from steps S to S to assign 2 channels to this key is the same as described above, but step S7 ．． Now, the data of C8CReg (
G4) is larger than the data (C4) of KSPReg, that is, it is determined that it is the right key, and the process proceeds to step SSX. This step S□ corresponds to step S26, and the LTONE Reg[
The processing for RTONE Reg is simply replaced with the processing for RTONE Reg. Meko Niwa's key G4 is used to create a musical tone using flute tones in the second channel's musical tone creation system, and the violin tones of J, Ds, Fs, and As and the flute tones of 04 are emitted simultaneously. The channels are sequentially allocated in the order of key operations, regardless of the number of keys pressed on the left and right sides based on the key-split pitch C4. The same applies hereafter.

[Effects of the Invention] As described above, in the present invention, channels are assigned according to the key operation order regardless of the key split key group, and the channel assignment is performed for the operation key in correspondence with the key group. Since this is an electronic instrument with a key split function that allows sound to be emitted depending on the tone, when splitting a key, it is possible to obtain the maximum number of pronunciation channels for both the right and left keys, and it is also possible to play normally. This can be done with simple operations without any fuss, which has the advantage of greatly improving performance performance.

[Brief explanation of drawings]

FIG. 1 is an overall circuit diagram of an electronic musical instrument according to an embodiment of the present invention, FIG. 2 is a switch configuration diagram of the switch input section 4, and FIG.
The figure is a memory configuration diagram of the tone register, Figure 4 is a waveform diagram of the basic waveform, Figure 5 is a data configuration diagram of the waveform data of the basic waveform, Figure 6 is an envelope waveform diagram, and Figure 7 is its data configuration diagram. FIG. 8 is a diagram showing a specific example of an envelope waveform,
Figure 9 is the data content diagram, Figure 10 is the musical tone creation $12
11 is a circuit diagram of an envelope circuit, 12 (11 to (3) are diagrams explaining various registers, and 13 to 16 are flowcharts,
FIG. 17 is a diagram showing a musical score. 1...Keyboard, 2...CPU, 3...
-Key code size comparison section, 4.Old switch input section, 5.Tone register section, 6.Key split switch, 7.Split control section, 8...Key split chord paroxysm, 9...
...Tone register, 11...Register group, 12...Tone creation section, 13...Amplifier 0 Figure 3 and Figure 4 aoooo: fゝ＼ Jゝ＼＼ ■oo+:f go f-shij C5)010:See-L” (4)+0021. ;r1551111. -MepapaN
ζ1111. j')11215. -1""゛...
,. ■101:-Ro\2j\(Figure 5 Figure 6 Figure 7 Figure 7 I:\ Eye On Key ON drop in Figure 8? Figure 9 Figure 12■ LVvyr)LallJ v~t l'ri1sIer
) Fig. 12 C5) SP Re) Mouth ======L-RTONE Re&Ro=2=2m-
LTONE Re. Mouth==L==KoTONE O Mouth=22KoTONE n Fig. 12 (Fig. 16 OP R1!')] WPRet Ko FP Re3] FouNnFRe8 Fig. 14 Fig. 15

Claims (2)

[Claims] (1) In an electronic musical instrument that has multiple musical tone creation channels and generates the musical tone of the operational key using a specified tone in the channel assigned to the operational key, the keys on the keyboard are divided into multiple key groups. a tone setting means for setting a tone for each of the plurality of key groups; an assigning means for allocating a channel according to the key operation order regardless of the key group to which the operation key belongs; 1. An electronic musical instrument with a key split function, comprising: means for emitting sound with a tone set corresponding to the key group. (2) The electronic musical instrument according to claim 1, wherein the key splitting means is a means that allows the key splitting position to be arbitrarily set.