JPS61131118U - - Google Patents

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Publication number
JPS61131118U
JPS61131118U JP1324985U JP1324985U JPS61131118U JP S61131118 U JPS61131118 U JP S61131118U JP 1324985 U JP1324985 U JP 1324985U JP 1324985 U JP1324985 U JP 1324985U JP S61131118 U JPS61131118 U JP S61131118U
Authority
JP
Japan
Prior art keywords
output
amplifier
filter
detector
variable gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1324985U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1324985U priority Critical patent/JPS61131118U/ja
Publication of JPS61131118U publication Critical patent/JPS61131118U/ja
Pending legal-status Critical Current

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  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、この考案の一実施例による復調回路
を示す構成図、第2図は、従来の復調回路を示す
構成図、第3図は、従来の復調回路の特性を示す
図、第4図は、この考案の一実施例による復調回
路の周波数関係を示す図、第5図は、この考案の
一実施例による復調回路の特性を示す図である。 2は、利得可変増幅器、3は復調器、4は増幅
器、6は高域通過フイルタ、7は検波器、8はル
ープフイルタである。なお図中同一符号は、同一
又は相当部分を示す。
FIG. 1 is a block diagram showing a demodulation circuit according to an embodiment of the invention, FIG. 2 is a block diagram showing a conventional demodulation circuit, FIG. 3 is a diagram showing the characteristics of the conventional demodulation circuit, and FIG. FIG. 5 is a diagram showing the frequency relationship of a demodulation circuit according to an embodiment of this invention, and FIG. 5 is a diagram showing characteristics of a demodulation circuit according to an embodiment of this invention. 2 is a variable gain amplifier, 3 is a demodulator, 4 is an amplifier, 6 is a high-pass filter, 7 is a detector, and 8 is a loop filter. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 利得可変増幅器と、その増幅器の出力端に接続
され、周波数変調又は位相変調された信号を復調
する復調器と、復調出力を増幅する増幅器と、上
記増幅器の出力の一部をとり出す高域通過フイル
タと、上記フイルタ出力の振幅を検出する検波器
と、検波器出力を上記利得可変増幅器に帰還させ
るループフイルタとを備えたことを特徴とする復
帰回路。
a variable gain amplifier; a demodulator connected to the output end of the amplifier for demodulating a frequency-modulated or phase-modulated signal; an amplifier for amplifying the demodulated output; and a high-pass device for extracting a part of the output of the amplifier. 1. A recovery circuit comprising: a filter; a detector for detecting the amplitude of the output of the filter; and a loop filter for feeding back the output of the detector to the variable gain amplifier.
JP1324985U 1985-02-01 1985-02-01 Pending JPS61131118U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1324985U JPS61131118U (en) 1985-02-01 1985-02-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1324985U JPS61131118U (en) 1985-02-01 1985-02-01

Publications (1)

Publication Number Publication Date
JPS61131118U true JPS61131118U (en) 1986-08-16

Family

ID=30497083

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1324985U Pending JPS61131118U (en) 1985-02-01 1985-02-01

Country Status (1)

Country Link
JP (1) JPS61131118U (en)

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