JPS58111535U

JPS58111535U - FM receiver

Info

Publication number: JPS58111535U
Application number: JP647282U
Authority: JP
Inventors: 明石　泰昌
Original assignee: 株式会社ケンウッド
Priority date: 1982-01-22
Filing date: 1982-01-22
Publication date: 1983-07-29
Also published as: JPS6311769Y2

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図および第２図けそれぞれＦＭ受信機における従来
の中間周波段および復調段のブロック図。第３図は本考案の一実施例のブロック図。Ａ・・・中間周波段および復調段を構成する集積回路、
Ｂ・・・水晶発振子、Ｃ・・・発振回路、Ｄ・・・混合
回路、Ｅ・・・セラミックフィルタ、Ｆ・・・リミッテ
ィング増幅器、Ｇ□およびＨ・・・クワドラチャ復調回
路を構成する移相器および乗算器、■・・・バッファ増
幅器、Ｊ・・・スケルチ回路駆動用の演算増幅器、Ｋ・
・・スケルチ回路、Ｌ・・・スケルチスイッチ、Ｎ・・
・インピーダンス回路、Ｐ・・・整流回路、Ｓ・・・リ
ミッタ回路。FIGS. 1 and 2 are block diagrams of a conventional intermediate frequency stage and demodulation stage in an FM receiver, respectively. FIG. 3 is a block diagram of an embodiment of the present invention. A: an integrated circuit constituting an intermediate frequency stage and a demodulation stage;
B...Crystal oscillator, C...Oscillation circuit, D...Mixing circuit, E...Ceramic filter, F...Limiting amplifier, G□ and H...Constitute quadrature demodulation circuit. Phase shifter and multiplier, ■... Buffer amplifier, J... Operational amplifier for squelch circuit drive, K...
...Squelch circuit, L...Squelch switch, N...
・Impedance circuit, P...rectifier circuit, S...limiter circuit.

Claims

[Scope of utility model registration request]

In an FM receiver configured to detect a noise component in a demodulated output signal and drive a squelch circuit when the noise component exceeds a predetermined level, a limiter circuit is connected to the output end of the demodulation circuit. An FM receiver featuring