JPS6112795B2 - - Google Patents
Info
- Publication number
- JPS6112795B2 JPS6112795B2 JP7878976A JP7878976A JPS6112795B2 JP S6112795 B2 JPS6112795 B2 JP S6112795B2 JP 7878976 A JP7878976 A JP 7878976A JP 7878976 A JP7878976 A JP 7878976A JP S6112795 B2 JPS6112795 B2 JP S6112795B2
- Authority
- JP
- Japan
- Prior art keywords
- printing
- pattern
- metal foil
- ink
- matte
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Printing Methods (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7878976A JPS534609A (en) | 1976-07-02 | 1976-07-02 | Metal foil printed article and method of producing same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7878976A JPS534609A (en) | 1976-07-02 | 1976-07-02 | Metal foil printed article and method of producing same |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS534609A JPS534609A (en) | 1978-01-17 |
JPS6112795B2 true JPS6112795B2 (enrdf_load_stackoverflow) | 1986-04-10 |
Family
ID=13671638
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7878976A Granted JPS534609A (en) | 1976-07-02 | 1976-07-02 | Metal foil printed article and method of producing same |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS534609A (enrdf_load_stackoverflow) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63191080U (enrdf_load_stackoverflow) * | 1987-05-22 | 1988-12-08 | ||
US10862473B2 (en) | 2018-03-28 | 2020-12-08 | Psemi Corporation | Positive logic switch with selectable DC blocking circuit |
US10886911B2 (en) | 2018-03-28 | 2021-01-05 | Psemi Corporation | Stacked FET switch bias ladders |
US10951210B2 (en) | 2007-04-26 | 2021-03-16 | Psemi Corporation | Tuning capacitance to enhance FET stack voltage withstand |
US11018662B2 (en) | 2018-03-28 | 2021-05-25 | Psemi Corporation | AC coupling modules for bias ladders |
US11476849B2 (en) | 2020-01-06 | 2022-10-18 | Psemi Corporation | High power positive logic switch |
-
1976
- 1976-07-02 JP JP7878976A patent/JPS534609A/ja active Granted
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63191080U (enrdf_load_stackoverflow) * | 1987-05-22 | 1988-12-08 | ||
US10951210B2 (en) | 2007-04-26 | 2021-03-16 | Psemi Corporation | Tuning capacitance to enhance FET stack voltage withstand |
US10862473B2 (en) | 2018-03-28 | 2020-12-08 | Psemi Corporation | Positive logic switch with selectable DC blocking circuit |
US10886911B2 (en) | 2018-03-28 | 2021-01-05 | Psemi Corporation | Stacked FET switch bias ladders |
US11018662B2 (en) | 2018-03-28 | 2021-05-25 | Psemi Corporation | AC coupling modules for bias ladders |
US11418183B2 (en) | 2018-03-28 | 2022-08-16 | Psemi Corporation | AC coupling modules for bias ladders |
US11476849B2 (en) | 2020-01-06 | 2022-10-18 | Psemi Corporation | High power positive logic switch |
Also Published As
Publication number | Publication date |
---|---|
JPS534609A (en) | 1978-01-17 |
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