JPS61123964A - Channel control method - Google Patents

Abstract

PURPOSE:To improve processing speed by mounting the first storage part which stores the identified values from the head of both subchannel area and flag area, and the second storage part which stores the number of peripheral devices incorporated in channel controller. CONSTITUTION:Peripheral devices P1, P2, P3 and P5 are connected to a channel 3 and #1, #2 and #5 are given as hard numbers, respectively. Periperal device P4 is not connected, however, it is assumed that a hard number 34 is given. then, when P2, P5 and P4d1 of connected peripheral devices are turned on in sequence of this order, the necessary contents of storage parts M and N are sequently stored from head areas of subchannel area and flag storage area. This makes it possible to retrieve a flag from the head of flag storage area within the number of peripheral devices turned on when channel controlling is shifted from one peripheral device's processing to the other processing, and to find a sub-channel corresponding to its flag.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a hardware system that provides state information for peripheral devices and information on whether or not they are used, which is used to connect a plurality of peripheral devices to a central processing unit via channels. This invention relates to a channel control method that is improved so as to improve the amount of hardware for them and the speed of access to them.

Channels are used in information processing equipment to connect its multiple peripheral devices to a central processing unit. Since the channel successfully organizes the flow of information between multiple peripheral devices and one or more central processing units, its control is inevitably complex, requiring increased hardware and processing speed. A decline will occur.

Since such a problem lowers the evaluation of the entire system, it is desired to solve such a problem as much as possible.

[Conventional technology]

As shown in Figure 7, in the channels provided in conventional computers, hardware-determined numbers are assigned to connections a to f for each peripheral device, and peripheral devices are controlled according to these numbers. Corresponding subchannels, flags, etc. are fixedly arranged on the memory (see FIG. 8), and the subchannels, flags, etc. are configured so as to be used for managing peripheral devices by the channel.

[Problem that the invention seeks to solve]

When a channel is configured as described above, even if the peripheral device corresponding to the number determined by the node is not connected or the power is turned off, the peripheral device can be connected to that channel. Therefore, from the viewpoint of reducing hardware and improving processing speed, there is no good channel configuration. It's hard to say.

[Means for solving problems]

The present invention provides a channel control method that solves the above-mentioned technical problems as much as possible. In a digital processing device that requires retrieval of a sub-channel area for storing information and hardware numbers of peripheral devices and a flag area for indicating the processing status thereof, identification values are sequentially corresponding to the sub-channel area and the flag area from the beginning of the sub-channel area and the flag area. The first step is to store the
and a second storage section for storing the number of peripheral devices incorporated in the channel control, the sub-channel area and the flag area are accessed from the beginning, and if a certain peripheral device When transitioning from processing to processing of other peripheral devices, the transition can be made by searching flag areas equal to the number of peripheral devices.

[Effect]

According to the method of the present invention, when peripheral devices are connected to the central processing unit via a channel, the flag area is referenced from the beginning, and the number of referenced peripheral devices is the number of peripheral devices that are currently incorporated into the channel control. Ru. Furthermore, the subchannel area is also set corresponding to the flag area. On the other hand, the number of peripheral devices that are incorporated into the channel control is generally smaller than the number of peripheral devices that can be connected to the central processing unit via the channel.

Therefore, it is possible to enjoy an improvement in processing speed as well as a reduction in hardware.

[Example] Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows the main structure of the present invention. In this figure, 1
is a sub-channel area used for conventional channel control, and 2 is a flag storage area. In the present invention, these two areas are fixedly assigned to the hardware numbers of the peripheral devices shown in FIG. The present invention is characterized by providing a storage section M and a storage section N as means for controlling the variable change of the numbers. The storage unit M has a storage area fixedly corresponding to the above-mentioned number, and each of these storage areas stores a number indicating the order in which the power of the corresponding peripheral device was turned on. It stores the number of peripheral devices that are powered on.

A channel control aspect of the present invention having such characteristic parts will be explained below.

For convenience of explanation, as shown in FIG. 2, peripheral devices P1. P
a*Ps, Ps is connected to channel 3, and hardware number #1. #2. #3. #5 is given, and the peripheral device P4 is not connected, but it is assumed that #4 is given as the hardware number. Among the connected peripheral devices, the following three peripheral devices P2. P6. Assuming that the PIs are powered on in this order, the storage contents of the storage section M and the storage section N will be as shown in FIG. The required storage contents are stored, that is, the subchannel area 1 can store status information of the corresponding peripheral device, and the flag storage area 2 has a flag bit set.

Thus, in channel control, when transitioning from processing for a certain peripheral device to processing for another peripheral device, the contents of the storage section N, that is, the flags within the number of peripheral devices that are powered on, are transferred to the flag storage area 2. When a search is performed (referenced) from the beginning and the destination flag is referenced, the subchannel corresponding to the flag can be found, and the process can be shifted to the peripheral device corresponding to the subchannel.

Therefore, when transitioning from the processing of one peripheral device to the processing of another peripheral device, there is no need to refer to unnecessary flags as in the prior art, and the processing speed is improved accordingly. Furthermore, since the subchannel area only needs to be equal to the number of peripheral devices that will be powered on, the number of subchannel areas can be reduced accordingly, resulting in a reduction in hardware.

The reason why this sub-channel area can be reduced is as follows. That is, this is because the number of peripheral devices that are powered on and in use is generally smaller than the number of connected peripheral devices including peripheral devices that are powered off. This also applies to the case where only the first half of the subchannel area is stored in a high-speed read/write area, and the rest is stored in a general memory.

Additionally, as mentioned above, the number of peripheral devices that are turned on and in use is generally much smaller than the maximum number of devices that can be connected, so the number of devices that can be connected to a channel tends to increase in recent years. The present invention plays a large role in the system configuration environment.

After any number of peripheral devices have been powered on as described above, if one more peripheral device is powered on, the third
As shown in the flowchart in the figure, the value of the memory section N is incremented by 1 in step Sl, and the value of the memory section N is written in the area corresponding to the peripheral device whose power is turned on on the memory section M with the step knob S2. .

In this way, channel control including added peripherals is the same as described above.

Conversely, a certain peripheral device, for example in the example above, has a hard number #
If the peripheral device to which number 2 is assigned is powered off, the contents of storage units M and N are changed as follows. That is, the value 1 on the memory unit M corresponding to the peripheral device to which the hardware number #2 is assigned is read out (step 510 in FIG. 4), and the read value 1 and the value 3 in the memory unit N are read out (step 510 in FIG. 4). are compared. Since these values are not equal (step 5ll), the read value 1 is written into the storage area where the value in the storage unit M that matches the value 3 in the storage unit N is stored (step Sl 2). In addition, when the power is turned off, the contents of the subchannel area l and the flag storage area 2, which were assigned to the peripheral device whose power-on order is number 3 (that is, the value that matches the value 3 in the storage section N), are deleted. is copied to the subchannel area 1 and flag storage area 2 that were assigned to the peripheral device (in the above example, the peripheral device with the first power-on order) (step 513). Then, in step S14, the value 3 in the storage section N is decreased by 1.

The contents of storage sections M and N, subchannel area 1, and flag storage area 2 after the above-described processing are as shown in FIG.

In this way, the channel control when each content is changed is the same as described above, and the effect is also the same.

FIG. 6 is a processing flowchart that is a generalized version of the processing flowchart shown in FIG. a is a value stored in the storage area of the storage unit M corresponding to the peripheral device A whose power has been turned off, and n is a value stored in the storage unit N.

In the above embodiment, power on/off is used as a signal to incorporate the peripheral device into channel control, but other appropriate signals may be used instead.

〔Effect of the invention〕

As explained above, according to the present invention, the following effects can be obtained: (1) reduction of bar dunia, and (2) improvement in channel control processing speed.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the main configuration of the present invention, FIG. 2 is a diagram showing a channel system controlled by the present invention, FIG. 3 is a processing flowchart when the power is newly turned on, and FIG. 4 is a diagram showing the main part configuration of the present invention. is a processing flowchart when the peripheral device to which the hardware number #2 is assigned is turned off in the specific example shown in FIG. 2, and FIG. 5 is a processing flowchart after processing according to the processing flowchart in FIG. The same diagram as Figure 1, Figure 6 is a diagram showing a processing flowchart that is a generalization of the processing flowchart in Figure 4, Figure 7 is a block diagram showing a computer system,
FIG. 8 is a diagram showing a subchannel area and a flag storage area used for channel control in the system shown in FIG. In the figure, 1 is a subchapter area, 2 is a flag storage area, 3 is a channel, P to P5 are peripheral devices, and M and N are storage units. Patent applicant Fujitsu Limited > E-j agent
Patent Attorney Calibration Koshibu 1 Figure 6

Claims (2)

[Claims] (1) When connecting multiple peripheral devices to the central processing unit via channels, the subchannel area stores status information and fixed hardware numbers corresponding to the peripheral devices, and indicates the processing status of the peripheral devices. In a digital device that requires a search for a flag area, a first storage unit stores identification values in a storage area corresponding to a peripheral device sequentially from the beginning of the sub-channel area and the flag area, and is incorporated into channel control. and a second storage unit for storing the number of peripheral devices being used, and the sub-channel area and the flag area are accessed from the beginning thereof, and the processing of one peripheral device is changed from the processing of one peripheral device to the processing of another peripheral device. A channel control system characterized in that the transition can be performed by searching flag areas equal to the number of peripheral devices. (2) The signal for releasing a certain peripheral device from the channel control is a power-off signal for the peripheral device, the identification value is a power-on order value, and the signal is a power-off signal for the peripheral device, and the identification value is a power-on order value in response to the power-off of the certain peripheral device. If the value of the first storage unit corresponding to the certain peripheral device and the value of the second storage unit that are read out match, the value of the second storage unit is subtracted by 1, and if they do not match, the value of the second storage unit is subtracted by 1; is the first value that matches the value in the second storage unit.
The read value is stored in the storage area of the storage unit, and the contents of the sub-channel area and flag area corresponding to the value of the second storage unit before subtraction are stored in the sub-channel area corresponding to the read value. 2. The channel control method according to claim 1, wherein the channel control method is performed by subtracting 1 from the value in the second storage unit after storing the value in the channel area and the flag area.