JPS6110983B2 - - Google Patents

Info

Publication number
JPS6110983B2
JPS6110983B2 JP52129389A JP12938977A JPS6110983B2 JP S6110983 B2 JPS6110983 B2 JP S6110983B2 JP 52129389 A JP52129389 A JP 52129389A JP 12938977 A JP12938977 A JP 12938977A JP S6110983 B2 JPS6110983 B2 JP S6110983B2
Authority
JP
Japan
Prior art keywords
lead frame
metal
semiconductor chip
thin metal
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52129389A
Other languages
Japanese (ja)
Other versions
JPS5462780A (en
Inventor
Yutaka Osozawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP12938977A priority Critical patent/JPS5462780A/en
Publication of JPS5462780A publication Critical patent/JPS5462780A/en
Publication of JPS6110983B2 publication Critical patent/JPS6110983B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 本発明はリードフレームの半導体チツプを搭載
する面と反対側の面に熱伝導性の優れた異種金属
を厚く接着することにより熱抵抗を小さくした半
導体装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device in which thermal resistance is reduced by thickly bonding a dissimilar metal with excellent thermal conductivity to the surface of a lead frame opposite to the surface on which a semiconductor chip is mounted. .

一般に、半導体装置の電力消費による温度上昇
は半導体素子の特性上、信頼性上の問題を引き起
こす。特に、樹脂封止型半導体装置の熱抵抗はセ
ラミツク容器あるいは金属容器に組み込まれた半
導体装置の熱抵抗に比較しかなり高い為、大きな
電力を消費する樹脂封止型半導体装置では過大な
温度上昇により特性上、信頼性上の問題を引き起
こす場合があつた。その為、従来はリードフレー
ムを使用する半導体装置においては、半導体素子
の消費電力により発した熱をリードフレームを介
して放散させるように、内部リードの半導体チツ
プを搭載した面にリードフレームの素材よりも熱
伝導性の優れている銀等の異種金属を接着するこ
とにより半導体装置の熱抵抗を下げる方法が用い
られていた。
Generally, a temperature increase due to power consumption of a semiconductor device causes reliability problems due to the characteristics of the semiconductor element. In particular, the thermal resistance of resin-sealed semiconductor devices is considerably higher than that of semiconductor devices built into ceramic or metal containers, so resin-sealed semiconductor devices that consume large amounts of power may suffer from excessive temperature rise. Due to its characteristics, reliability problems could occur in some cases. For this reason, conventionally in semiconductor devices that use lead frames, the material of the lead frame is placed on the surface of the internal leads on which the semiconductor chip is mounted, so that the heat generated by the power consumption of the semiconductor element is dissipated through the lead frame. A method has also been used to lower the thermal resistance of semiconductor devices by bonding dissimilar metals such as silver, which have excellent thermal conductivity.

第1図は従来のリードフレームの中央部近傍の
断面図である。
FIG. 1 is a sectional view of the vicinity of the center of a conventional lead frame.

リードフレームのアイランド部1上に半導体チ
ツプ2が搭載され、半導体チツプ2と内部リード
3とは金属細線4で接続される。金属細線4が接
続される側の内部リード表面には熱伝導の良好な
金属、例えば銀の層5が厚く形成され、半導体チ
ツプ2に発生する熱の一部を金属細線4を通して
内部リードに導き、熱抵抗を下げるようにしてい
た。しかし、金属層5が銀のように柔らかい材質
である場合、熱圧着あるいは超音波圧着等により
金属細線4を内部リードに接続する際の圧力が前
記金属層5に吸収されてしまい金属細線4と内部
リードとの接続が不完全なものになるという欠点
があつた。
A semiconductor chip 2 is mounted on an island portion 1 of a lead frame, and the semiconductor chip 2 and internal leads 3 are connected with thin metal wires 4. A thick layer 5 of a metal with good thermal conductivity, such as silver, is formed on the inner lead surface on the side to which the thin metal wire 4 is connected, and a part of the heat generated in the semiconductor chip 2 is guided to the inner lead through the thin metal wire 4. , to lower thermal resistance. However, when the metal layer 5 is made of a soft material such as silver, the pressure when connecting the thin metal wire 4 to the internal lead by thermocompression bonding or ultrasonic pressure bonding is absorbed by the metal layer 5, and the thin metal wire 4 There was a drawback that the connection with the internal lead was incomplete.

本発明は、上述した欠点を除去し、金属細線と
の接続が良く、かつ熱放散性の良好なリードフレ
ームを使用した半導体装置を提供するものであ
る。
The present invention eliminates the above-mentioned drawbacks and provides a semiconductor device using a lead frame that has good connection with thin metal wires and good heat dissipation.

本発明は、リードフレームに半導体チツプを搭
載し、該半導体チツプとリードフレームとを金属
細線で接続する半導体装置において、リードフレ
ームの半導体チツプを搭載する面と反対側の面の
一部もしくは全部に熱伝導の良好な金属を設けた
ことを特徴とする。
The present invention relates to a semiconductor device in which a semiconductor chip is mounted on a lead frame and the semiconductor chip and the lead frame are connected by a thin metal wire. It is characterized by being made of metal with good heat conduction.

本発明を実施例により説明する。 The present invention will be explained by examples.

第2図は本発明にかかるリードフレームの中央
部近傍の断面図である。
FIG. 2 is a sectional view of the vicinity of the center of the lead frame according to the present invention.

図において、11はリードフレームのアイラン
ド部、12は半導体チツプ、13は内部リード、
14は金属細線、15は金属細線とのボンデイン
グ性の良好な金属の層、16は熱伝導の良好な金
属の層である。金属層15は通常の厚さとし、金
属層16は通常よりも厚くする。
In the figure, 11 is an island part of the lead frame, 12 is a semiconductor chip, 13 is an internal lead,
14 is a metal thin wire, 15 is a metal layer with good bonding properties with the metal thin wire, and 16 is a metal layer with good heat conduction. The metal layer 15 is made to have a normal thickness, and the metal layer 16 is made thicker than usual.

このような構造の半導体装置にすれば、金属細
線とリードフレームとの接続部に接着された金属
細線接続用金属が厚い為に起る両者間の不完全な
接続を解消し、かつ半導体素子の発した熱を厚く
接着された異種金属16により効率よく放散させ
ることができ熱抵抗を大幅に改善することができ
る。
A semiconductor device having such a structure eliminates incomplete connections between the thin metal wires and the lead frame due to the thickness of the thin metal wire connection metal bonded to the connection portion of the lead frame, and also eliminates the incomplete connection between the thin metal wires and the lead frame. The generated heat can be efficiently dissipated by the thickly bonded dissimilar metal 16, and the thermal resistance can be greatly improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来の半導体装置におけるリードフレ
ームの中央部近傍の断面図、第2図は本発明にか
かるリードフレームの中央部近傍の断面図であ
る。 1,11……アイランド部、2,12……半導
体チツプ、3,13……内部リード、4,14…
…金属細線、5,15……金属細線接続用金属、
16……熱伝導の良好な金属。
FIG. 1 is a sectional view of the vicinity of the center of a lead frame in a conventional semiconductor device, and FIG. 2 is a sectional view of the vicinity of the center of a lead frame according to the present invention. 1, 11... Island portion, 2, 12... Semiconductor chip, 3, 13... Internal lead, 4, 14...
...Thin metal wire, 5,15...Metal for connecting thin metal wire,
16...Metal with good thermal conductivity.

Claims (1)

【特許請求の範囲】[Claims] 1 リードフレームに半導体チツプを搭載し、該
半導体チツプとリードフレームとを金属細線で接
続する半導体装置において、リードフレームの半
導体チツプを搭載する面と反対側の面の一部もし
くは全部に熱伝導の良好な金属を設けたことを特
徴とする半導体装置。
1. In a semiconductor device in which a semiconductor chip is mounted on a lead frame and the semiconductor chip and the lead frame are connected by a thin metal wire, a part or all of the surface of the lead frame opposite to the surface on which the semiconductor chip is mounted is provided with heat conduction. A semiconductor device characterized by being provided with a good metal.
JP12938977A 1977-10-27 1977-10-27 Semiconductor device Granted JPS5462780A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12938977A JPS5462780A (en) 1977-10-27 1977-10-27 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12938977A JPS5462780A (en) 1977-10-27 1977-10-27 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5462780A JPS5462780A (en) 1979-05-21
JPS6110983B2 true JPS6110983B2 (en) 1986-04-01

Family

ID=15008360

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12938977A Granted JPS5462780A (en) 1977-10-27 1977-10-27 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5462780A (en)

Also Published As

Publication number Publication date
JPS5462780A (en) 1979-05-21

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