JPS61104642A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS61104642A JPS61104642A JP22592784A JP22592784A JPS61104642A JP S61104642 A JPS61104642 A JP S61104642A JP 22592784 A JP22592784 A JP 22592784A JP 22592784 A JP22592784 A JP 22592784A JP S61104642 A JPS61104642 A JP S61104642A
- Authority
- JP
- Japan
- Prior art keywords
- film
- psg film
- psg
- concentration
- low concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Local Oxidation Of Silicon (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
（産業−にの利用分野）
この発明は半導体装置、詳しくは、半導体集積回路にお
ける中間絶縁膜に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a semiconductor device, and more particularly, to an intermediate insulating film in a semiconductor integrated circuit.
（従来の技術）
従来、半導体集積回路、持にンリコンゲートＭ ＯＳ
Ｂ！！集積回路においては、下層構造とアルミ配線との
間の中間絶縁１１％と１７で、ＣＶ Ｉ） （ＣＩ＋ｅ
ｎｔｉｃａｌＶａｐｏｒ Ｔｌｅｐｏｓｉｔｉｏｎ）
？ＪｉによるＰ Ｓ Ｇ （１’ｈｏｓｐｈｏｒｕｓＳ
ｉｌｉｃａｔｅ Ｇｌａｓｓ）膜を用いている。乙のＰ
Ｓ ｒ：膜は、Ｎａなどの金属イオンに対ずろバリヤ
と１７て有効であること、４００〜５００℃程度のｌ晶
度で実用的な成長速度が得られること、膜中のリ−・制
度を高めることにより１０００℃程度のｌ易痘の熱処理
で流動性を示し、１；地段差の低減が−ｎｆ能であるこ
と、などの性質により広く中間絶縁膜として使用されで
いる。(Prior art) Conventionally, semiconductor integrated circuits, silicon gate MOS
B! ! In integrated circuits, the intermediate insulation between the underlying structure and the aluminum wiring is 11% and 17, and CV I) (CI+e
nticalVaporTreposition)
? P S G (1'hosphorusS) by Ji
ilicate Glass) membrane is used. Otsu's P
Sr: The film must be effective as a barrier against metal ions such as Na, a practical growth rate can be obtained at a crystallinity of about 400 to 500°C, and the Lie regularity in the film must be It has been widely used as an intermediate insulating film due to its properties such as: 1) it exhibits fluidity when subjected to a heat treatment of about 1000° C. by increasing the 1,000 °C;
（発明が解決し、１うとする問題点）
しかし、例えばＲｅ１． Ｐｈｙｓ、 Ｐｒｏｃ
Ｉ−２，（＋７伺ｌ）］７２−・Ｐ１７９に記載されて
いる、１う（、二、ｆ）ＳＧ腹膜中り′Ｊ（，１、その
膜中の濃度が２０％（Ｉ）２０５Ｗ１％）以−１−にな
ると、ＰＳＧ膜１−に設けられるアルミ配線の腐食の原
因となることが知られでいる。(Problems to be solved by the invention) However, for example, Re1. Phys, Proc
1 (, 2, f) SG peritoneum 'J (, 1, the concentration in the membrane is 20% (I) 205W1 %) or less than -1- is known to cause corrosion of the aluminum wiring provided in the PSG film 1-.
一方、Ｐ Ｓ Ｇ膜中のリン濃度を２０％以下とずろと
、アルミ配線の腐食が起こらないが、フローのおこるン
ＧＮ度が１０００℃以−１−となる。ずなわら、１）
Ｓ Ｇ膜中のリン濃度とフローの起こるｌ晶度は相関か
あり、Ｐ Ｓ Ｇ膜中のリン濃度を、アルミ配線の腐食
の起こらない２０％以下とずろと、７０−の起こる潤度
（ま］ ０００℃以−にとなり、下地構造のトランジス
タ素子特性に変化を起こさずに行えろ実用的な熱処ｆ！
ＩＩ渇度である９００℃程度ではフローに。）二ろ段差
の低減はほとんど起こさない。On the other hand, if the phosphorus concentration in the PSG film is set to 20% or less, corrosion of the aluminum wiring does not occur, but the flow occurs at a GN degree of 1000° C. or higher. Zunawara, 1)
There is a correlation between the phosphorus concentration in the SG film and the degree of crystallinity at which flow occurs.If the phosphorus concentration in the PSG film is set to 20% or less, which does not cause corrosion of the aluminum wiring, the moisture content at 70- A practical heat treatment that can be carried out at a temperature of 000°C or higher without causing any change in the transistor element characteristics of the underlying structure.
At about 900℃, which is II thirst, it becomes a flow. ) There is almost no reduction in the level difference.
９００℃程度の熱処理で充分なフローを行うためには、
ＰＳＧ膜中のリン濃度を２６％以Ｉ−とする必要がある
のである。In order to achieve sufficient flow with heat treatment at around 900℃,
The phosphorus concentration in the PSG film needs to be 26% or more I-.
ＯＪ、１−の５１−うにＰＳＧ膜を中間絶縁膜と１７で
ｆ史用した場合、ＰＳＧ膜中のリン濃度が低い場合（ま
、下地段差の平坦化が起こらず、その上に配線されるア
ルミ配線の段差での断線や抵抗増大か発生しやすくなり
、」、たリン濃度が高い場合は、アルミ配線の腐食が発
生−４る。OJ, 1-51- When a PSG film is used as an intermediate insulating film in 17, if the phosphorus concentration in the PSG film is low (well, flattening of the underlying step does not occur and wiring is done on top of it) Disconnection and increased resistance are likely to occur at steps in the aluminum wiring, and if the phosphorus concentration is high, corrosion of the aluminum wiring will occur.
（問題点を７’Ｊｆ沃するだめの手段）そこで、この発
明では、低濃度ＰＳＧ膜、その十のフロー゛処理を行つ
ｌ口高濃度１） Ｓ Ｇ ｌ模まｌ二層、ＩＢＰＳＧ膜
Ｊう１び、その−（−の低濃度ｆうＳ（］膀の３層で中
間絶縁膜を形成Ｊる。(Means to solve the problem) Therefore, in this invention, a low-concentration PSG film, a high-concentration 1) S G imitated double layer, an IBPSG film An intermediate insulating film is formed by three layers: 1, 2, and 3 layers with a low concentration of -(-).
（作 用）
中間絶縁膜を１４記のように構成すると、最１一層の低
ａ度Ｐ Ｓ Ｇ膜の１−１こ金属配線が形成されるＪ″
うになるの−（、中間絶縁膜中のリンに原因Ｊろ金属配
線の腐食が防市されろ。まノニ、中間層の高濃度１）
Ｓ Ｇ膜」、たＩＪ ｎ ｒ）Ｓ に膜−（−フロー処
理に」すＦ地段差が充分に低減さ１＋ろので、ｉｌ／−
坦１Ｆｉｉ−ｌ−に金属配線が形成さオ；る］うになる
。、さらに、中間層のＰＥＧ膜」、／：１．、ｌ ｒ’
ｌ １−）Ｓ Ｇ膜は高潮１會てあろＩこめ、フτＪ−
処理は低温−Ｃ行い得る。(Function) When the intermediate insulating film is configured as shown in item 14, metal wiring is formed in the 1-1 layer of the lowest a-degree PSG film.
(The corrosion of metal wiring caused by phosphorus in the intermediate insulating film should be prevented. Manoni, high concentration in the intermediate layer 1)
SG membrane, IJ n r) S membrane - (- flow treatment) F ground difference is sufficiently reduced by 1+ filter, so il/-
Metal wiring is formed on the flat surface 1Fii-l-. , furthermore, a PEG film of an intermediate layer", /:1. , l r'
l 1-) The S G film is exposed to a high tide, and then the sg film is
Treatment may be carried out at low temperature-C.
（実施例） 以下この発明の一実施例を図面を参照し−（説明ずろ。(Example) An embodiment of the present invention will be explained below with reference to the drawings.
第１図（１この発明の一実施例の＃’Ｂ面図−Ｃある。FIG. 1 (1) View #'B side view-C of one embodiment of the present invention.
この図において、１（Ｊ、段差を有して下地構−３＝
造を形成１７た半導体基板であり、この基板１上に中間
絶縁膜２が形成される。この中間絶縁膜２は、低濃度の
ＰＳＧ膜２ｎ、高濃度のＰＳＧ膜２ｂお」−び低濃度の
ＰＳＧ膜２ｃを下から順に有する３層構造とされる。こ
とて、最下層と最」二層の低濃度のＩ） Ｓ Ｇ膜２ａ
、２ｃば、具体的には、２２０５ｗｔ％が０〜２０％の
ＰＳＧ膜であり、最下層の１） Ｓ Ｇ膜２ａは０．２
〜０．５ μｍ厚、最」二層のＰＳＧ膜２ｃｉ、ｉ’０
．Ｉ〜０５μｍ厚にそれぞれ形成される。In this figure, 1 (J) is a semiconductor substrate having a base structure 17 formed with a step, and an intermediate insulating film 2 is formed on this substrate 1. This intermediate insulating film 2 has a low It has a three-layer structure consisting of a high-concentration PSG film 2n, a high-concentration PSG film 2b, and a low-concentration PSG film 2c in order from the bottom.In other words, the lowest concentration layer and the lowest two layers of low concentration I). SG film 2a
, 2c, specifically, 2205wt% is a PSG film of 0 to 20%, and the bottom layer 1) SG film 2a is 0.2wt%.
~0.5 μm thick, two-layer PSG film 2ci, i'0
．． They are each formed to have a thickness of I~05 μm.
また、中間層の高濃度のＰＳＧ膜２１）は、２２０５ｗ
ｔ％が２θ〜３０％のＰＳＧ膜であり、０．８１ｚｍ−
２ｐ ｍ厚に形成されろ。さらに、乙の中間層の高濃度
（７）ＰＳＧ膜２ｂは、９００℃〜９５０℃テ３０分〜
６０分間熱処理を行うことにより充分なフロー処理が実
施されており、表面ば平坦化している。Moreover, the high concentration PSG film 21) of the intermediate layer is 2205w
It is a PSG film with t% of 2θ~30%, and 0.81zm-
Form to a thickness of 2pm. Furthermore, the high concentration (7) PSG film 2b of the intermediate layer B was heated at 900°C to 950°C for 30 minutes to
By performing the heat treatment for 60 minutes, sufficient flow treatment was carried out, and the surface was flattened.
そして、このような３層構造の中間絶縁膜２上には、図
示しないコンタク１一孔によって下地構造と接続されて
、金属配線としてのアルミ配Ｍ４３が形成さオ］る。Then, on the intermediate insulating film 2 having such a three-layer structure, an aluminum wiring M43 is formed as a metal wiring, connected to the underlying structure through a hole of a contact 1 (not shown).
以」二のような一実施例の装置は次のようにして製造さ
４１ろ。コす、下地構造の完成しｌ：基板１１゜に、Ｉ
”、、Ｏｂｗｔ％が０〜２０％のＰ Ｓ Ｃ； １ｌｊ
Ｊ ２ ａを０２〜０５μｍの厚さにＣＶ ｌ）法にｊ
′り成長さ４１ろ、。A device according to an embodiment as described below is manufactured as follows.41. After completion of the base structure, place I on the substrate 11°.
",, P SC with Obwt% of 0 to 20%; 1lj
J 2 a to a thickness of 02 to 05 μm using the CV l) method.
'I've grown to 41.
次１こ、その」二１こ、Ｐ２Ｏ５ｗｔ％が２０〜３０％
のＩ）ＳＧ膜２ ））を０．８μｍ 〜２１ｔ ｍの厚
さにＣＶ Ｉ）法によって成長させる。その後、９００
’ｃ〜９５０℃二で３０分〜６０分間熱処理を行うこ
とにより高濃度のＰＳＧ膜２））を充分にフローし、表
面を平坦化する。次に、その」二に、Ｐ２Ｏ５ｗｔ％が
０〜２０％であるＰＳＧ膜２ｃをＯ，］ 〜０．５７ｚ
ｍの厚さにｃｖｎ法により形成する。以後は、通常知
らねている方法に１＝リコンタクト孔形成、アルミ配線
３の形成などを行い、半導体装置を完成させる。Next 1, 21, P2O5wt% is 20-30%
I) The SG film 2)) is grown to a thickness of 0.8 μm to 21 tm by the CV I) method. After that, 900
By performing heat treatment at ~950° C. for 30 to 60 minutes, the highly concentrated PSG film 2)) is sufficiently flowed and the surface is flattened. Next, the PSG film 2c with a P2O5wt% of 0 to 20% is heated to 0.57z.
It is formed to a thickness of m by the CVN method. Thereafter, steps such as forming a re-contact hole and forming an aluminum wiring 3 are performed using commonly known methods to complete the semiconductor device.
なお、以−にの一実施例では、３層構造の中ｒ１Ｍ絶縁
膜２の中間層として高濃度のＰＳＧ膜２ｂを用いたが、
これに代えて高濃度のＲＰ Ｓ Ｇ膜、具体的には、ｒ
”２０５ｗＬ％が１５〜２５％、 Ｒ２０，、ｉｖｔ％
が８〜１５％のＢＰＳＧ膜を用いてもよい。その時、Ｂ
ＰＳＧ膜の厚みは０８μｍ〜２ メｔ ｍとする。In the example described above, a high concentration PSG film 2b was used as the intermediate layer of the R1M insulating film 2 in the three-layer structure.
Instead of this, a high concentration RPSG film, specifically r
"205wL% is 15-25%, R20,, ivt%
A BPSG film with 8% to 15% may be used. At that time, B
The thickness of the PSG film is 08 μm to 2 m.
（発明の効果）
以り説明したように、この発明の半導体装置によ、５い
ては、低濃度ＰＳＧ膜、その上のフロー処理を行った高
濃度ＰＳＧ膜またはＴ３ Ｐ Ｓ Ｇ膜および、その１
−の低濃度ＰＳＧ膜の３層で中間絶縁１挨を形成する。(Effects of the Invention) As explained above, the semiconductor device of the present invention includes a low-concentration PSG film, a high-concentration PSG film or a T3 PSG film on which a flow treatment has been performed, and the like. 1
An intermediate insulating layer is formed by three layers of low concentration PSG films.
乙のようにすれば、最ト層の低濃度１）ＳＧ膜の１−に
金属配線が形成されろことになるので、中間絶縁膜中の
リンに原因する金属配線の腐食を防市できる。、１、た
、中間層の高濃度Ｔ’ｌ Ｓ Ｇ膜また１ｉ ＲＰ Ｓ
Ｇ膜て７０−処理により下地段差を充分に低減して、
平１［１曲上で金属配線を形成できるので、段差での金
属配線の断線や抵抗増大も防Ｉトできる。さらに、中間
層のＰＳＧ膜：ｌ：たはＨＰ Ｓ Ｇ膜は高濃度であろ
ｔ：め、７０−処理（平坦化）は９００〜９５０℃とい
う低ン昂で行うことが可能となり、その結果、下地構造
中の素子の特性を何ら変化させろことなしに充分な平坦
化か可能となる。If it is done as in (B), metal wiring will be formed in the lowest concentration 1) SG film of the lowest layer, so corrosion of the metal wiring caused by phosphorus in the intermediate insulating film can be prevented. , 1, high concentration T'l S G film of intermediate layer and 1i RP S
G film 70- treatment sufficiently reduces the base level difference,
Since the metal wiring can be formed on one curve, it is possible to prevent disconnection of the metal wiring and increase in resistance at differences in level. Furthermore, since the intermediate layer PSG film or HP S G film has a high concentration, the 70-treatment (planarization) can be performed at a low temperature of 900 to 950°C, and as a result, , sufficient planarization can be achieved without any change in the characteristics of the elements in the underlying structure.
第１図はこの発明の半導体装置の一実施例を示す断面図
である。
１ 半導体基板、２ ・中間絶縁膜、２ａ 紙製−７＝
度（７） Ｐ Ｓ Ｇ 膜、２ ｂ −５４ａ度（７）
Ｐ Ｓ Ｇ膜、２ｃ低濃１αの１）８Ｇ膜、３ アル
ミ配線。FIG. 1 is a sectional view showing an embodiment of the semiconductor device of the present invention. 1 Semiconductor substrate, 2 ・Intermediate insulating film, 2a Paper -7=degrees (7) PSG film, 2b -54a degrees (7)
PSG film, 2c low concentration 1α 1) 8G film, 3 aluminum wiring.
Claims (2)
半導体装置において、低濃度ＰＳＧ膜、その上のフロー
処理を行った高濃度ＰＳＧ膜またはＢＰＳＧ膜および、
その上の低濃度ＰＳＧ膜の３層で前記中間絶縁膜を形成
したことを特徴とする半導体装置。(1) In a semiconductor device having an intermediate insulating film between an underlying structure and a metal wiring, a low concentration PSG film, a high concentration PSG film or a BPSG film subjected to flow treatment thereon, and
A semiconductor device characterized in that the intermediate insulating film is formed of three layers of a low concentration PSG film thereon.
ｔ％が０〜２０％であるＰＳＧ膜を、中間層の高濃度Ｐ
ＳＧ膜またはＢＰＳＧ膜として、Ｐ＿２Ｏ＿５ｗｔ％が
２０〜３０％であるＰＳＧ膜またはＰ＿２Ｏ＿５ｗｔ％
が１５〜２５％、Ｂ＿２Ｏ＿３ｗｔ％が８〜１５％であ
るＢＰＳＧ膜を、また最上層の低濃度ＰＳＧ膜として、
Ｐ＿２Ｏ＿５ｗｔ％が０〜２０％であるＰＳＧ膜を用い
ることを特徴とする特許請求の範囲第１項記載の半導体
装置。(2) As the lowest layer low concentration PSG film, P_2O_5w
A PSG film with a t% of 0 to 20% is coated with a high concentration of P in the intermediate layer.
As a SG film or a BPSG film, a PSG film or P_2O_5wt% in which P_2O_5wt% is 20 to 30%
is 15 to 25% and B_2O_3wt% is 8 to 15%, and as the top layer low concentration PSG film,
The semiconductor device according to claim 1, characterized in that a PSG film having a P_2O_5wt% of 0 to 20% is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22592784A JPS61104642A (en) | 1984-10-29 | 1984-10-29 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22592784A JPS61104642A (en) | 1984-10-29 | 1984-10-29 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS61104642A true JPS61104642A (en) | 1986-05-22 |
Family
ID=16837070
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22592784A Pending JPS61104642A (en) | 1984-10-29 | 1984-10-29 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61104642A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63111668A (en) * | 1986-10-30 | 1988-05-16 | Mitsubishi Electric Corp | Semiconductor device and manufacture of the same |
-
1984
- 1984-10-29 JP JP22592784A patent/JPS61104642A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63111668A (en) * | 1986-10-30 | 1988-05-16 | Mitsubishi Electric Corp | Semiconductor device and manufacture of the same |
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