JPS6110285A - Manufacture of semiconductor light emitting diode - Google Patents

Abstract

PURPOSE:To enable the semiconductor grown surface to be flattened by precise control of the dimensions of the light emitting region and by excellent heat dissipation by a method wherein a buried layer is opened by selective removal, and the second semiconductor layer is formed in the aperture and on the buried layer, thus making the first and second semiconductor layers as clad layers. CONSTITUTION:A clad layer 2 and an active layer 3 are successively grown on a substrate 1. The buried layer 5 is grown above the active layer 3 over the whole surface. Patterning is carried out by forming a mask to form a through-region 6 in the buried layer 5, and another clad layer 4 is grown. An ohmic contact layer 8 is grown on the clad layer 4; further, an Au-Zn electrode 9 is formed. Then, semiconductor light emitting diode with the division of the light emitting region can be obtained by being equipped with a buried layer selectively arranged in proximity to the active layer and having the conductivity type different from that of the surrounding semiconductor layer or a higher resistance value than the surrounding semiconductor. Since the buried layer is formed by growth on the active layer, the buried layer can be grown by being made close to the part of flat formation of the active layer; accordingly, the size of the light emitting region can be precisely controlled by reducing the distance between the active layer and the buried layer.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor light emitting diode suitable as a light source for optical communications, for example.

Conventionally, semiconductor light emitting diodes for optical communication have been required to be coupled with optical communication fibers with high efficiency, and the light emitting area has been limited to a small size in order to eliminate defects on the substrate. things are being done. Specifically, for example, the light emitting area is kept small by selectively forming an insulating film such as a silicon oxide film on the surface to confine the current path. However, in such a configuration, it is difficult to precisely control the dimensions of the light emitting region, and the presence of the insulating film deteriorates heat dissipation, shortening the lifespan and causing thermal distortion and elastic distortion, which deteriorates the characteristics. often worsens.

The present invention provides a method for manufacturing a semiconductor light emitting diode in which the dimensions of the light emitting region are precisely controlled, heat dissipation is good, and the semiconductor growth surface is flat, and will be described in detail below.

Figure 1 shows InGaAs-1n produced according to the present invention.
FIG. 2 is a cross-sectional view of the main parts of a P-based double/telojunction light-emitting device.

In the figure, 1 is an n-type 1nP substrate, 2 is an n-type 1nP cladding layer, 3 is an InGaAs active layer, 4 is a p-type 1nP cladding layer, and 5 is an n-type (or high resistance) InP (or In
6 indicates a penetration region of the p-type 1nP cladding layer, and W indicates the diameter (or width) of the penetration region.

In this light emitting diode, it is the penetration region 6 that defines the light emitting region, and its shape is usually circular in plan view, but other shapes are also possible.

Now, when voltage is applied to this light emitting diode,
Due to the reverse bias (or high resistance) in the buried region 5, no current flows there, but only in the through region 6, as seen by the arrow. By forming the cladding layer 4 under the buried region 5 thinly, the light emitting region can be made to match the shape of the penetrating region 6, and it is easy to precisely control it.

Further, a light emitting diode shown in FIG. 2 can be considered as having such a buried layer. The light emitting diode in this figure uses p-type (or high resistance) InP (or I
nGaAs) buried layer 5 is located below the active layer 3.
It is formed in an n-type 1nP cladding layer between the P substrate 1 and the P substrate 1.

In this light emitting diode, an n-type 1nP crat layer is formed on the buried layer 5' and on the through region provided in the buried layer 5', and the active layer 3 is formed on the n-type 1nP crat layer.

Further, similar to this light emitting diode, there is a device in which a through region is provided in a buried layer, a cladding layer is grown on the through region and the buried layer, and then an active layer is formed, as disclosed in Japanese Patent Laid-Open No. 54-9592.

In both the light-emitting diode shown in Fig. 2 and the light-emitting diode disclosed in JP-A-511-9592, a cladding layer is grown over the entire surface of a substrate on which a buried layer having a penetrating region is formed, and the surface of the cladding layer is flattened to form an active layer. To form a layer,
The cladding layer must be formed thick. Therefore, these light emitting diodes have a larger distance between the active layer and the buried layer than the light emitting diode shown in FIG. 1, making it difficult to precisely control the light emitting region.

Next, one embodiment of the present invention will be specifically described using FIG.

First, on an n-type 1nP substrate l doped with Sn to the extent of ~2×IO+8 [Cl11-3], Sn was sequentially doped to ~2×1
01@[cIll-3] doped thickness ~7 (μm
) n-type 1nP cladding layer 2, non-doped InGaAsP active layer 3 having a thickness of ~1 [μm] and having an impurity concentration of ~5×IQ'' (cm-3).
grow and form.

A p-type 1nP cladding layer 4 doped with Cd of about 5×10+7 [cIn-3] and having a thickness of about 0.5 [μm] is grown on the active layer 3, and then Sn is doped with about 1×10” [Cl
11-3] doped n-type I with a thickness of ~1 [μm]
An nGaAsP buried layer 5 is grown over the entire surface.

A mask for forming the penetrating region 6 is formed in the buried layer 5, patterning is performed, and then the thickness is increased to 1
A p-type 1nP cladding layer 4 of [μm] is grown.

Then, ~2×10 Zn is deposited on the p-type 1nP cladding layer 4.
IlICCI11-3] Degree of thickness ~ o, 5 [
[mu]m] p-type 1nGaAsP ohmic contact layer 8 is grown, and further an Au-Zn electrode 9 is formed.

Further, on the back surface of the n-type 1nP substrate 1, an Au.Ge--Ni electrode with a light extraction port 11 is formed.

In this embodiment, the diameter W of the penetration area 6 is 30 [ll11]
The diameter S of the light extraction port 11 was set to 130 [μm].

Further, the composition ratio of the active layer 3, buried layer 5, and ohmic contact layer 8 of the light emitting diode of this example is 1.27 as the peak value of photoluminescence, respectively.
Cμm), 1.15 Cμm), 1, l
5 Cpm), but this can be changed depending on the purpose of use.

The light emitting diode prepared according to this example has a forward current of 100,100 (when the voltage is ~1.3 (V),
The optical output (using a tipped fiber) was ~100 [μW].

Incidentally, the light emitting diode in the above embodiment is made of InGaAsP-I.
Although it is based on nP, the present invention also applies to other compound semiconductors,
For example, GaAlAs-GaAs system, InGaAs-
InP type etc. can be applied.

As can be seen from the above description, according to the present invention, the buried layer is selectively disposed close to the active layer and has a conductivity type different from that of the surrounding semiconductor layers or has a higher resistance than the surrounding semiconductor layers. A semiconductor light emitting diode having a light emitting region defined therein is obtained.

Furthermore, according to the present invention, since the buried layer is grown on the active layer, the buried layer can be grown close to where the active layer is formed flat, and the distance between the active layer and the buried layer can be reduced. The size of the light emitting area can be controlled extremely precisely by reducing the size of the light emitting area.

Therefore, the light emitting diode of the present invention is suitable for coupling with a single mode optical fiber with high efficiency.

In addition, since no insulating film is used to limit the light emitting area, that is, to set the current path, no temperature rise, thermal strain, or elastic strain occurs, and good characteristics can be maintained over a long period of time.Furthermore, the crystal growth surface is It is flat.

[Brief explanation of drawings]

FIG. 1 is a sectional side view of a main part showing a semiconductor light emitting diode according to the present invention, FIG. 2 is a side sectional view of a main part showing a semiconductor light emitting diode in contrast to the present invention, and FIG. 3 is an embodiment of the present invention. FIG. 2 is a side sectional view of a main part of a semiconductor light emitting diode for explaining. In the figure, 1 is the substrate, 2 is the cladding layer, 3 is the active layer,
4 is a cladding layer, 5 is a buried layer, and 6 is a through region.

Claims (1)

[Claims] A first semiconductor layer is formed on the active layer, and a buried layer having a conductivity type different from that of the first semiconductor layer or having a resistance value higher than that of the first semiconductor layer is formed on the first semiconductor layer. forming an opening by partially removing the buried layer, forming a second semiconductor layer in the opening and on the buried layer, and forming the first and second semiconductor layers as a cladding layer. A method for manufacturing a semiconductor light emitting diode.