JPS61101088A - Manufacture of semiconductor laser - Google Patents

Manufacture of semiconductor laser

Info

Publication number
JPS61101088A
JPS61101088A JP22206384A JP22206384A JPS61101088A JP S61101088 A JPS61101088 A JP S61101088A JP 22206384 A JP22206384 A JP 22206384A JP 22206384 A JP22206384 A JP 22206384A JP S61101088 A JPS61101088 A JP S61101088A
Authority
JP
Japan
Prior art keywords
layer
semiconductor layer
semiconductor
layers
buried
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP22206384A
Other languages
Japanese (ja)
Inventor
Yuichi Ono
小野 佑一
Shinichi Nakatsuka
慎一 中塚
Takashi Kajimura
梶村 俊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP22206384A priority Critical patent/JPS61101088A/en
Publication of JPS61101088A publication Critical patent/JPS61101088A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To realize high-yield production of semiconductor lasers with their performance characteristics being stabilized by a method wherein P-N junctions are provided in first-fourth semiconductor layers deposited in lamination on a semiconductor substrate and the forbidden band is narrower in the second semiconductor layer than in the first and third layers. CONSTITUTION:On a semiconductor substrate 11, first-fourth semiconductor layers 12-15 are deposited in lamination, wherein P-N junctions are built. It is so set that the layer 13 is provided with a forbidden band narrower in width than the layers 12, 15. The layer 15, same as the layer 12 in the type of conductivity and provided with a forbidden band wider than that of the layer 13, is exposed to a non-selective etchant in a stripe-geometry mesa-etching process, whereafter an extremely thin film is retained of the layer 15. The extremely thin layer 15, just before being buried, is further etched, in a chemical or vapor phase etching process, until contact is made with the layer 14. After this, a fifth semiconductor layer 19 with its forbidden band similar to or wider than that of the layer 14 and a sixth semiconductor layer 20 with its forbidden band similar to or narrower than that the layer 13 are formed, for the formation of a buried layer.

Description

【発明の詳細な説明】 〔発明の利用分野〕 本発明は横モードが安定で、かつレーザ作製歩留りが高
く、特性の均質性に優れた特徴を持つ、半導体レーザお
よびその製造方法に関するものである。特にMOCVD
 (有機金属の熱分解法)法によるレーザとその製法に
関するものである。
[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a semiconductor laser that has a stable transverse mode, a high laser manufacturing yield, and excellent homogeneity of characteristics, and a method for manufacturing the same. . Especially MOCVD
This article relates to a laser based on the (organometallic thermal decomposition method) method and its manufacturing method.

〔発明の背景〕[Background of the invention]

従来のMOCVD法による半導体レーザでは光導波路形
成のための電流狭窄層(n型GaAs層)を選択メサエ
ッチング法により形成していた。つまり既層の下部に位
置するp形Ga、−xAΩxAS層が露出する迄エツチ
ングし、そのエッチャントの選択性を利用して、p形G
a 、−x A−D、 xAs層はほとんどエッチされ
ない作製プロセスとなっていた。なお、こうした例はr
 15 th Conference on 5oli
d St、ateDevice and Materi
alsJ p 、 297.1983にみられる。
In a conventional semiconductor laser using the MOCVD method, a current confinement layer (n-type GaAs layer) for forming an optical waveguide is formed using a selective mesa etching method. In other words, etching is performed until the p-type Ga, -xAΩxAS layer located below the existing layer is exposed, and using the selectivity of the etchant, the p-type Ga, -xAΩxAS layer is etched.
The manufacturing process resulted in almost no etching of the a, -x AD, and xAs layers. Note that these examples are r
15th Conference on 5oli
d St,ateDevice and Materi
alsJ p, 297.1983.

しかしこのような選択性の強いエッチャントはGaAs
のエツチング時に自然酸化膜(ネイティブオキサイド)
を形成し、MOCVDによる埋込み成長時に界面にしば
しば異常高抵抗層が成長しレーザの電気・光特性に悪影
響を与えていた。
However, such a highly selective etchant is GaAs
A natural oxide film (native oxide) is formed during etching.
During buried growth by MOCVD, an abnormally high resistance layer often grows at the interface, which adversely affects the electrical and optical characteristics of the laser.

〔発明の目的〕[Purpose of the invention]

本発明はMOCVD法による半導体レーザとその製造プ
ロセスのうち、特に横モード制御構造を形成する場合の
電流狭窄層の選択エツチングプロセスにおいて、その後
の埋め込み成長時に成長界面異常のない安定なレーザ製
造プロセスを提供するものであり、作製されたレーザ素
子の特性安定化と高歩留りを達成することが目的である
The present invention provides a stable laser manufacturing process that does not cause growth interface abnormalities during subsequent buried growth in a semiconductor laser and its manufacturing process using the MOCVD method, particularly in the selective etching process of a current confinement layer when forming a transverse mode control structure. The purpose is to stabilize the characteristics of the manufactured laser device and achieve high yield.

〔発明の概要〕[Summary of the invention]

従来法の欠点は選択性エツチング液を用いることにより
自然酸化膜の発生をきたしていたことである。本発明で
は従来のこの欠点を補ない、かつ空気中で放置されただ
けで自然酸化膜の発生するGa、−x A Q YAs
の露出時間を極力少なくする製造プロセスを提供するも
のである。つまり本発明は、所定の半導体基板上に少な
くとも第1.第2.第3、第4の半導体層を積層し、そ
れらの積層内にPN接合を有し、第2の半導体層は第1
および第3の半導体層よりも禁制帯層が狭く設定されて
おり、上記第1の半導体層と同一導電型を有し、第2の
半導体層よりも狭い禁制帯幅をもつ第4の半導体層を非
選択性のエツチング液によりストライプ状にメサエッチ
ングでごく薄い層を残して除去し、この後埋め込み成長
の直前に既薄層を化学エッチもしくは気相エツチング法
にて第3の半導体層に達するまでエツチングし、しかる
後、第3の半導体と同じか、それよりも広い禁制帯幅を
もつ第5の半導体層と、第2の半導体層と同じかそれよ
りも狭い禁制帯幅をもつ第6の半導体層とで埋込んだ埋
込み層を設ける工程を含んだ、MOCVD法による半導
体レーザおよびその製造方法を提供する。
A drawback of the conventional method is that the use of a selective etching solution causes the formation of a native oxide film. In the present invention, this drawback of the conventional method is compensated for, and Ga, -x A Q YAs, which forms a natural oxide film just by being left in the air,
The present invention provides a manufacturing process that minimizes exposure time. In other words, the present invention provides at least a first . Second. A third and a fourth semiconductor layer are stacked, a PN junction is formed in these stacked layers, and the second semiconductor layer is connected to the first semiconductor layer.
and a fourth semiconductor layer having a forbidden band width set narrower than that of the third semiconductor layer, having the same conductivity type as the first semiconductor layer, and having a forbidden band width narrower than that of the second semiconductor layer. is removed by mesa etching in a stripe pattern using a non-selective etching solution, leaving only a very thin layer.Then, just before buried growth, the already thin layer is chemically etched or vapor phase etched to reach the third semiconductor layer. and then etching a fifth semiconductor layer having a forbidden band width equal to or wider than that of the third semiconductor layer and a sixth semiconductor layer having a forbidden band width equal to or narrower than that of the second semiconductor layer. The present invention provides a semiconductor laser using the MOCVD method, including a step of providing a buried layer buried with a semiconductor layer, and a method for manufacturing the same.

〔発明の実施例〕[Embodiments of the invention]

つぎに本発明の実施例を図面とともに説明する。 Next, embodiments of the present invention will be described with reference to the drawings.

第1図(、)〜(d)は本発明による半導体レーザの製
造プロセスの一実施例を示す工程図である。
FIGS. 1(a) to 1(d) are process diagrams showing an embodiment of the manufacturing process of a semiconductor laser according to the present invention.

第1図(a’)において、n型GaAs基板11上に第
1半導体層であるn型Ga、−xA Q xAsクラッ
ド層12 (x=0.45、厚さ1.5〜2.0μm)
 、第2半導体層であるアンドープGa’l−y A 
Q y As活性層13 (y=0.14、厚さ0.0
5−0.15 p m’) 、第3半導体層であるp型
Ga1−x A D’ z Asクラッド層14(x=
0.45、厚さ0.2〜0.5μm’) ’、第4半導
体層であるn型GaAs電流狭窄層15(厚さ0.3〜
1.0μm)を順次MOCVD法で結晶成長させる。次
に第1図(b)において、既電流狭窄層15上に化学蒸
着法によりSi02−P 205酸化膜を約2000人
波着させた後、写真食刻法により幅5μmのストライプ
を酸化膜に形成する。この後、H+1PO4(リン酸)
In FIG. 1(a'), an n-type Ga, -xAQxAs cladding layer 12 (x=0.45, thickness 1.5 to 2.0 μm) which is a first semiconductor layer is placed on an n-type GaAs substrate 11.
, undoped Ga'ly A which is the second semiconductor layer
Q y As active layer 13 (y=0.14, thickness 0.0
5-0.15 pm'), p-type Ga1-x A D' z As cladding layer 14 (x=
0.45, thickness 0.2 to 0.5 μm')', n-type GaAs current confinement layer 15 (thickness 0.3 to 0.5 μm'), which is the fourth semiconductor layer
1.0 μm) is sequentially grown using the MOCVD method. Next, in FIG. 1(b), approximately 2,000 Si02-P205 oxide films are deposited on the current confinement layer 15 by chemical vapor deposition, and then stripes with a width of 5 μm are formed on the oxide film by photolithography. Form. After this, H+1PO4 (phosphoric acid)
.

H2O2(過酸化水素)、(CH20H) 、  (エ
チレングリコール)系のエツチング液にて、既GaAs
層を約0.1 μm残す様にエッチ除去17する。次い
で脱酸化膜をHF(ふつ酸)系エッチ液で除去する。
Existing GaAs was etched with H2O2 (hydrogen peroxide), (CH20H), (ethylene glycol) based etching solution
Etch away 17 leaving about 0.1 μm of the layer. Next, the deoxidized film is removed using an HF (fluoric acid) based etchant.

次に第1図(C)において、MOCVD法による結晶成
長の直前に、やはりリン酸−過酸化水素一二チレンゲリ
コール系のエツチング液にて、GaAs電流狭窄層15
及びp型Ga、−xA Q xAsクラッド層14を0
.1〜0.15μmエッチ除去18し、脱イオン水にて
十分に洗浄後、MOCVD装置内に装着し、第1図(d
)に示す様に第5の半導体層であるP型cat−Z A
 Q z As’ 19 (z =0.45〜0.55
、厚さ0.8〜1.2μm)、第6の半導体層であるP
+型Ga、、、AflwAq  20  (w=o〜o
、15.厚さ0.5〜2.0μm)をMOCVD法によ
り順次成長させる。また本実施例では埋込み成長前のエ
ツチングに化学エッチを用いたが、MOCVD装置内で
、HCI (塩化水素)を用いた気相エッチ法に依って
も同様に実施可能である。次いでP側電極21およびn
側電極22を形成したのち、へき開によって共振器要約
250μmの半導体レーザを形成した。
Next, in FIG. 1(C), immediately before crystal growth by MOCVD, the GaAs current confinement layer 15 is etched using an etching solution of phosphoric acid-hydrogen peroxide and diethylene gellicol.
and p-type Ga, -xA Q xAs cladding layer 14 is 0
.. After removing 18 to 0.15 μm of etch and thoroughly washing with deionized water, it was installed in the MOCVD apparatus and
), the fifth semiconductor layer, P-type cat-Z A
Q z As' 19 (z = 0.45 to 0.55
, thickness 0.8 to 1.2 μm), P which is the sixth semiconductor layer
+ type Ga,,,AflwAq 20 (w=o~o
, 15. A thickness of 0.5 to 2.0 μm) is sequentially grown using the MOCVD method. Further, in this embodiment, chemical etching was used for etching before buried growth, but it can be similarly carried out by a vapor phase etching method using HCI (hydrogen chloride) in an MOCVD apparatus. Next, the P side electrode 21 and n
After forming the side electrodes 22, cleavage was performed to form a semiconductor laser with a cavity diameter of 250 μm.

上記の半導体レーザは発振波長780nm、しきい値電
流25〜35mA、光出力は30mWまで安定な横基本
モードで発振した。
The above semiconductor laser oscillated in a stable transverse fundamental mode with an oscillation wavelength of 780 nm, a threshold current of 25 to 35 mA, and an optical output of 30 mW.

上記実施例はn型基板を用いたが、n型基板を用いても
同様に実施可能であり、また半導体材料を他の材料系つ
まりInGaAsPやInGaA Q P系など他の材
料を用いても同様に実施できる。また活性層を多重量子
井戸型にしても良い、さらに分布帰還型のフィードバッ
ク手段を用いてもよいことはいうまでもない。
Although the above embodiment used an n-type substrate, it is also possible to implement the same method using an n-type substrate, and it is also possible to use other materials as the semiconductor material, such as InGaAsP or InGaA QP. It can be implemented. It goes without saying that the active layer may be of a multi-quantum well type, and that distributed feedback type feedback means may also be used.

〔発明の効果〕〔Effect of the invention〕

上記のように本発明による半導体レーザは、所定の半導
体基板上に少なくとも第1.第2.第3゜第4の半導体
層を積層し、それらの積層内にPN接合を有し、第2の
半導体層は第1.第3の半導体層よりも禁制帯幅が狭く
設定されており、上記第2の半導体層と同じかもしくは
それより狭い禁制帯幅をもちかつ第1の半導体層と同一
の導電型を有する第4の半導体を形成する工程と、既第
4の半導体層上に形成されたストライプを通して少なく
とも第4の半導体層を一部残してエッチ除去する工程と
、MOCVD方による埋込み成長の直前に化学エッチ法
もしくは気相エッチ法により少なくとも第3の半導体層
に到達する迄第4の半導体層を除去する工程と、第3の
半導体層と同じかそれよりも広い禁制帯幅をもつ第5の
半導体層と、第2の半導体層と同じかそれよりも狭い禁
制帯幅をもつ第6の半導体層を設ける工程を含むことに
より、埋込み界面異常層のない特性の安定した、かつ量
産化に適した低コストの半導体レーザを提供することが
できる。
As described above, the semiconductor laser according to the present invention has at least the first . Second. 3rd degree: A fourth semiconductor layer is stacked, a PN junction is formed in the stacked layers, and the second semiconductor layer is stacked with the first semiconductor layer. A fourth semiconductor layer has a forbidden band width set narrower than that of the third semiconductor layer, has a forbidden band width that is the same as or narrower than that of the second semiconductor layer, and has the same conductivity type as the first semiconductor layer. a step of etching away at least a portion of the fourth semiconductor layer through the stripe formed on the fourth semiconductor layer; and a step of etching away at least a portion of the fourth semiconductor layer through a stripe formed on the fourth semiconductor layer, and immediately before the buried growth using the MOCVD method, a chemical etching method or a step of removing the fourth semiconductor layer by a vapor phase etching method until at least the third semiconductor layer is reached; a fifth semiconductor layer having a forbidden band width that is the same as or wider than that of the third semiconductor layer; By including the step of providing a sixth semiconductor layer having a forbidden band width that is the same as or narrower than that of the second semiconductor layer, it is possible to achieve stable characteristics without a buried interface abnormal layer and at a low cost suitable for mass production. A semiconductor laser can be provided.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(a)〜(d)は本発明の半導体レーザの製造プ
ロセスを説明する断面図である。 11・・・半導体基板、12・・・第1の半導体層、1
3・・・第2の半導体層、14・・・第3の半導体層、
15・・・第4の半導体層、16・・・Sj、02  
P20h酸化膜、17・・・エッチ溝(ストライプ)、
18・・・エッチ溝(ストライプ)、19・・・第5の
半導体層、20・・・第6の半導体層。
FIGS. 1(a) to 1(d) are cross-sectional views illustrating the manufacturing process of the semiconductor laser of the present invention. 11... Semiconductor substrate, 12... First semiconductor layer, 1
3... Second semiconductor layer, 14... Third semiconductor layer,
15... Fourth semiconductor layer, 16... Sj, 02
P20h oxide film, 17... etch groove (stripe),
18... Etch groove (stripe), 19... Fifth semiconductor layer, 20... Sixth semiconductor layer.

Claims (1)

【特許請求の範囲】 1、所定の半導体基板上に少なくとも第1、第2、第3
、第4の半導体層を積層し、それらの積層内にPN接合
を有し、第2の半導体層は第1、第3の半導体層よりも
禁制帯幅が狭く設定され、上記第2の半導体層と同じか
もしくはそれより狭い禁制帯幅をもちかつ第1の半導体
と同一の導電型を有する第4の半導体層を形成する工程
と、既第4の半導体層上に形成されたストライプを通し
て少なくとも第4の半導体層を一部残してエツチ除去す
る工程と、埋込み成長直前に第3の半導体層に到達する
迄第4の半導体層をエツチ除去する工程と、第3の半導
体層と同じかそれより広い禁制帯幅をもつ第5の半導体
層と第2の半導体層と同じかそれより狭い禁制帯幅を有
する第6の半導体層によりエツチ除去されたストライプ
を有する第3、第4の半導体層上を埋込んだ埋込み層を
設ける工程を有することを特徴とする半導体レーザの製
造方法。 2、上記埋込み成長直前のエツチングが、化学溶液エツ
チングかもしくは気相エツチングであることを特徴とす
る特許請求の範囲第1項に記載した半導体レーザの製造
方法。 3、上記積層および埋込み層が有機金属気相成長(MO
CVD)法で形成されたことを特徴とする特許請求の範
囲第1項または第2項に記載した半導体レーザの製造方
法。
[Claims] 1. At least a first, a second, and a third semiconductor substrate on a predetermined semiconductor substrate.
, a fourth semiconductor layer is stacked, a PN junction is formed in the stacked layers, the second semiconductor layer has a narrower forbidden band width than the first and third semiconductor layers, and the second semiconductor layer forming a fourth semiconductor layer having the same or narrower bandgap than that of the first semiconductor layer and having the same conductivity type as the first semiconductor layer; A step of etching away the fourth semiconductor layer leaving a part of it; a step of etching the fourth semiconductor layer until it reaches the third semiconductor layer just before the buried growth; third and fourth semiconductor layers having stripes etched away by a fifth semiconductor layer having a wider bandgap and a sixth semiconductor layer having a bandgap equal to or narrower than the second semiconductor layer; 1. A method of manufacturing a semiconductor laser, comprising the step of providing a buried layer with the upper surface buried. 2. The method of manufacturing a semiconductor laser as set forth in claim 1, wherein the etching immediately before the buried growth is chemical solution etching or vapor phase etching. 3. The above laminated layers and buried layers are formed by metal organic chemical vapor phase epitaxy (MO
A method for manufacturing a semiconductor laser according to claim 1 or 2, characterized in that the semiconductor laser is formed by a CVD method.
JP22206384A 1984-10-24 1984-10-24 Manufacture of semiconductor laser Pending JPS61101088A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22206384A JPS61101088A (en) 1984-10-24 1984-10-24 Manufacture of semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22206384A JPS61101088A (en) 1984-10-24 1984-10-24 Manufacture of semiconductor laser

Publications (1)

Publication Number Publication Date
JPS61101088A true JPS61101088A (en) 1986-05-19

Family

ID=16776525

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22206384A Pending JPS61101088A (en) 1984-10-24 1984-10-24 Manufacture of semiconductor laser

Country Status (1)

Country Link
JP (1) JPS61101088A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61244023A (en) * 1985-04-22 1986-10-30 Nec Corp Manufacture of semiconductor element

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61244023A (en) * 1985-04-22 1986-10-30 Nec Corp Manufacture of semiconductor element

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