JP4537549B2 - Method for manufacturing compound semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing a compound semiconductor device, and in particular, when a compound semiconductor surface such as InP or GaAs constituting a compound semiconductor device such as a semiconductor laser or HEMT (High Electron Mobility Transistor) is dry-etched. The present invention relates to a method of manufacturing a compound semiconductor device characterized by a step of removing an etching reaction product.
[0002]
[Prior art]
Conventionally, in the manufacture of a compound semiconductor device, fine processing of the compound semiconductor layer is required in many cases regardless of the structure and use of the compound semiconductor device.
As such a fine processing technique, a combination of a photolithography technique for forming a dielectric mask on a semiconductor surface and a dry etching technique for removing a portion of the semiconductor layer not covered by the dielectric mask is generally used. It has been.
[0003]
In dry etching technology, it is required to process the shape as designed and to suppress damage caused by etching. In recent years, as a technology to meet such demand, dry etching using SiCl ₄ as a source gas is required. Etching is used for III-V compound semiconductors such as GaAs and InP.
[0004]
Among these, for GaAs, dry etching using a mixed gas of SiCl ₄ and SF ₆ is performed in order to achieve both the selectivity to AlGaAs and the vertical anisotropic shape, and good results are obtained. It has been reported that it can be obtained (Applied Physics Letters, Vol. 51, No. 14, p. 1083-1085, 1987).
[0005]
Also, for InP, smooth etching of InP is performed with a low substrate bias voltage by a gas system containing SiCl ₄ , so that etching damage can be reduced and the shape of the etching side surface is vertical. It has been reported that it is close (59th Japan Society of Applied Physics, Lecture Collection, No. 3, p. 1176, “InP dry etching with SiCl ₄ / Ar inductively coupled plasma (ICP)”, 1998).
[0006]
Here, a manufacturing process of a conventional semiconductor laser, which is an example of microfabrication for an InP-based semiconductor, will be described with reference to FIGS.
First, after an InGaAsPMQW active layer 32 and a p-type InP cladding layer 33 are sequentially grown on the n-type InP substrate 31 by using MOVPE (metal organic chemical vapor deposition), A SiO ₂ film is deposited on the entire surface, and then a normal SiO ₂ mask 34 is formed by performing normal photoetching.
[0007]
Next, with reference to this SiO ₂ mask 34 as an etching mask, reactive ion etching (RIE) using an etching gas 35 made of SiCl ₄ and Ar is performed, and etching is performed until the n-type InP substrate 31 is reached. Thus, the striped mesa 36 is formed.
[0008]
Next, using this SiO ₂ mask 34 as a selective growth mask as it is, the p-type InP buried layer 37 and the n-type InP current blocking layer 38 are again formed on the side surface of the stripe mesa 36 by the MOVPE method. Then, the stripe-shaped mesa 36 is buried by a pn reverse bias junction to form a current confinement structure.
[0009]
Next, after removing the SiO ₂ mask 34 using a hydrofluoric acid solution, a p-type InP cladding layer 39 and a p-type InGaAs contact layer 40 are successively deposited on the entire surface by the MOVPE method. The p-type InGaAs contact layer 40 is provided with a p-side electrode (not shown) and the n-type InP substrate 31 is provided with an n-side electrode (not shown) to complete the basic structure of the semiconductor laser.
[0010]
[Problems to be solved by the invention]
However, in such a dry etching process using SiCl ₄ , there is a problem that an etching reaction product made of a Si-based compound remains as an etching residue that is difficult to remove on the semiconductor surface after etching. This situation will be explained with reference to.
[0011]
Refer to FIG. 9 In FIG. 9, after performing striped mesa etching using SiCl ₄ , surface treatment is performed with an acid solution, and then a buried layer is grown as a sample, and the surface of this sample is etched. However, it shows the Si and O contents when the impurity concentration on the exposed surface is measured using SIMS (secondary ion mass spectrometer), and the position where the depth is 0 μm in the figure indicates the etched surface. ing.
[0012]
As is apparent from the figure, the concentrations of Si and O remaining on the etched surface even after mesa etching and acid treatment are 5 × 10 ¹⁹ cm ⁻³ and 1 × 10 ²⁰ cm ⁻³ , respectively. It is understood that it remains at a very high concentration.
[0013]
In this way, when an etching residue made of an etching reaction product exists on the etched surface, it adversely affects the subsequent device manufacturing process and the operation of the completed device.
[0014]
That is, in the conventional semiconductor laser, a pn junction is formed between the n-type InP substrate 31 and the p-type InP buried layer 37, but good electrical characteristics are obtained unless good crystal growth occurs at the interface. The pn junction is not formed, and as a result, the current is not blocked, the leakage current is increased, and the device characteristics are deteriorated.
[0015]
In order to solve such problems caused by etching residues, it is proposed to dry etch GaAs-based semiconductors and then irradiate the surface with F-based plasma to remove Si-based etching residues. (See JP-A-10-209181, if necessary).
[0016]
However, the above proposal has a problem and cannot be applied to an actual device manufacturing process.
That is, first, since the F-based gas has a large chemical reactivity with materials other than semiconductors such as SiO ₂ exposed on the wafer surface, the shape of materials other than semiconductors changes due to plasma treatment. As a result, there is a problem in that the final device characteristics are adversely affected.
[0017]
In particular, in the above-described semiconductor laser, since the SiO ₂ mask 34 existing on the top surface of the striped mesa 36 is also used as a selective growth mask, the SiO ₂ mask 34 is etched in the CF ₄ process, and the subsequent selective growth is performed. There is a problem of affecting the shape of the element to be grown.
[0018]
Second, when an F-based gas is used in a manufacturing factory, it is necessary to consider the influence on the ozone layer, and environmental resistance becomes a problem.
[0019]
Therefore, an object of the present invention is to surely remove an etching reaction product composed of a Si-based compound generated during a dry etching process while maintaining a good surface morphology.
[0020]
[Means for Solving the Problems]
Here, with reference to FIG. 1, means for solving the problems in the present invention will be described. FIG. 1 is a manufacturing flow diagram showing the features of the present invention.
See FIG. 1 In order to achieve the above-mentioned object, in the present invention, a compound semiconductor is dry-etched by using a raw material gas containing at least constituent gases including Si atoms such as SiCl ₄ and Cl atoms in the molecular structure. later, O 2 ₊ Ar or N by plasma irradiation treatment using a material gas including at least one of O ₂ gas or N ₂ gas or the like _{2 +} Ar, then the plasma irradiation using an acid solution such as a solution containing hydrochloric acid The surface product at the time of dry etching which has been altered by the treatment is removed .
[0021]
In this way, by performing the plasma irradiation process using the source gas containing at least one of O ₂ gas such as O ₂ + Ar or N ₂ + Ar or N ₂ gas, the dry operation is performed by the physical action of the gas such as the sputtering effect. The etching residue made of the Si-based compound resulting from the etching can be transformed into a form that is easily dissolved in an acid solution such as a solution containing hydrochloric acid, and the altered etching residue can be floated from the semiconductor layer immediately below the etching residue.
Note that the source gas in this case may be only O ₂ gas or N ₂ gas, but the sputtering effect is reduced as compared with the case where Ar gas is mixed.
[0022]
Next, by treating the etching surface with an acid solution, it is possible to easily remove the etching residue that floats from the surface and is transformed into a form that is easily dissolved in the acid solution.
Further, the surface treatment using this acid solution also has an action of removing surface damage that occurs in the dry etching process and the plasma irradiation treatment process.
[0023]
In particular, an acid solution capable of shallow etching of 0.05 to 0.15 μm on the surface of the compound semiconductor and not significantly changing the morphology of the surface of the compound semiconductor and the shape of the compound semiconductor layer is suitable. For example, HCl + H ₂ O _An acid solution containing hydrochloric acid such as a mixed solution composed of ₂ + H ₂ O is preferred.
[0024]
Further, the present invention is characterized in that after the surface treatment step using an acid solution, crystal regrowth is performed at least on the treated surface, and in particular, a buried layer including a current blocking layer of a semiconductor laser is grown.
[0025]
As described above, by performing the surface treatment using the acid solution, it is possible to perform good crystal growth at least when crystal regrowth is performed on the treated surface.
In particular, when a buried layer including a current blocking layer of a semiconductor laser is grown, a pn junction having excellent electrical characteristics can be formed, thereby reducing leakage current flowing through the buried layer. it can.
[0026]
DETAILED DESCRIPTION OF THE INVENTION
Here, the first embodiment of the present invention will be described with reference to FIGS. 2 to 5. First, the manufacturing process of the first embodiment of the present invention will be described with reference to FIGS. 2 to 4. explain.
2A. First, an n-type InP clad layer 12 having a thickness of, for example, 0.35 μm is formed on an n-type InP substrate 11 having a (100) plane as a main surface by using the MOVPE method, InGaAsPMQW activity The layer 13 and the p-type InP cladding layer 14 having a thickness of, for example, 250 nm are sequentially grown.
In this case, the InGaAsPMQW active layer 13 is configured so that the peak wavelength of light emission is, for example, 1.3 μm, and the structure thereof has a band gap wavelength λ _g of, for example, a 1.1 μm composition. Then, an i-type InGaAsP barrier layer having a thickness of 10 nm, for example, and an i-type InGaAs well layer having a band gap wavelength λ _g of, for example, a 1.39 μm composition and a thickness of, for example, 5 nm are alternately 10. Pair-grown.
[0027]
Next, a SiO ₂ film having a thickness of, for example, 300 nm is deposited on the entire surface, and then subjected to photo-etching using a normal resist pattern (not shown) to form a stripe-shaped SiO having a width of, for example, 2 μm. ₂ Mask 15 is formed.
[0028]
Next, after removing the resist pattern, an ICP-RIE (Inductively Coupled Plasma Reactive Ion Etching) apparatus is used, and a mixed gas 16 made of SiCl ₄ + Ar is used with the SiO ₂ mask 15 as an etching mask. By performing the reactive ion etching used, the striped mesa 17 is formed by etching to a depth of, for example, 2 μm until the n-type InP cladding layer 12 is reached.
[0029]
The conditions for the dry etching process in this case are as follows:
Raw material gas flow; SiCl ₄ : Ar = 10 sccm: 20 sccm
Pressure: 2Pa
ICP coil power: 200 W (/ 4500 cm ³ )
Substrate bias voltage: 100 W (applied voltage: -300 V)
Substrate temperature: 180 ° C
Etching was performed for 3 minutes.
[0030]
Subsequently, referring to FIG. 3C, after the mixed gas 16 composed of SiCl ₄ + Ar in the ICP-RIE apparatus is exhausted, the mixed gas composed of O ₂ + Ar is introduced, and electric power is supplied to generate plasma, thereby generating a wafer. Is exposed to the plasma 18 to irradiate the exposed surface with the plasma 18.
[0031]
In this case, the conditions of the plasma irradiation process are as follows:
Raw material gas flow; O ₂ : Ar = 50 sccm: 50 sccm
Pressure: 10Pa
ICP coil power: 200 W (/ 4500 cm ³ )
Substrate bias voltage: 12 W (applied voltage: -70 V)
Substrate temperature: 100 ° C
And a plasma irradiation treatment for 5 minutes was performed.
[0032]
By this plasma irradiation treatment, the etching residue resulting from the dry etching process made of the Si-based compound adhering to the exposed surface of the wafer is easily dissolved in the acid solution and is lifted from the wafer surface.
[0033]
Next, refer to FIG. 3D. Next, the exposed surface is, for example, immersed in an acid solution 19 made of, for example, HCl: H ₂ O ₂ : H ₂ O = 1: 1: 1, for example, for 1 minute. Etching 0.05 μm.
Etching with the acid solution 19 removes the etching residue that has been lifted, and also removes physical damage generated by the dry etching process and the plasma irradiation process.
[0034]
Next, referring to FIG. 4E, using the SiO ₂ mask 15 as a selective growth mask as it is, the thickness of the side surface of the striped mesa 17 is again 0.6 μm, for example, by the MOVPE method, and the impurity concentration is 2 × 10. A p-type InP current buried layer 20 of ¹⁸ cm ⁻³ and an n-type InP current blocking layer 21 having a thickness of, for example, 1.0 μm are sequentially grown and deposited sequentially, and the striped mesa 17 is inverted by pn A current confinement structure is formed by embedding with a bias junction.
The impurity concentration of the n-type InP current blocking layer 21 using SiH ₄ as a dopant material depends on the crystal orientation of the growth surface, but is set to 2 × 10 ¹⁸ cm ⁻³ in the lowest concentration region.
[0035]
Next, after removing the SiO ₂ mask 15 using a hydrofluoric acid solution, the thickness is 2.9 μm, for example, so that the surface becomes flat again by the MOVPE method. A p-type InP cladding layer 22 having a concentration of 1.0 × 10 ¹⁸ cm ⁻³ and a p-type InGaAs contact layer having a thickness of, for example, 0.7 μm and an impurity concentration of 1.5 × 10 ¹⁹ cm ⁻³ 23 are sequentially deposited.
[0036]
Thereafter, although not shown, a p-side electrode is formed on the p-type InGaAs contact layer 23 and the n-side electrode is formed after polishing the back surface of the n-type InP substrate 11, and then the p-side electrode and the n-side electrode are formed. By applying Au plating on the electrode, the basic configuration of the semiconductor laser is completed.
[0037]
FIG. 5 is an explanatory diagram of the impurity concentration after the surface treatment in the first embodiment of the present invention, and the position where the depth is 0 μm is the surface position of the striped mesa 17.
As is apparent from the figure, as a result of performing the SIMS analysis as in the conventional case, the concentrations of Si and O at the surface position of the striped mesa 17 are 1 × 10 ¹⁷ cm ⁻³ and 3 × 10 ¹⁷ cm ⁻³ , respectively. Thus, it is understood that it is about two orders of magnitude smaller than the case of only the acid treatment shown in FIG.
[0038]
As described above, in the first embodiment of the present invention, first, the etching residue adhering to the surface is altered and floated by the sputtering effect of the plasma of the mixed gas of O ₂ + Ar, and then HCl: H _Since the etching residue that has been lifted is removed by performing an acid treatment using an acid solution composed of ₂ O ₂ : H ₂ O = 1: 1: 1, an etching residue that is difficult to remove by only the acid treatment is removed. It can be reliably removed.
[0039]
Therefore, a regrown layer such as the p-type InP buried layer 20 can be grown while maintaining good crystallinity, and thereby a good current confinement structure can be formed, thereby reducing leakage current. can do.
[0040]
In the first embodiment of the present invention, since an acid solution containing hydrochloric acid composed of HCl: H ₂ O ₂ : H ₂ O = 1: 1: 1 is used in the acid treatment step, the surface morphology Can be kept good, and the shape of the striped mesa 17 can be kept good.
[0041]
Next, a second embodiment of the present invention will be described. Since the other steps are exactly the same as those in the first embodiment except that the conditions in the plasma irradiation treatment step are different, FIG. ) Will be used to explain only the plasma irradiation process.
Again referring to FIG. 3C, after the stripe mesa 17 is formed using the ICP-RIE apparatus in the same manner as in the first embodiment described above, subsequently, mixing of SiCl ₄ + Ar in the ICP-RIE apparatus is performed. The gas is exhausted, and then a mixed gas composed of O ₂ is introduced, electric power is supplied to generate a plasma, and the exposed surface is irradiated with the plasma 18 by exposing the wafer into the plasma 18.
[0042]
In this case, the conditions of the plasma irradiation process are as follows:
Raw material gas flow; O ₂ = 50 sccm
Pressure: 5Pa
ICP coil power: 200 W (/ 4500 cm ³ )
Substrate bias voltage: 12 W (applied voltage: -30 V)
Substrate temperature: 100 ° C
And a plasma irradiation treatment for 5 minutes was performed.
Thereafter, the same semiconductor laser as that of the first embodiment is obtained by going through the same process as that of the first embodiment again.
[0043]
FIG. 6 is an explanatory diagram of the impurity concentration after the surface treatment in the second embodiment of the present invention, and the position where the depth is 0 μm is the surface position of the striped mesa 17.
As is apparent from the figure, as a result of performing SIMS analysis in the same manner as in the prior art, the concentrations of Si and O at the surface position of the striped mesa 17 are 3 × 10 ¹⁸ cm ⁻³ and 8 × 10 ¹⁸ cm ⁻³ , respectively. Thus, it is understood that it is about one order of magnitude smaller than the case of only the acid treatment shown in FIG.
Note that it is about one digit larger than that of the first embodiment.
[0044]
Although the embodiments of the present invention have been described above, the present invention is not limited to the configurations and conditions described in the embodiments, and various modifications can be made.
For example, in each embodiment of the present invention, the dry etching process and the plasma irradiation process are a series of processes in the same apparatus, but may be performed as discontinuous processes as in batch processing or the like. Furthermore, the dry etching process and the plasma irradiation process may be performed using different manufacturing apparatuses.
[0045]
In the description of each of the above embodiments, the raw material gas flow rate in the plasma irradiation process is set to O ₂ : Ar = 50: 50 or only O ₂ gas, but is not limited to these flow rate ratios. For example, it is preferable to use the raw material gas flow rate in a range of O ₂ : Ar = 50: 0 to 50: 200.
Note that the use of only Ar gas is not preferable because the sputtering effect becomes too great and the shape of the stripe mesa changes.
[0046]
In addition, the source gas in the plasma irradiation treatment is not limited to O ₂ + Ar or O ₂ , and N ₂ which can obtain a soft sputtering effect similarly to O ₂ may be used. N ₂ + Ar or N ₂ may be used.
[0047]
In each of the above embodiments, the InP semiconductor laser is described. However, the present invention is similarly applied to a GaAs semiconductor laser, and the target is not limited to the semiconductor laser. The present invention is also applied to an optical semiconductor device such as a light emitting diode or a photodiode accompanied with a process.
[0048]
Furthermore, the present invention is not limited to the optical semiconductor device, but can be applied to other compound semiconductor devices such as a HEMT (High Electron Mobility Transistor) that does not involve a regrowth process after etching.
[0049]
For example, when dry etching is performed using SiCl ₄ in the gate recess process, if there is an etching residue on the surface, the Schottky barrier property of the gate electrode may be deteriorated and the desired gate characteristics may not be obtained. However, good gate characteristics can be obtained by performing the plasma irradiation treatment and the acid treatment of the present invention.
[0050]
In each of the above embodiments, the ICP-RIE apparatus is used in the plasma irradiation process. However, the present invention is not limited to the ICP-RIE apparatus, and an ordinary general parallel plate RIE apparatus is used. Furthermore, although a bias cannot be applied to the wafer and the effect of removing etching residues is inferior, a barrel type apparatus may be used.
[0051]
(Supplementary Note 1) After the Si atoms and Cl atoms were dry etching of compound semiconductor by using the raw material gas to at least a component of a gas containing a molecular structure, a raw material gas containing at least one of O ₂ gas or N ₂ gas A method of manufacturing a compound semiconductor device, comprising: performing the plasma irradiation treatment used, and then removing a surface product during the dry etching that has been altered by the plasma irradiation treatment using an acid solution.
(Supplementary Note 2) gas containing the Si atom and Cl atoms in the molecular structure, manufacturing method of a compound semiconductor device according to Supplementary Note 1, wherein it is SiCl _4.
(Additional remark 3) Ar is contained in the source gas used for the said plasma irradiation process, The manufacturing method of the compound semiconductor device of Additional remark 1 or 2 characterized by the above-mentioned.
(Additional remark 4) The said acid solution is an acid solution containing hydrochloric acid, The manufacturing method of the compound semiconductor device of any one of Additional remark 1 thru | or 3 characterized by the above-mentioned.
(Supplementary note 5) The method for producing a compound semiconductor device according to any one of supplementary notes 1 to 4, wherein after the surface treatment step using the acid solution, crystal regrowth is performed at least on the treated surface.
(Supplementary note 6) The method of manufacturing a compound semiconductor device according to supplementary note 5, wherein the crystal regrowth step is a step of growing a buried layer including a current blocking layer of a semiconductor laser.
[0052]
【The invention's effect】
According to the present invention, after performing dry etching using a gas such as SiCl ₄ , plasma irradiation with a gas containing O ₂ or N ₂ is performed and, subsequently, an acid solution treatment is performed. Etching residues generated by etching can be surely removed while maintaining the surface morphology, which greatly contributes to improving the characteristics and reliability of compound semiconductor devices such as semiconductor lasers.
[Brief description of the drawings]
FIG. 1 is an explanatory diagram of a basic configuration of the present invention.
FIG. 2 is an explanatory diagram of the manufacturing process up to the middle of the first embodiment of the present invention.
FIG. 3 is an explanatory diagram of the manufacturing process until the middle of FIG. 2 and subsequent steps of the first embodiment of the present invention.
FIG. 4 is an explanatory diagram of the manufacturing process after FIG. 3 according to the first embodiment of the present invention.
FIG. 5 is an explanatory diagram of an impurity concentration after surface treatment in the first embodiment of the present invention.
FIG. 6 is an explanatory diagram of an impurity concentration after surface treatment in the second embodiment of the present invention.
FIG. 7 is an explanatory diagram of a manufacturing process up to the middle of a conventional semiconductor laser.
FIG. 8 is an explanatory diagram of the manufacturing process of the conventional semiconductor laser after FIG. 7;
FIG. 9 is an explanatory diagram of impurity concentration on a dry-etched surface of a semiconductor laser manufactured by a conventional dry-etching technique.
[Explanation of symbols]
11 n-type InP substrate 12 n-type InP clad layer 13 InGaAsPMQW active layer 14 p-type InP clad layer 15 SiO ₂ mask 16 etching gas 17 striped mesa 18 plasma 19 acid solution 20 p-type InP buried layer 21 n-type InP current block Layer 22 p-type InP clad layer 23 p-type InGaAs contact layer 31 n-type InP substrate 32 InGaAsPMQW active layer 33 p-type InP clad layer 34 SiO ₂ mask 35 etching gas 36 striped mesa 37 p-type InP buried layer 38 n-type InP Current blocking layer 39 p-type InP cladding layer 40 p-type InGaAs contact layer

Claims (5)

Plasma irradiation using a source gas containing at least one of O ₂ gas or N ₂ gas after dry etching of a compound semiconductor using a source gas containing at least constituent gases containing Si atoms and Cl atoms in the molecular structure A method of manufacturing a compound semiconductor device, comprising: performing a treatment, and then removing a surface product during the dry etching that has been altered by the plasma irradiation treatment using an acid solution. 2. The method of manufacturing a compound semiconductor device according to claim 1, wherein the source gas used for the plasma irradiation treatment contains Ar. 3. The method of manufacturing a compound semiconductor device according to claim 1, wherein the acid solution is an acid solution containing hydrochloric acid. 4. The method of manufacturing a compound semiconductor device according to claim 1, wherein after the surface treatment step using the acid solution, crystal regrowth is performed at least on the treated surface. 5. 5. The method of manufacturing a compound semiconductor device according to claim 4, wherein the crystal regrowth step is a step of growing a buried layer including a current blocking layer of a semiconductor laser.

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