JPS6094579A - Burst detection synchronizing method - Google Patents

Abstract

PURPOSE:To obtain a synchronizing pulse of high accuracy for burst waveform change by utilizing the fact that a zero-crossing point of a burst signal is a fixed number, and counting a zero-crossing point. CONSTITUTION:An input signal 9 containing a burst signal is added to a clock generator 12, zero-crossing detector 10, and positive/negative peak holder 11. The peak holder 11 supplies threshold voltage to the detector 10. This detector 10 outputs a pulse when the burst signal is at a zero-crossing point. On the other hand, a counter 13 counts an output pulse from the detector 10, but counts only pulses coming at a constant interval, using a clock from the generator 12. When the counter 13 counts fixed numbers in succession, a synchronizing pulse generator 14, which is controlled by a clock from the generator 12, outputs a synchronizing pulse 15. Thus the synchronizing pulse of high accuracy can be obtained for the burst waveform change.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a burst detection synchronization method used for synchronizing signals such as high-definition television (TV) signals where burst signals are synchronization signals. be.

Conventional configuration and problems thereof FIG. 1 shows a conventional burst detection synchronization circuit. The configuration of this conventional example will be explained below with reference to FIG. 1. In FIG. 1, 1 is a bandpass filter, and an input signal 7 is input to this bandpass filter 1. In FIG. Further, the output of the bandpass filter 1 is input to subtraction circuits 2 and 4. The output of the attenuation circuit 6 is input to the other input of the subtraction circuit 2. The output of the subtraction circuit 2 is input to a delay circuit 3, and the output of the delay circuit 3 is input to the other input of the subtraction circuit 4.

The output of the subtraction circuit 4 is input to a window comparator 5 and an attenuation circuit 6, and the window comparator 5 outputs a synchronization pulse 8.

Next, the operation of the above conventional example will be explained. In FIG. 1, a signal as shown in FIG. 2 is added as the input signal 7. This is a video signal in which a burst is added as a synchronizing signal, and the polarity of the burst is inverted every time. It is assumed that the burst period is time τD, which corresponds to one line of video. Assuming that the subtraction circuit 1 does not receive an input from the attenuation circuit 6, the input signal 7 is input to the delay circuit 3 as is after frequency components other than those near the burst frequency are attenuated by the bandpass filter 1.

The subtraction circuit 4 calculates the difference between the input and output of the delay circuit 30, and the delay time of the delay circuit 3 is τ.

Therefore, the difference from the signal just one line before is calculated. As is clear from FIG. 2, the signal from one line before the burst has the opposite polarity, and the video signal has a strong correlation between lines and is almost the same signal, so in the end, the subtraction circuit 4
The video signal is suppressed and the output is only a burst. Further, by applying the output to the subtraction circuit 2 through the attenuation circuit 6, positive feedback is applied, and the degree of suppression of the video signal increases. The burst extracted in this way is the third
As shown in the figure, the waveform rises slowly.
The polarity is reversed each time. Since the output of the window comparator 5 is inverted when the absolute value of the input voltage exceeds a certain value, the output of the window comparator 5 is independent of the polarity of the input (a, b in Figure 4), as shown in Figure 4C. It becomes a certain timing.

Therefore, by using this output as the synchronization pulse 8 as a time reference, video can be synchronized. Also,
It is possible to create a clock that is in phase with the extracted burst. However, in the first half of the conventional example, as shown in Fig. 4, there is little margin in the threshold value of the window comparator 5, so if the waveform of the input signal 7 changes due to band limitation etc., the synchronization pulse 8 is output at the peak next to the burst. There was a problem that synchronization accuracy could not be achieved. In addition, large and expensive components such as delay elements must be used, resulting in a high cost.

OBJECTS OF THE INVENTION It is an object of the present invention to eliminate the problems of the above-mentioned conventional examples.

Structure of the Invention In order to achieve the above object, the present invention utilizes the fact that the number of zero-crossing points of a burst is constant, counts the zero-crossing points of a signal, detects that the number is constant, and synchronizes. This has the effect of making the time position of the zero-crossing point less susceptible to the influence of signal amplitude.

DESCRIPTION OF EMBODIMENTS The configuration of an embodiment of the present invention will be described below with reference to the drawings.

In FIG. 5, 9 is an input signal, and this input signal 9
is the clock generator 12 and the zero cross detector]0,
It is added to the peak holder 11 of both positive and negative polarity. This positive fist negative beak holder 11 provides a threshold voltage to the zero cross detector 10.

The output of clock generator 12 is applied to counter 13 and synchronous pulse generator 14. Zero cross detector 1
The output of 0 is applied to counter 13 and the output of counter 13 is applied to synchronous pulse generator 14. The output of the synchronization pulse generator 14 is the synchronization pulse 15.

Next, the operation of the above embodiment will be explained. As input signal 9 in FIG. 5, a signal including a burst signal as shown in FIG. 2 is added. By holding the 0-) peak and (→ peak) of the signal, the positive/negative peak holder 11 sets a constant threshold value to the center level of the burst, regardless of the magnitude of the DC potential contained in the input signal 9. The zero-crossing detector 10 outputs a pulse when the input signal 9 crosses the center value of the burst of the input signal 9. However, if the input signal 9 crosses the threshold value as shown in FIG. A pulse is output only when the burst center level is crossed within a certain time after the burst center level is crossed.

The clock generator 12 is composed of, for example, a PLL or the like, and generates a clock having a constant phase in response to the burst of the input signal 9. The counter 13 counts the output pulses of the zero-crossing detector 10, but uses a clock from the clock generator 12 to count only pulses that come at regular intervals. If the burst has N periods, the zero-crossing detector 10 will output (2N-1) pulses, and after counting (2N-1) pulses, the synchronous pulse generator 14 will output 2N pulses.
It detects that the second pulse does not come and outputs a synchronizing pulse 15. Since the clock from the clock generator 12 is continuously output, it is possible to detect the absence of the 2N-th pulse. Since the synchronization pulse 15 is output at the end of the burst as shown in FIG. 7, synchronization can be achieved by using this pulse as the time reference for synchronization. In addition, synchronization protection can be applied using the characteristic that bursts are continuous at regular intervals, and the probability of erroneous synchronization due to video signals can be reduced.

In this example, the number of zero-crossing points is detected as a characteristic of a burst, and the time position of the zero-crossing point does not change easily even if the signal changes in waveform due to band limitation. It has the advantage of being able to output high synchronization pulses.

Effects of the Invention The present invention has the above-described configuration, and provides the following effects.

(a) Since the number of zero-crossing points, which are less susceptible to waveform changes due to band limitation, is extracted as a burst characteristic, a burst detection synchronization circuit with high accuracy against waveform changes can be realized.

(b) It is not necessary to use large and expensive components and circuits such as delay circuits, and the realized circuit can be made smaller, lighter, and cheaper.

[Brief explanation of drawings]

Fig. 1 is a circuit block diagram implementing the conventional burst detection synchronization method, Fig. 2 is an input signal waveform diagram of the same circuit, Fig. 3 is an input waveform diagram of the window comparator of the same circuit, and Fig. 4 is a diagram of the input signal waveform of the same circuit. FIG. 5 is a block diagram of a circuit implementing the burst detection synchronization method in one embodiment of the present invention. FIG. 6 is an explanatory diagram of the operation of the zero-cross detector of the same circuit. FIG. 3 is a timing chart for outputting synchronizing pulses of the circuit. 9... Input signal, 10... Zero cross detector, 11
...Positive/negative peak holder, 12.. Clock generator, 13.. Counter, 14.. Synchronous pulse generator, 15.. Synchronous pulse.

Claims (1)

[Claims] A burst detection synchronization method is characterized in that, when synchronizing a composite video signal using a burst signal as a synchronization signal, video synchronization is achieved by detecting that a certain number of consecutive zero-crossing points of a burst waveform occur at a certain interval.