JPS6094304A - Manufacture of flitch - Google Patents

Manufacture of flitch

Info

Publication number
JPS6094304A
JPS6094304A JP58203473A JP20347383A JPS6094304A JP S6094304 A JPS6094304 A JP S6094304A JP 58203473 A JP58203473 A JP 58203473A JP 20347383 A JP20347383 A JP 20347383A JP S6094304 A JPS6094304 A JP S6094304A
Authority
JP
Japan
Prior art keywords
flitch
mold
shape
low dielectric
pair
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58203473A
Other languages
Japanese (ja)
Other versions
JPH0410404B2 (en
Inventor
勝 横山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP58203473A priority Critical patent/JPS6094304A/en
Publication of JPS6094304A publication Critical patent/JPS6094304A/en
Publication of JPH0410404B2 publication Critical patent/JPH0410404B2/ja
Granted legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔技術分野〕 この発明は、フリッチの製法に関するものである。[Detailed description of the invention] 〔Technical field〕 This invention relates to a method for producing flitch.

〔背景技術〕[Background technology]

一般に、フリッチは、型面がわん曲している上下一対の
型の間に複数枚の素材単板を入れて圧締することにより
製造されている。このようにして製造されたフリッチは
、スライスすることにより集成化粧単板等となる。とこ
ろが、このようにしてフリッチを製造する場合には、接
着剤の硬化に長時間を要するという問題等があることか
ら、上下一対の型として、高周波電極ともなるものを用
い、圧締の際に高周波誘電加熱を施し接着剤の硬化を速
めながらフリッチ化するということが行われている。す
なわち、第1図に示すように、高周波誘電加熱の電極と
もなる上型1と、これに対応する型面をもつものであっ
て同じく高周波誘電加熱の電極ともなる下型2の間に、
複数枚の素材単板を1層した素材単板積層体3を入れ、
高周波誘電加熱を施しながら上型1と下型2で圧締して
フリッチを製造するということが行われている。しかし
ながら、このようにする場合には、素材単板積層体3に
電界強度の小さい部分(斜線で示す部分)4と電界強度
の大きい部分(白地の部分)5とが生じ、電界強度の小
さい部分4は温度が低く、電界強度が大きい部分5は温
度が高くなり、温度が低い部分の接着が不充分となって
接着不良が生じるというような問題が生じていた。そこ
で、このような問題を解消するため、上型1と下型2の
型面上に、第2図に示すように低誘電体6を重ね、この
低誘電体6を介して素材単板積層体3を高周波誘電加熱
し圧締することが考え出された。このようにする場合に
は、低誘電体6の作用により電界の均一化が計られ、素
材単板積層体3内における温度分布が均一になる。しか
しながら、このように低誘電体6を用いる場合には、第
3図(a)ないしく、C)に示すように、所望の形状の
フリッチを得るためにそれぞれ最適の形状に形成された
上型1と下型2に対して、それぞれその上型1と下型2
の型面形状に合うように低誘電体6の形状を設定しなけ
ればならなかった。すなわち、所望の形状のフリッチを
得ようとするには、上型1と下型2をそれに合うような
形状に設定し、ついで低誘電体6をその上型1と下型2
の型面形状に合うように設定しなければならないため、
上型1°と下型2をつくる工程と低誘電体6をそれに合
わせてつくる工程を要し工程数が非常に多くなっていた
Generally, flitches are manufactured by placing a plurality of veneers of material between a pair of upper and lower molds having curved mold surfaces and pressing them together. The flitch manufactured in this manner is sliced into a laminated decorative veneer or the like. However, when manufacturing flitches in this way, there is a problem that it takes a long time for the adhesive to harden. High-frequency dielectric heating is applied to accelerate the curing of the adhesive while creating a flitch. That is, as shown in FIG. 1, between an upper mold 1 that also serves as an electrode for high-frequency dielectric heating, and a lower mold 2 that has a corresponding mold surface and also serves as an electrode for high-frequency dielectric heating,
Insert a material veneer laminate 3 made up of one layer of multiple material veneers,
A flitch is produced by pressing with an upper mold 1 and a lower mold 2 while applying high-frequency dielectric heating. However, in this case, a portion 4 where the electric field strength is small (the shaded portion) and a portion 5 where the electric field strength is large (the white portion) are created in the material veneer laminate 3. 4 has a low temperature, and the temperature of the portion 5 where the electric field strength is high is high, causing problems such as insufficient adhesion in the low temperature portion, resulting in poor adhesion. Therefore, in order to solve this problem, a low dielectric material 6 is stacked on the mold surfaces of the upper mold 1 and the lower mold 2 as shown in FIG. It was devised to apply high-frequency dielectric heating to the body 3 and clamp it. In this case, the electric field is made uniform by the action of the low dielectric material 6, and the temperature distribution within the material veneer stack 3 becomes uniform. However, when using the low dielectric material 6 in this way, as shown in FIGS. 3(a) to 3(c), upper molds each having an optimal shape are used to obtain a flitch with a desired shape. 1 and lower mold 2, respectively, the upper mold 1 and lower mold 2
The shape of the low dielectric material 6 had to be set to match the mold surface shape. That is, in order to obtain a flitch with a desired shape, the upper mold 1 and the lower mold 2 are set to a shape that matches the flitch, and then the low dielectric material 6 is set to the upper mold 1 and the lower mold 2.
Because it must be set to match the mold surface shape,
The number of steps was extremely large because it required a step of making the upper mold 1° and the lower mold 2, and a step of manufacturing the low dielectric material 6 accordingly.

〔発明の目的〕[Purpose of the invention]

この発明は、工程数の低減を目的とするものである。 This invention aims at reducing the number of steps.

〔発明の開示〕[Disclosure of the invention]

この発明は、型面がわん曲していて高周波電極面となっ
ている上下一対の型を用い、上下一対の型の型面上にそ
れぞれ低誘電体を重ねた状態で複数枚の素材単板を上下
一対の型の間に入れ、高周波加熱し積層接着することに
よりフリッチを製造するフリッチの製法であって、上下
一対の型の型面形状は不変にし、低誘電体として、製造
しようとするフリッチの積層面の形状に合う形状をもつ
ものを適宜形成し使用することを特徴とするフリッチの
製法をその要旨とする。
This invention uses a pair of upper and lower molds whose mold surfaces are curved and serve as high-frequency electrode surfaces, and stacks a low dielectric material on the mold surfaces of the upper and lower pair of molds, respectively, to form multiple veneers of material. This is a flitch manufacturing method in which flitch is manufactured by placing the material between a pair of upper and lower molds, applying high-frequency heating, and laminating and bonding it.The mold surface shape of the pair of upper and lower molds remains unchanged, and it is intended to be manufactured as a low dielectric material. The gist of this invention is a method for manufacturing a flitch, which is characterized by appropriately forming and using a flitch having a shape that matches the shape of the laminated surface of the flitch.

すなわち、この発明は、上下一対の型の型面形状は不変
にし、低誘電体として、製造しようとするフリッチの積
層面の形状に合う形状のものを適宜形成し使用するよう
にするため、従来のように上型と下型の型面形状をフリ
ッチに合わせて変えるという工程が不要になり、工程数
の低減を実現しうるようになる。
That is, the present invention leaves the mold surface shape of the pair of upper and lower molds unchanged, and uses a low dielectric material having a shape that matches the shape of the laminated surface of the flitch to be manufactured. This eliminates the need for the process of changing the mold surface shapes of the upper and lower molds to match the flitch, making it possible to reduce the number of processes.

つぎに、この発明の詳細な説明する。Next, this invention will be explained in detail.

この発明は、高周波電極ともなる上型7と下型8の型面
形状は、第4図に示すように不変にし、所望のフリッチ
の形状に合わせて第5図の(a)ないしくC)に示すよ
うに低誘電体9の形状を変えるものである。この際、問
題となる低誘電体9の誘電特性については、各形状に対
し、使用する低誘電体9の材質を変えることにより対応
しうるようになる。
In this invention, the mold surface shapes of the upper mold 7 and lower mold 8, which also serve as high-frequency electrodes, are kept unchanged as shown in FIG. The shape of the low dielectric material 9 is changed as shown in FIG. At this time, the dielectric properties of the low dielectric material 9 that are a problem can be addressed by changing the material of the low dielectric material 9 used for each shape.

すなわち、この発明によれば上型7と下型8の型面形状
は、常に同一であるため、同じ上型7と下型8を使用で
き、変更するのは低誘電体9の形状だけであるため、従
来例に比べて工程数を著しく低減しうるようになる。
That is, according to the present invention, the mold surface shapes of the upper mold 7 and lower mold 8 are always the same, so the same upper mold 7 and lower mold 8 can be used, and only the shape of the low dielectric material 9 is changed. Therefore, the number of steps can be significantly reduced compared to the conventional example.

つぎに、実施例について説明する。Next, examples will be described.

〔実施例1〕 第6図に示すように、幅360龍高低差34mmの正弦
波状の上型(高周波誘電加熱の電極ともなる)7と下型
(同じく高周波誘電加熱の電極ともなる)8を用い、こ
れらの型面上に、それぞれナイロン製の低誘電体(誘電
特性;誘電率・・・3,2゜誘電正接・・・0.02)
であって幅360 mm高低差71鰭の正弦波状の低誘
電体9を重ねた。そして厚みが0.8〜1. ’I n
+のアガチス脱染色単板(含水率30〜40wt%)を
100枚積層した素材単板積層体10を、上記両低誘電
体9の間に入れて高周波誘電加熱を施しながら圧締した
。この場合において、素材単板積層体10の中央部りと
端部Hの温度差は、(8℃)/(平均80℃)であった
。ちなみに低誘電体9を取り除いて同様に素材単板積層
体10を圧締した場合の素材単板積層体10の部分りと
Hの温度差は、(26℃)/(平均80℃)であった。
[Example 1] As shown in Fig. 6, a sinusoidal upper die (also serves as an electrode for high-frequency dielectric heating) 7 and a lower die (also serves as an electrode for high-frequency dielectric heating) 8 with a width of 360 mm and a height difference of 34 mm are made. A low dielectric material made of nylon (dielectric properties; dielectric constant: 3.2°, dielectric loss tangent: 0.02) was placed on each of these mold surfaces.
A sinusoidal low dielectric material 9 having a width of 360 mm and a height difference of 71 fins was stacked. And the thickness is 0.8~1. 'I n
A material veneer laminate 10 in which 100 + agathis destained veneers (water content 30 to 40 wt%) were laminated was placed between the two low dielectric materials 9 and pressed together while applying high frequency dielectric heating. In this case, the temperature difference between the center portion and the end portion H of the material veneer laminate 10 was (8° C.)/(80° C. on average). By the way, when the low dielectric material 9 is removed and the material veneer laminate 10 is pressed in the same way, the temperature difference between the part of the material veneer laminate 10 and H is (26°C)/(average 80°C). Ta.

〔実施例2〕 第7図に示すように、実施例1と同様、幅360mN高
低差34鶴の正弦波状の上型(高周波誘電加熱の電極と
もなる)7と下型(同じく高部S誘電加熱の電極ともな
る)8を用い、これらの型面上に、それぞれガラス繊維
強化ポリエステル樹脂製の低誘電体(誘電特性;誘電率
・・・5.3.誘電正接・・・0.026)であって幅
360鰭高低差57mmの正弦波状の低誘電体9を重ね
た。そして、厚みが0.8〜1.2鰭のアガチス脱染色
単板(含水率30〜4Qwt%)を100枚積層した素
材単板積層体10を、上記両像誘電体9の間に入れて高
周波誘電加熱を施しながら圧締した。この場合において
、素材単板積層体10の中央部りと端部Hの温度差は、
(6℃)/(平均80°C)であった。
[Example 2] As shown in Fig. 7, as in Example 1, a sinusoidal upper die 7 with a width of 360 mN and a height difference of 34 cranes (also serves as an electrode for high-frequency dielectric heating) and a lower die (also with a high S dielectric A low dielectric material made of glass fiber reinforced polyester resin (dielectric properties; permittivity: 5.3; dielectric loss tangent: 0.026) is placed on each mold surface. A sinusoidal low dielectric material 9 having a width of 360 mm and a fin height difference of 57 mm was stacked. Then, a material veneer laminate 10 made by laminating 100 destained agathis veneers (moisture content 30 to 4 Qwt%) having a thickness of 0.8 to 1.2 fins is inserted between the two image dielectrics 9. Pressing was performed while applying high-frequency dielectric heating. In this case, the temperature difference between the center part and the end part H of the material veneer laminate 10 is as follows:
(6°C)/(average 80°C).

ちなみに低誘電体9を取り除いて同様に素材単板積層体
10を圧締した場合の素材単板積層体10の部分りとH
の温度差は、(19℃)/(平均80℃)であった。
By the way, when the low dielectric material 9 is removed and the material veneer laminate 10 is pressed in the same way, the portion of the material veneer laminate 10 and H
The temperature difference was (19°C)/(80°C on average).

実施例1と2との対比から明らかなように、同じ形状の
上型7と下型8を用い、低誘電体9の材質および形状(
内側面の形状)を変えることにより、素材単板積層体1
0内部の温度を均一に保ちながら、形状の異なるフリッ
チが得られるようになる。
As is clear from the comparison between Examples 1 and 2, the upper mold 7 and lower mold 8 of the same shape were used, and the material and shape of the low dielectric material 9 (
By changing the shape of the inner surface, the material veneer laminate 1
Flitches of different shapes can be obtained while maintaining a uniform internal temperature.

〔発明の効果〕〔Effect of the invention〕

以上のように、この発明は、型面がわん曲していて高周
波電極面となっている上下一対の型を用い、上下一対の
型の型面上にそれぞれ低誘電体を重ねた状態で複数枚の
素材単板を上下一対の型の間に入れ、高周波加熱し積層
接着することによりフリッチを製造するフリッチの製法
であって、上下一対の型の型面形状は不変にし、低誘電
体として、製造しようとするフリッチの積層面の形状に
合う形状をもつものを適宜形成し使用するため、低誘電
体の形状のみを所望のフリッチの形状に合わせて変えれ
ば足りる。したがって、従来のように上型および下型の
型面形状まで変える必要がないため、工程数の低減を実
現できるようになる。
As described above, the present invention uses a pair of upper and lower molds whose mold surfaces are curved and serve as high-frequency electrode surfaces, and a plurality of low dielectric materials are stacked on the mold surfaces of the upper and lower pair of molds. This is a flitch production method in which a flitch is manufactured by placing two pieces of veneer material between a pair of upper and lower molds, applying high-frequency heating, and laminating and bonding them. In order to appropriately form and use a material having a shape that matches the shape of the laminated surface of the flitch to be manufactured, it is sufficient to change only the shape of the low dielectric constant to match the shape of the desired flitch. Therefore, it is not necessary to change the mold surface shapes of the upper mold and the lower mold as in the conventional method, and the number of steps can be reduced.

また、材料費の低減も達成できるようになる。It also becomes possible to reduce material costs.

【図面の簡単な説明】[Brief explanation of drawings]

第1図ないし第3図は従来例の説明図、第4図および第
5図はこの発明の説明図、第6図はこの発明の一実施例
の製造説明図、第7図は他の実施例の製造説明図である
。 7・・・上型 8・・・下型 9・・・低誘電体 1o
・・・素材単板積層体 が (a) (b) 第3図 第4図 (C)
1 to 3 are explanatory diagrams of the conventional example, FIGS. 4 and 5 are explanatory diagrams of the present invention, FIG. 6 is a manufacturing explanatory diagram of one embodiment of the present invention, and FIG. 7 is an explanatory diagram of another embodiment. It is a manufacturing explanatory drawing of an example. 7... Upper mold 8... Lower mold 9... Low dielectric 1o
...Material veneer laminate (a) (b) Figure 3 Figure 4 (C)

Claims (1)

【特許請求の範囲】[Claims] +1) 型面がわん曲していて高周波電極面となってい
る上下一対の型を用い、上下一対の型の型面上にそれぞ
れ低誘電体を重ねた状勢で複数枚の素材単板を上下一対
の型の間に入れ、高周波加熱し積層接着することにより
フリッチを製造するフリッチの製法であって、上下一対
の型の型面形状は不変にし、低誘電体として、製造しよ
うとするフリッチの積層面の形状に合う形状をもつもの
を適宜形成し使用することを特徴とするフリッチの製法
+1) Using a pair of upper and lower molds whose mold surfaces are curved and serve as high-frequency electrode surfaces, multiple veneers of material are stacked one above the other with a low dielectric material layered on the mold surfaces of the pair of upper and lower molds. This is a flitch manufacturing method in which the flitch is manufactured by placing the flitch between a pair of molds, applying high-frequency heating, and laminating and bonding. A flitch manufacturing method characterized by appropriately forming and using a material having a shape that matches the shape of the laminated surface.
JP58203473A 1983-10-28 1983-10-28 Manufacture of flitch Granted JPS6094304A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58203473A JPS6094304A (en) 1983-10-28 1983-10-28 Manufacture of flitch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58203473A JPS6094304A (en) 1983-10-28 1983-10-28 Manufacture of flitch

Publications (2)

Publication Number Publication Date
JPS6094304A true JPS6094304A (en) 1985-05-27
JPH0410404B2 JPH0410404B2 (en) 1992-02-25

Family

ID=16474720

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58203473A Granted JPS6094304A (en) 1983-10-28 1983-10-28 Manufacture of flitch

Country Status (1)

Country Link
JP (1) JPS6094304A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014213524A (en) * 2013-04-25 2014-11-17 日本電気硝子株式会社 Method for producing laminate

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6771797B2 (en) * 2020-04-10 2020-10-21 株式会社トライフォース・マネジメント Force sensor
JP6784432B1 (en) * 2020-09-18 2020-11-11 株式会社トライフォース・マネジメント Force sensor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014213524A (en) * 2013-04-25 2014-11-17 日本電気硝子株式会社 Method for producing laminate

Also Published As

Publication number Publication date
JPH0410404B2 (en) 1992-02-25

Similar Documents

Publication Publication Date Title
JPH01225539A (en) Laminated sheet
CN101086909A (en) Making method of high adhesive self-pasting dual-glass silk-covered film agglomerated copper flat line
JPS6094304A (en) Manufacture of flitch
CN108406980A (en) A kind of production method of new type compound core-board
JPS6120728A (en) Preparation of laminate board
CN220447416U (en) Special-shaped metal integrated plate
JPS58158203A (en) Manufacture of flitch
JPS58217303A (en) Manufacture of woody decorative board
JP2669567B2 (en) Method for manufacturing resin-impregnated wood
JPS595004A (en) Manufacture of flitch
CN114905594A (en) Bamboo board and production method thereof
JPS634935A (en) Preparation of multilayer circuit board
JPS58168501A (en) Manufacture of aggregate decorative veneer
CN115464726A (en) Preparation method of powder spraying arc-shaped product and special die
JPS59148615A (en) Manufacture of flitch
JPS6038105A (en) Manufacture of flitch
JPH0443029A (en) Manufacture of copper-clad laminated board
JPS5845055A (en) Manufacture of laminated board
JPS6248503A (en) Manufacture of bend aggregate
JPH0114870B2 (en)
JPS60212301A (en) Method of molding woody type multilayer board
JPH078483B2 (en) Method for manufacturing decorative veneer
JPS5941202A (en) Manufacture of aggregate wood
JPS6094302A (en) Manufacture of aggregate veneer
JPS6031904A (en) Manufacture of irregular woody decorative board