JPS6090694U - clock device - Google Patents

clock device

Info

Publication number
JPS6090694U
JPS6090694U JP1983184162U JP18416283U JPS6090694U JP S6090694 U JPS6090694 U JP S6090694U JP 1983184162 U JP1983184162 U JP 1983184162U JP 18416283 U JP18416283 U JP 18416283U JP S6090694 U JPS6090694 U JP S6090694U
Authority
JP
Japan
Prior art keywords
battery
time
clock device
reset
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983184162U
Other languages
Japanese (ja)
Inventor
告井　伸二
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Priority to JP1983184162U priority Critical patent/JPS6090694U/en
Publication of JPS6090694U publication Critical patent/JPS6090694U/en
Pending legal-status Critical Current

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  • Electromechanical Clocks (AREA)
  • Electric Clocks (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は従来装置の操作を説明するためのフローチャー
ト、第２図は本発明装置の概略構成図、第３図は同要部
詳細図、第４図は動作フローチャートである。FIG. 1 is a flowchart for explaining the operation of the conventional device, FIG. 2 is a schematic configuration diagram of the device of the present invention, FIG. 3 is a detailed view of the same essential parts, and FIG. 4 is an operation flowchart.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電池駆動式の時計装置に於て、電池交換等の電池装着時
に中央制御器（ＣＰＵ）及び他の所定回路をリセットす
る信号を形成する手段と、リセット時プログラムのイニ
シャルアドレスより実行し、時刻設定モードに切替える
とともに、時刻設定終了を検出して現時刻表示モードに
切替える手段とを備えてなることを特徴とする時計装置
。In a battery-powered clock device, there is a means for forming a signal to reset the central controller (CPU) and other predetermined circuits when the battery is installed such as when replacing the battery, and a means for setting the time by executing it from the initial address of the program at the time of reset. What is claimed is: 1. A timepiece device comprising means for switching to a current time display mode and detecting completion of time setting and switching to a current time display mode.
JP1983184162U 1983-11-28 1983-11-28 clock device Pending JPS6090694U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983184162U JPS6090694U (en) 1983-11-28 1983-11-28 clock device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983184162U JPS6090694U (en) 1983-11-28 1983-11-28 clock device

Publications (1)

Publication Number Publication Date
JPS6090694U true JPS6090694U (en) 1985-06-21

Family

ID=30398389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983184162U Pending JPS6090694U (en) 1983-11-28 1983-11-28 clock device

Country Status (1)

Country Link
JP (1) JPS6090694U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4836646U (en) * 1971-09-06 1973-05-02

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4836646U (en) * 1971-09-06 1973-05-02

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