JPS6089946A - Semiconductor element cooling structure - Google Patents
Semiconductor element cooling structureInfo
- Publication number
- JPS6089946A JPS6089946A JP19861983A JP19861983A JPS6089946A JP S6089946 A JPS6089946 A JP S6089946A JP 19861983 A JP19861983 A JP 19861983A JP 19861983 A JP19861983 A JP 19861983A JP S6089946 A JPS6089946 A JP S6089946A
- Authority
- JP
- Japan
- Prior art keywords
- cooling
- heat conductive
- contact
- semiconductor element
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
- H01L23/4338—Pistons, e.g. spring-loaded members
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
Description
【発明の詳細な説明】 a0発明の技術分野 本発明は半導体素子の冷却方式に関するものである。[Detailed description of the invention] Technical field of a0 invention The present invention relates to a cooling method for semiconductor devices.
b、技術の背景
電子機器に於いて、ICやLSI等の半導体素子を多数
用いる装置では、回路基板上に半導体素子を配設し実装
するのが一般的である。しかしながら近年、半導体素子
の高密度化につれ半導体素子の発熱密度も増加の一途に
ある。そこで、半導体素子のジャンクション温度の上昇
による素子破壊等の危険を防止するために、冷却能力の
大きな半導体素子の冷却方式が必要とされている。b. Background of the Technology In electronic devices that use a large number of semiconductor elements such as ICs and LSIs, it is common to arrange and mount the semiconductor elements on a circuit board. However, in recent years, as the density of semiconductor devices has increased, the heat generation density of semiconductor devices has also been increasing. Therefore, in order to prevent risks such as element destruction due to an increase in the junction temperature of a semiconductor element, a method for cooling a semiconductor element with a large cooling capacity is required.
C0従来技術と問題点 第1図は従来の冷却方式を示す図である。C0 conventional technology and problems FIG. 1 is a diagram showing a conventional cooling method.
第1図は、従来の一冷却方式である伝導方式を行う場合
の回路基板と半導体素子の構成を示し、1は半導体素子
、2はザーマルコンパウンド(以降、コンパウンドと呼
ぶ)、3は回路基板、4は冷却板をそれぞれ示す。Figure 1 shows the configuration of a circuit board and semiconductor element when using the conduction method, which is one of the conventional cooling methods, where 1 is the semiconductor element, 2 is the thermal compound (hereinafter referred to as compound), and 3 is the circuit board. , 4 indicate cooling plates, respectively.
このような冷却方式では、冷却板4の内部に水等冷媒液
を流し、冷却板4の一面を半導体素子1に接合させ、接
合面を介して半導体素子1の熱を冷媒液に逃がす。この
ような伝導方式においては、冷却板4と半導体素子1と
を接触させるにあたり、半導体素子1の熱を効率よく冷
却板に伝える必要かある。そこで、接触面の熱抵抗(こ
こでは接触面にできる空間による抵抗)をできる限り少
なくするために、接触面に:Iンバウントを塗布し、接
触面のすきまをなくしている。In such a cooling method, a coolant liquid such as water is flowed inside the cooling plate 4, one surface of the cooling plate 4 is bonded to the semiconductor element 1, and the heat of the semiconductor element 1 is released to the coolant liquid via the bonded surface. In such a conduction method, when the cooling plate 4 and the semiconductor element 1 are brought into contact with each other, it is necessary to efficiently transfer the heat of the semiconductor element 1 to the cooling plate. Therefore, in order to minimize the thermal resistance of the contact surface (in this case, the resistance due to the space created on the contact surface), :I inbount is applied to the contact surface to eliminate the gap between the contact surfaces.
このような伝導方式において、冷却効率を向上させるた
めには、半導体素子表面か冷却板表面に密着するように
接触させることが重要となる。In such a conduction method, in order to improve cooling efficiency, it is important to bring the semiconductor element into close contact with the surface of the semiconductor element or the surface of the cooling plate.
ところが、回路基板の機械的なそりや、半導体素子の回
路基板への装着の不ぞろい(かたむき。However, mechanical warping of the circuit board and uneven mounting of semiconductor elements onto the circuit board.
高低)、また冷却板接触面の平面度、半導体素子の表面
の平面度等の関係から、冷却板と複数の半導体素子表面
との接触の程度にばらつきか発生ずる。すなわち、その
接触のばらつき4;t: :7ンパウントの厚さのばら
つき(コンパウンドによる熱伝導に対する熱抵抗のばら
つき)となり、接触状態の良くない部分においては、コ
ンパウンドの厚さが大きくなってしまい、全体の半導体
素子に対して一様な冷却効果が得られない(コンパウン
ドの厚さによって熱伝導に対する熱抵抗が決定するため
)。従って、規定具」二のジャンクション温度の」ニ昇
を招く半導体素子が現われ、信頼ilLに欠()るとい
う問題があった。Variations occur in the degree of contact between the cooling plate and the surfaces of the plurality of semiconductor elements due to relationships such as height), flatness of the contacting surface of the cooling plate, and flatness of the surface of the semiconductor elements. In other words, there is a variation in the thickness of the contact (variation in the thermal resistance to heat conduction by the compound) of 4;t: :7, and the thickness of the compound becomes large in areas where the contact condition is not good. A uniform cooling effect cannot be obtained for the entire semiconductor device (because the thermal resistance to heat conduction is determined by the thickness of the compound). Accordingly, semiconductor devices have been developed which cause an increase in the junction temperature of the regulator, resulting in a lack of reliability.
69発明の目的
そごで本発明でtJ、−上述の問題点にりlして、半導
体素子の冷却のバラツキをζ、n4 (bて安定度を上
げ、信頼性を向」ニさせ、かつ、冷却効率を高める半導
体素子の冷却方式を提案する。69 OBJECTS OF THE INVENTION The present invention solves the above-mentioned problems by reducing the variation in cooling of semiconductor devices ζ, n4 (b) to increase stability and improve reliability. We propose a cooling method for semiconductor devices that increases cooling efficiency.
09発明の構成
そのため本発明では、基板上に複数設けられた半導体素
子に一枚の冷却板を接触させ、該冷却板中に冷媒を通し
て該複数の半導体素子を冷却する冷却構造であって、前
記半導体素子は前記冷却板接触側に熱伝導体を有し、前
記冷却板は前記半導体素子接触側に複数の穴を有し、該
穴内には、前記半導体素子接触方向に負荷を与えられた
熱伝導板が該穴周辺部と弾性相を介して接合され、前記
熱伝導体は前記穴内の熱伝導板と熱伝導性物質を介して
接触していることを特徴とする半導体素子の冷却構造を
提案する。09 Structure of the Invention Therefore, the present invention provides a cooling structure in which a cooling plate is brought into contact with a plurality of semiconductor elements provided on a substrate, and a coolant is passed through the cooling plate to cool the plurality of semiconductor elements, The semiconductor element has a heat conductor on the side in contact with the cooling plate, and the cooling plate has a plurality of holes on the side in contact with the semiconductor element. A cooling structure for a semiconductor device, characterized in that a conductive plate is joined to the peripheral portion of the hole via an elastic phase, and the thermal conductor is in contact with the thermal conductive plate in the hole via a thermally conductive substance. suggest.
10発明の実施例
第2図は本発明の一実施例である半導体素子の冷却構造
を示し、11は半導体素子、12は熱伝導体、13は冷
却板、14は熱伝導板、15はハネ、16はへロース、
17はザーマルコンパウン)’、1fN;1回路基板を
それぞれ示す。10 Embodiments of the Invention FIG. 2 shows a cooling structure for a semiconductor element according to an embodiment of the invention, in which 11 is a semiconductor element, 12 is a heat conductor, 13 is a cooling plate, 14 is a heat conduction plate, and 15 is a honeycomb. , 16 is herose,
17 indicates a thermal compound)', 1fN; 1 circuit board, respectively.
半導体素子11は−に部に熱伝導体12を有している。The semiconductor element 11 has a thermal conductor 12 on the negative side.
冷却板13には下部に複数の穴が設けられている。そし
て、その穴内にはバネ15により下方に負荷を受けた熱
伝導板14がベローズ16を介して穴周辺部と接合され
ている。ベローズ16自体も弾性を有し、必要に応じて
伸び縮みする。A plurality of holes are provided in the lower part of the cooling plate 13. Inside the hole, a heat conductive plate 14 loaded downward by a spring 15 is connected to the peripheral portion of the hole via a bellows 16. The bellows 16 itself also has elasticity and expands and contracts as necessary.
半導体素子11を冷却板13と接触させ冷却を行う場合
は、前記穴内の熱伝導板14と熱伝導体12をサーマル
コンパウンド17を介して一対一で接触させる。ごごで
、熱伝導板14はハネ15゜ベローズ16により半導体
素子11.及び、熱伝導体12の高さ、かたむき等に応
じて上下方向に伸縮する。そのため、サーマルコンパウ
ンド17の厚さを薄く、しかも、各半導体素子について
一様にできる。そして冷却板13中に冷媒を送り込むこ
とにより冷却が行なえる。When the semiconductor element 11 is brought into contact with the cooling plate 13 for cooling, the heat conductive plate 14 in the hole and the heat conductor 12 are brought into one-to-one contact with the thermal compound 17 interposed therebetween. The heat conductive plate 14 is connected to the semiconductor element 11 by the bellows 16 at 15 degrees. The heat conductor 12 expands and contracts in the vertical direction depending on its height, tilt, etc. Therefore, the thickness of the thermal compound 17 can be made thin and uniform for each semiconductor element. Cooling can be performed by feeding a refrigerant into the cooling plate 13.
20発明の効果
本発明によれば、熱伝導体と熱伝導板が一対一で接触し
ているため、半導体の高さ、かたむき。20 Effects of the Invention According to the present invention, since the heat conductor and the heat conduction plate are in one-to-one contact, the height and slant of the semiconductor can be reduced.
回路の基板精度等を問題とせずに熱伝導性コンパウン1
′の厚さを薄くすることができ、均一な冷却を得ること
が可能で、かつ、冷却能力も向」二する。Thermal conductive compound 1 without worrying about circuit board precision etc.
It is possible to reduce the thickness of the cooling layer, to obtain uniform cooling, and to improve the cooling capacity.
また1つの熱伝導板に複数の熱伝導体を接触させること
も可能である。It is also possible to bring a plurality of heat conductors into contact with one heat conduction plate.
第1図は、従来の一冷却方式である伝導方式を行う場合
の回路基板と半導体素子の構成を示し、1は半導体素子
、2はサーマルコンパウンド、3は回路基板、4は冷却
板をそれぞれ示す。Fig. 1 shows the configuration of a circuit board and a semiconductor element when performing a conduction method, which is a conventional cooling method, where 1 is a semiconductor element, 2 is a thermal compound, 3 is a circuit board, and 4 is a cooling plate. .
Claims (1)
触させ、該冷却板中に冷媒を通して該複数の半導体素子
を冷却する冷却構造であって、前記半導体素子は前記冷
却板接触側に熱伝導体を有し、前記冷却板は前記半導体
素子接触側に複数の穴を有し、該大向には前記半導体素
子接触方向に負荷を与えられた熱伝導板が該穴周辺部と
弾性材を介して接合され、前記熱伝導体は前記大向の熱
伝導板と熱伝導性物質を介して接触していることを特徴
とする半導体素子の冷却構造。A cooling structure in which a cooling plate is brought into contact with a plurality of semiconductor elements provided on a substrate, and a coolant is passed through the cooling plate to cool the plurality of semiconductor elements, the semiconductor element being on the side in contact with the cooling plate. The cooling plate has a plurality of holes on the side in contact with the semiconductor element, and the heat conduction plate, which is loaded in the direction of contact with the semiconductor element, is elastically connected to the surrounding area of the hole. 1. A cooling structure for a semiconductor device, wherein the thermal conductor is in contact with the large heat conductive plate via a thermally conductive material.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19861983A JPS6089946A (en) | 1983-10-24 | 1983-10-24 | Semiconductor element cooling structure |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP19861983A JPS6089946A (en) | 1983-10-24 | 1983-10-24 | Semiconductor element cooling structure |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6089946A true JPS6089946A (en) | 1985-05-20 |
Family
ID=16394203
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP19861983A Pending JPS6089946A (en) | 1983-10-24 | 1983-10-24 | Semiconductor element cooling structure |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6089946A (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5705853A (en) * | 1995-08-17 | 1998-01-06 | Asea Brown Boveri Ag | Power semiconductor module |
US7580265B2 (en) | 2005-04-15 | 2009-08-25 | Fujitsu Limited | Heat sink, circuit board, and electronic apparatus |
JP2010165712A (en) * | 2009-01-13 | 2010-07-29 | Denso Corp | Heat sink for power device |
JP2016119451A (en) * | 2014-10-14 | 2016-06-30 | インテル・コーポレーション | Automatic height compensating and co-planar leveling of heat removal assembly for multi-chip packages |
FR3138563A1 (en) * | 2022-07-27 | 2024-02-02 | Safran Electronics & Defense | THERMAL DRAIN FOR AN ELECTRONIC CARD |
-
1983
- 1983-10-24 JP JP19861983A patent/JPS6089946A/en active Pending
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5705853A (en) * | 1995-08-17 | 1998-01-06 | Asea Brown Boveri Ag | Power semiconductor module |
US7580265B2 (en) | 2005-04-15 | 2009-08-25 | Fujitsu Limited | Heat sink, circuit board, and electronic apparatus |
JP2010165712A (en) * | 2009-01-13 | 2010-07-29 | Denso Corp | Heat sink for power device |
JP2016119451A (en) * | 2014-10-14 | 2016-06-30 | インテル・コーポレーション | Automatic height compensating and co-planar leveling of heat removal assembly for multi-chip packages |
US9743558B2 (en) | 2014-10-14 | 2017-08-22 | Intel Corporation | Automatic height compensating and co-planar leveling heat removal assembly for multi-chip packages |
FR3138563A1 (en) * | 2022-07-27 | 2024-02-02 | Safran Electronics & Defense | THERMAL DRAIN FOR AN ELECTRONIC CARD |
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