JPS6086636A - Information processing device with address switching circuit - Google Patents

Abstract

PURPOSE:To obtain an external address switching circuit which facilitates the effective use of a port, by switching automatically the port from a port for port data to a port for address signal in response to a designated external memory capacity. CONSTITUTION:When a user uses an external memory, a jumper 6AH is provided for the purpose of setting bits M1 and M2 to logical ''1'' in a user program. Since a processor sets the jumper 6AH to an address register AR, a comparator CO sets an external memory designating signal C to ''1''. As the result, all bits M2-M5 of a bit A2 and following bits set to ''1'' are set to ''1''. Bits M2-M5 set to logical ''1'' make transfer gates T21-T51 inactive and make transfer gates T22-T52 active, and therefore, ports P2-P5 are used for bits A2-A5 of the register AR. Thus, ports are easily used effectively.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an information processing device having an address switching circuit, and more particularly to a microcomputer incorporating an internal memory and an address register for specifying the address of the internal memory or external memory.

Microcomputers are now used in all kinds of places in society, such as factories, offices, homes, public institutions, transportation facilities, and leisure facilities. This component with one brain revolutionizes the conventional single-body tool,
This has led to the widening of its uses, making it suitable for modern society, which is becoming highly complex.

In general-purpose microcomputers developed for such a wide range of uses, the capacity of built-in internal memory should be kept to the minimum necessary, and users who require more capacity should be able to add external memory. I am dealing with this. External memory, like input/output devices, is connected to the microcomputer through an external terminal (board), but in order to make full use of the narrow mounting space, the board is connected to the external memory's active address. It is often shared by switching between signals (external addresses) and other port data and all external address switching circuits.

Conventional external address circuits of this type include an internal/external memory determining means for determining whether the contents of the address register refer to internal memory or external memory, and an internal/external memory determining means for determining whether the contents of the address register refer to an internal memory or an external memory. A port switching means is provided for outputting the remaining bits of the data or address register except for the internal and external memory designating bits.

In such a conventional configuration, when the internal/external memory determining means determines external memory, all bits of the address register except the internal/external memory designation pin If are always placed in the boat regardless of the number of addresses to be expanded. Because of the allocation, unnecessary memory space must be set up, and the board may be unduly occupied. Although the illegal occupation of ports can be eliminated by adding external circuitry, the amount of hardware increases accordingly.

Other conventional external address switching circuits in this building include an internal/external/internal/external address switching circuit that determines whether the contents of the address register refer to internal memory or external memory, and an internal/external address switching circuit that determines whether the contents of the address register refer to internal memory or external memory, and external address switching circuits that match the external address and address spaces to be expanded. a mode register for presetting the number of ports equal to the number of address bits; and when the internal/external memory determining means determines the external memory, the boat data is transferred to the port corresponding to the corresponding bits of the address register in accordance with the contents of the mode register; and boat switching means for outputting the contents.

In such a conventional configuration, there is a drawback that it is necessary to set the mode register in advance and program programming using I'L, and this drawback increases the cause of programming errors. Another drawback is the layering. The disadvantages of the latter can be understood by remembering that microcomputers have a large user base and their programming level reaches extremely low levels.

SUMMARY OF THE INVENTION An object of the present invention is to provide an external address switching circuit that can easily utilize ports effectively.

The circuit of the present invention provides an external address switching circuit in a microcomputer that includes an internal memory and an address register that specifies the internal memory and the external memory, wherein the contents of the address register are set to the address register of the internal memory and the external memory. When the internal/external memory determining means determines whether the internal/external memory is pointing to an external memory, the internal/external memory determining means determines whether the internal/external memory is designated as an external memory, and the internal/external memory determining means determines whether the internal/external memory designation bit of the address register is specified by logic 11, excluding the internal/external memory designating bit. The present invention is characterized in that it includes a storage means in which a bit corresponding to the bit is set, and a boat switching means for selectively outputting boat data and the contents of the address register in response to the state of the storage means.

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. This embodiment includes an address register AR, a comparator CO, a register GR with a control gate, and 10 transfer gates Tlly.
T12 y T21+ 'I'22 r 'I"gz
l T32'I"41ν" a * T 51 and Tsz and 5 buffers B 1+ B 2+ B3
1 B4 and B5 and 5 inverters 'b'2
．． "31 '4 and ■5 and 5 boats Pb"2
+PR+''4 and P5 are provided on a semiconductor chip to form part of a microcomputer along with a processor, an internal memory, an input/output control circuit (all not shown), etc.

As an example, assuming that 96 bytes are allocated to the internal memory, an additional 32 bytes of external memory can be added for users who do not have enough memory capacity. Therefore, the address register AR, has seven bits A-, , A, , A, .

A2, A3, A4, and A5 (A-1 is the most significant bit), and when A-1 and A are both in the logic layer, the comparator Co outputs an external memory designation signal C. .

The address register GR has other bits (except for the internal and external memory designation bits (1, and Ao) of the address register) Al to A5.
are supplied, and each bit is a 5-bit M1 . A42゜M3. Consists of M4 and Ms. In FIG. 2, each pin (Ml-Ms) is an OR circuit O, and three NAND circuits NA1. I'
1jA2 and NA3, p)Mn(n=
The pressures of the bit An of the address register and the bit M of the gate register GR are supplied to the OR circuits 1 to 5). However, the input MO at bit Mx is fixed at logic ``0''.

Transfer gates Tnffi, Tfi2, buffer Bn, and inverter are address register AR.
bit A7 of the gate register GR, and bits M and l of the gate register GR, and operates to output boat data D, or bit A, to the boat Pn in response to the contents of bit Mn. Port data Dn is normal data supplied from the processor.

After entering the initial state, all bits M
1 to M5 are in a reset state (logic "0").

Furthermore, when only the internal memory is being accessed, the external memory designation signal C from the comparator CO is
Since the bit Mn is "0", the bit Mn maintains the reset state regardless of the input to the OR circuit O shown in FIG. In such a situation, all baud) P s
-Ps is used for port data DI""'DS, and the access address to the internal memory is naturally supplied from the processor via wiring inside the microcomputer.

Next, when the user uses external memory, the user program sets bits M1 and M2 to logic 1.
“Program steps to create, for example, JMP
6AH will be provided. The processor then moves to address 6A.
Since it is set in Hk address register AR, comparator c
od External memory designation I No. b Ct-Logic @1'. From this result, it can be seen that the NAND circuit NA1 in FIG. 2 is activated, and all bits M2 to M5 below the logic ``1'' designation A2 become the logic 11''. Since the bit M1 and the bit Al are logic "0", the logic 10# is held.

Bits M2 to M5 that became logic w'l# in this way
deactivates the transfer gates Tll to T51 and activates the transfer gates T22 to Ts2', so that the ports P2 to Ps4'' are used for the pins A2 to A5 of the address register AH.

The boat P1 functions for boat data.

In other words, by specifying JMP 6AH in the program, 16 bytes of external memory from 60H to 6FH are incorporated into the usable memory space, and the access address of this can be specified with 4 bits.
P5 came to be used for this purpose.

Instead of JMP 6AH, JMP 68H will give similar results, but 1 in JMP 5FH and address 6FH.
Since this is the maximum address of external memory, processing after jumping becomes complicated. Note that if you specify JMP7011, JMP 7811, or JMP 7AF, etc., bits P1 to P5 of the address register AR can be used for bits A1 to A5 of the address register AR.
32 bytes of external memory from 0H to 7FH will be incorporated into the available memory space.

In FIG. 1, an embodiment using a two-man-operated AND circuit in place of the transfer gates Ti1'Tst and T2 to T152 can be easily conceived. Furthermore, the clip 70 block formed by the NAND circuits NAz and NA3 in FIG. 2 may be replaced by other types of 7 lip-flops. Since the port is automatically switched from port data use to address signal use in response to the specified external memory capacity, it becomes possible to easily utilize the boat effectively.

[Brief explanation of the drawing]

Fig. 1 shows an example of an embodiment of the present invention, and Fig. 2 shows details of the embodiment. 1°AR...address register, CO...
Comparator, GR... Gate register, T11+"
1□7112□4'22+Tl1lItalyTBfl+T
41 T4'l + T 51 v 'II" 52°
°°°°゛Transfer gate, BitB2tB3ν
B4. B, °0"°°°ノ9tsufa, engineering hI2t13+
14t"5... Inverter, P 1 t"11
sP3 +P4 tP5 ...Boat. Figure 2

Claims (1)

[Claims] In an address switching circuit in a microcomputer that includes an internal memory and an address means for specifying an address of the internal memory or an external memory, it is determined whether the contents of the address means refer to the internal memory or the external memory. determining means; storage means that enters a set state when the determining means determines that the external memory is in the external memory; An information processing device having an address switching circuit, characterized in that it is provided with a boat switching means for outputting.