JPS6081663U - Twin type semiconductor device - Google Patents

Twin type semiconductor device

Info

Publication number
JPS6081663U
JPS6081663U JP1983173943U JP17394383U JPS6081663U JP S6081663 U JPS6081663 U JP S6081663U JP 1983173943 U JP1983173943 U JP 1983173943U JP 17394383 U JP17394383 U JP 17394383U JP S6081663 U JPS6081663 U JP S6081663U
Authority
JP
Japan
Prior art keywords
semiconductor device
type semiconductor
twin type
diode
twin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1983173943U
Other languages
Japanese (ja)
Inventor
波多腰　英文
Original Assignee
富士電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士電機株式会社 filed Critical 富士電機株式会社
Priority to JP1983173943U priority Critical patent/JPS6081663U/en
Publication of JPS6081663U publication Critical patent/JPS6081663U/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Electronic Switches (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はツインタイプ半導体装置の構造例を核脂を除い
て示した平面図、第２図ａ、　ｂ、　ｃはツ：　　イン
タイブ半導体装置における３種類の接続をそれぞれ示す
回路図、第３図は本考案の一実施例が・　　使用される
スイッチングレギュレータの回路図で【　　ある。 １０・・・ツインタイプ半導体装置。 【Figure 1 is a plan view showing an example of the structure of a twin-type semiconductor device with the nuclear resin removed; Figures 2a, b, and c are circuit diagrams showing three types of connections in an intervening semiconductor device; Figure 3; 1 is a circuit diagram of a switching regulator used in an embodiment of the present invention. 10...Twin type semiconductor device. [

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 二つのダイオードチップが同一基板上に固着されたもの
において、ダイオードチップとしてショットキバリアダ
イオードチップとファーストリカバリダイオードが１個
ずつ用いられたことを特彦とするツインタイプ半導体装
置。A twin-type semiconductor device in which two diode chips are fixed on the same substrate, and the special feature is that one Schottky barrier diode chip and one fast recovery diode are used as the diode chips.
JP1983173943U 1983-11-10 1983-11-10 Twin type semiconductor device Pending JPS6081663U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1983173943U JPS6081663U (en) 1983-11-10 1983-11-10 Twin type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1983173943U JPS6081663U (en) 1983-11-10 1983-11-10 Twin type semiconductor device

Publications (1)

Publication Number Publication Date
JPS6081663U true JPS6081663U (en) 1985-06-06

Family

ID=30378803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1983173943U Pending JPS6081663U (en) 1983-11-10 1983-11-10 Twin type semiconductor device

Country Status (1)

Country Link
JP (1) JPS6081663U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625655U (en) * 1985-06-26 1987-01-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS625655U (en) * 1985-06-26 1987-01-14

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