JPS6079797A - Low thermal resistance circuit board - Google Patents

Low thermal resistance circuit board

Info

Publication number
JPS6079797A
JPS6079797A JP18806983A JP18806983A JPS6079797A JP S6079797 A JPS6079797 A JP S6079797A JP 18806983 A JP18806983 A JP 18806983A JP 18806983 A JP18806983 A JP 18806983A JP S6079797 A JPS6079797 A JP S6079797A
Authority
JP
Japan
Prior art keywords
thermal resistance
low thermal
circuit board
resistance circuit
magnesia
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP18806983A
Other languages
Japanese (ja)
Other versions
JPH0359593B2 (en
Inventor
風見 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP18806983A priority Critical patent/JPS6079797A/en
Publication of JPS6079797A publication Critical patent/JPS6079797A/en
Publication of JPH0359593B2 publication Critical patent/JPH0359593B2/ja
Granted legal-status Critical Current

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  • Insulated Metal Substrates For Printed Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (イ)産業上の利用分野 本発明は低熱抵抗回路基板、特に厚膜混成集積回路に用
いられる低熱抵抗回路基板に関する。
DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to a low thermal resistance circuit board, particularly to a low thermal resistance circuit board used in a thick film hybrid integrated circuit.

(ロ) 従来技術 本願出願人はすでに特公昭46−13234号公報に厚
膜混成集積回路の組み込みに適した全屈基板を用いた低
熱抵抗回路基板を開発した。斯る基板はアルミニウム板
の表面を陽極酸化して酸化アルミニウム被膜で被覆した
ものであり、その表面に約30μの厚さのエポキシ樹脂
で銅箔な接着している構造なので、熱抵抗は1iの面積
当り1.3℃/W程度であった。
(b) Prior Art The applicant of the present application has already developed in Japanese Patent Publication No. 46-13234 a low thermal resistance circuit board using a fully bent substrate suitable for incorporating a thick film hybrid integrated circuit. Such a board is made by anodizing the surface of an aluminum plate and coating it with an aluminum oxide film, and the surface is bonded to copper foil with an epoxy resin approximately 30μ thick, so the thermal resistance is 1i. It was about 1.3°C/W per area.

最近高密度集積化の要請より更に大出力回路をも組み込
みでさる低熱抵抗基板が提案された。この基板は第1図
に示す・如く、アルミニウム等の良熱伝導性金属基板(
1)の−主面に多量のアルミナ(AJ2 Ug )を含
有したエポキシ樹脂層(2)を薄く付着した構造を有し
、樹脂1帽2)の厚さが60μと2倍になったにも拘ら
ず、熱抵抗は0.8℃/Wと改善されている。
Recently, in response to the demand for high-density integration, low thermal resistance substrates that can incorporate even higher output circuits have been proposed. This substrate is a metal substrate with good thermal conductivity such as aluminum (as shown in Figure 1).
It has a structure in which a thin epoxy resin layer (2) containing a large amount of alumina (AJ2 Ug) is attached to the main surface of 1), and even though the thickness of resin 1 and cap 2) is doubled to 60μ, Regardless, the thermal resistance is improved to 0.8° C./W.

しかしながら斯上の低熱抵抗回路基板な用いて混成集積
回路を生産すると大きな問題が生じた。
However, a major problem arose when producing hybrid integrated circuits using such low thermal resistance circuit boards.

これは一枚の基板に多数個の混成集積回路を形成した後
にプレスで各混成集積回路に打抜(工程で、プレス金型
の寿命が従来の基板が100万シヨツトであるのに対し
てこの基板では5000シヨツトで摩耗してしまうので
ある。この原因はアルミナにある。即ちアルミナめモー
ス硬度は9であり、プレス金型を形成する焼入れ鋼のモ
ース硬度は約6.5であり、プレス金型の側面を削るの
である。
This is a process in which a large number of hybrid integrated circuits are formed on a single board, and then each hybrid integrated circuit is punched out using a press. The substrate wears out after 5,000 shots.The cause of this is alumina.The Mohs hardness of alumina is 9, and the Mohs hardness of the hardened steel that forms the press die is approximately 6.5. This involves cutting the sides of the mold.

(/J 発明の目的 本発明は指点に鑑みてなされ、従来の欠点を大巾に改善
した低熱抵抗回路基板を提供することを目的とする。
(/J OBJECT OF THE INVENTION The present invention was made in view of finger points, and an object thereof is to provide a low thermal resistance circuit board that greatly improves the conventional drawbacks.

に)発明の構成 本発明に依る低熱抵抗回路基板は第2図に示す如く、良
熱伝導性金属基板(Illとその一生面に付着したマグ
ネシアを含有したポリイミド樹脂薄層Q2+より構成さ
れている。
B) Structure of the Invention The low thermal resistance circuit board according to the present invention, as shown in FIG. .

(ホ)実施例 本発明に依る低熱抵抗回路基板は良熱伝導性金属基板(
Illとその一生面に設けたマグネシア(MgO)を含
有したポリイミド樹脂屑02より成る。
(E) Example The low thermal resistance circuit board according to the present invention is a metal substrate with good thermal conductivity (
It consists of polyimide resin scraps 02 containing magnesia (MgO) provided on the whole surface of Ill.

金属基板(Illとしてはプレス等の加工容易な良熱伝
導性のアルミニウムを用いる。
The metal substrate (Ill) is made of aluminum, which has good thermal conductivity and is easy to process by pressing.

ポリイミド樹脂層a2には30〜85重量%のマグネシ
ア(MgO)を混入する。30JL量%は熱伝導率から
決められ、85重量%は基板への接着力から夫々法めら
れる。゛ マグネシア(MgO)は海水の食塩製造に伴ない製造さ
れた濃縮苦汁より得られる塩化マグネシウム(MgC4
)と高純度生石灰(CaO)の水和物であるC a (
OH) t とで以下の反応工程を行う。
30 to 85% by weight of magnesia (MgO) is mixed into the polyimide resin layer a2. The amount of 30JL is determined from the thermal conductivity, and the amount of 85% by weight is determined from the adhesive strength to the substrate.゛Magnesia (MgO) is magnesium chloride (MgC4) obtained from concentrated bittern produced during the salt production of seawater.
) and high-purity quicklime (CaO) hydrate Ca (
The following reaction steps are carried out with OH) t .

MgC1Jt + Ca (OII )2 →Mg (
011)t + CaC&この生成したMg(OH)t
を約400℃で脱水反応してMgOを得る。
MgC1Jt + Ca (OII)2 → Mg (
011) t + CaC & this generated Mg(OH)t
is dehydrated at about 400°C to obtain MgO.

Mg (OH)t 4:! MgO+ Hz Oなおこ
の反応は可逆反応であり、マグネシアは吸湿してMg’
(01−I’) に戻り好ましくない。そこで適当な粒
度のマグネシア(MgO)とB、 03 とを車量比8
5:15程度の混合比で混合し約1000℃で焼成する
と、B20.は液相または気相でMgOの表面に反応し
、S MgO0B! Os f タハ2 Py4gO−
B* Usの複酸化物を形成する。この複酸化物はマグ
ネシア(MgO)表面を機種しNDフィラー(商品名)
を形成する。NDフィラーはマグネシア(MgO)と異
なり、吸湿せず安定したフィラーとして利用できる。
Mg(OH)t4:! MgO+ Hz OThis reaction is reversible, and magnesia absorbs moisture and becomes Mg'
It returns to (01-I') and is not desirable. Therefore, magnesia (MgO) of appropriate particle size and B, 03 were mixed at a volume ratio of 8.
When mixed at a mixing ratio of about 5:15 and fired at about 1000°C, B20. reacts on the surface of MgO in liquid or gas phase, and S MgO0B! Os f Taha2 Py4gO-
B* forms a double oxide of Us. This double oxide is a model with a magnesia (MgO) surface and is an ND filler (product name).
form. Unlike magnesia (MgO), ND filler does not absorb moisture and can be used as a stable filler.

本発明に依る低熱抵抗回路基板は斯るNDフィラーを3
0〜85重M%含有したポリイミド樹脂(121を銅箔
03)の裏面に20〜100μ厚にロールコータ−して
仮乾燥した後、アルミニウム板01)の−主面にプレス
で熱圧着して形成する。然る後銅箔(1狙まエツチング
されて導電路を形成する。なおアルミニウム基板(1+
1にスクリーン印刷あるいは塗布によってポリイミド樹
脂+12)を付着する方法もあるが、生産効率の点でロ
ールコータ一方法が最良である。
The low thermal resistance circuit board according to the present invention contains 3 such ND fillers.
After applying a roll coater to the back side of a polyimide resin (121) containing 0 to 85% by weight (copper foil 03) to a thickness of 20 to 100 μm and temporarily drying it, it was hot-pressed to the main surface of an aluminum plate 01). Form. After that, the copper foil (1+) is etched to form a conductive path.
Although there is a method of attaching the polyimide resin +12) to 1 by screen printing or coating, the roll coater method is the best in terms of production efficiency.

斯る本発明の構造に依れば、マグネシアの熱伝導率86
 x 10−3Ca7/’C,Cm、 secであす、
アルミナ(1’tO5)の熱伝導率70 X 10 c
al、”c。
According to the structure of the present invention, the thermal conductivity of magnesia is 86.
x 10-3Ca7/'C, Cm, sec tomorrow,
Thermal conductivity of alumina (1'tO5) 70 x 10 c
al,”c.

cm、Secよりかなり放熱性が向上する。具体的には
第3図において点線で示すアルミナフィラーを配合した
エポキシ樹脂と実線で示すNDフィラーを配合した本発
明のポリイミド樹脂との熱伝導率を比較している。第3
図から明らかな様に本発明の低熱抵抗基板は従来のアル
ミナフィラーに比較して約60%程度の熱伝導率の向上
を図れる。
The heat dissipation performance is considerably improved compared to cm and sec. Specifically, in FIG. 3, the thermal conductivity is compared between an epoxy resin blended with an alumina filler shown by a dotted line and a polyimide resin of the present invention blended with an ND filler shown by a solid line. Third
As is clear from the figure, the low thermal resistance substrate of the present invention can improve thermal conductivity by about 60% compared to conventional alumina filler.

またマグネシアのモース硬度は5.5〜6であり、プレ
ス金型を形成する焼入れ鋼のモース硬度6.5に比べて
小さいので、プレス金型の摩耗は少なくプレス金型は従
来の100万シヲツト以上に寿命を延ばすことができる
In addition, the Mohs hardness of magnesia is 5.5 to 6, which is smaller than the Mohs hardness of 6.5 for the hardened steel that forms the press mold, so there is less wear on the press mold, and the press mold can be made in 1,000,000 shots compared to conventional press molds. You can extend the lifespan even more.

(へ)発明の効果 本発明に依る低熱抵抗回路基板では良熱伝導率のマグネ
シアを用いるので、従来より約60%以上高い熱伝導率
を有する基板を実現できる利点を有する。またポリイミ
ド樹脂を接着剤として用いるので熱的に安定しており耐
熱性に秀れている。
(f) Effects of the Invention Since the low thermal resistance circuit board according to the present invention uses magnesia which has good thermal conductivity, it has the advantage of being able to realize a board having a thermal conductivity that is approximately 60% higher than that of the conventional circuit board. Furthermore, since polyimide resin is used as the adhesive, it is thermally stable and has excellent heat resistance.

この結果混成集積回路への高出力回路の組込みか可能と
なり、更に集積化できる回路範囲を拡大できる。
As a result, it becomes possible to incorporate high-output circuits into the hybrid integrated circuit, and the range of circuits that can be integrated can be further expanded.

またマグネシアをNDフィラーとして用いるので、吸湿
性のあるマグネシアを低熱抵抗回路基板のフィラーとし
て利用できるようになった。
Furthermore, since magnesia is used as the ND filler, magnesia, which has hygroscopic properties, can now be used as a filler for low thermal resistance circuit boards.

更にマグネシアのモース硬度の低さにより良熱伝導性で
且つプレス加工容易な低熱抵抗回路基板を実現できた。
Furthermore, due to the low Mohs hardness of magnesia, a low thermal resistance circuit board with good thermal conductivity and easy press processing was realized.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の低熱抵抗回路基板を説明する断面図、第
2図は本発明の低熱抵抗回路基板を説明する断面図、第
3図は従来と本発明の低熱抵抗回路基板の熱伝導率を比
較する特性図である。 α1)は良熱伝導性金属基板、Q2+は絶縁樹脂薄層、
(13)は銅箔である。 第1図 ff1j> 3 j°゛1 に噴什(恥1%)
Figure 1 is a sectional view illustrating a conventional low thermal resistance circuit board, Figure 2 is a sectional view illustrating a low thermal resistance circuit board of the present invention, and Figure 3 is the thermal conductivity of the conventional and present low thermal resistance circuit boards. FIG. α1) is a metal substrate with good thermal conductivity, Q2+ is a thin insulating resin layer,
(13) is copper foil. Fig. 1 ff1j > 3 j°゛1 jet (shame 1%)

Claims (1)

【特許請求の範囲】[Claims] (1)良熱伝導性金属基板の一主面にマグネシアを含有
したポリイミド樹脂薄層を付着したことを特徴とする低
熱抵抗回路基板。 (2、特許請求の範囲第1項に於いて、前記マグネシア
の表面を酸化ボロンで被覆することを特徴とする低熱抵
抗基板。
(1) A low thermal resistance circuit board characterized by having a thin layer of polyimide resin containing magnesia adhered to one main surface of a metal substrate with good thermal conductivity. (2. A low thermal resistance substrate according to claim 1, characterized in that the surface of the magnesia is coated with boron oxide.
JP18806983A 1983-10-06 1983-10-06 Low thermal resistance circuit board Granted JPS6079797A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18806983A JPS6079797A (en) 1983-10-06 1983-10-06 Low thermal resistance circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18806983A JPS6079797A (en) 1983-10-06 1983-10-06 Low thermal resistance circuit board

Publications (2)

Publication Number Publication Date
JPS6079797A true JPS6079797A (en) 1985-05-07
JPH0359593B2 JPH0359593B2 (en) 1991-09-11

Family

ID=16217159

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18806983A Granted JPS6079797A (en) 1983-10-06 1983-10-06 Low thermal resistance circuit board

Country Status (1)

Country Link
JP (1) JPS6079797A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253827A (en) * 1985-05-30 1987-03-09 三井東圧化学株式会社 Metallic base printed wiring substrate and manufacture thereof
US5125508A (en) * 1989-07-06 1992-06-30 Murata Manufacturing Co., Ltd. Tape-form electronic component package

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576755U (en) * 1980-06-12 1982-01-13
JPS57148870U (en) * 1982-02-24 1982-09-18

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576755B2 (en) * 1973-07-26 1982-02-06

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS576755U (en) * 1980-06-12 1982-01-13
JPS57148870U (en) * 1982-02-24 1982-09-18

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6253827A (en) * 1985-05-30 1987-03-09 三井東圧化学株式会社 Metallic base printed wiring substrate and manufacture thereof
US5125508A (en) * 1989-07-06 1992-06-30 Murata Manufacturing Co., Ltd. Tape-form electronic component package

Also Published As

Publication number Publication date
JPH0359593B2 (en) 1991-09-11

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