JPS6068724A - Analog-digital and digital-analog converter - Google Patents

Abstract

PURPOSE:To quicken data processing by a microcomputer or the like by allowing the microcomputer or the like to process data as much as possible while an A/D or a D/A converter used for the microcomputer or the like convert data. CONSTITUTION:The A/D converter comprising a D/A converter 1, a buffer 5, a sequential comparison type register SAR4 and a compatator 10 A/D-converts data during the time when a READ address of a memory section 2 is set from a control logic circuit 3. Then a signal of the SAR4 is saved temporarily to a saving register 6, a data stored in the memory section 2 is interrupted, fed to the D/A converter 1, a D/A conversion output OUT is obtained, and then the remaining A/D conversion is conducted succeedingly by the A/D converter. No idle time is required when the address is changed over from a WRITE address to the READ address, and the processing capability of the microcomputer or the like is improved.

Description

[Detailed Description of the Invention] [Technical Field] The present invention is used in microcomputers etc.
)・Relates to an A/D/D/A converter base that eliminates time loss when setting addresses in a memory section by a D/A converter.

[Prior art]

In microcomputers, etc., a D/A converter constitutes a successive approximation type A/D converter, a data memory is provided to store data, and data stored in a separate address is transferred to the D/A converter. One D/A converter is often used to have both A/D conversion and D/A conversion functions, such as A/A conversion and output.

In this case, switching from the WRITE address to the READ address requires a switching time M1 as shown in FIG. Further, the number of bits×N is constant, and the WRITE address and READ address cannot be set at the same time.

Therefore, this switching time M1 imposes a certain limit on the processing ability of the microcomputer.

[Object of the present invention]

The present invention was made in view of the paper problems, and its purpose is to process as much data as possible during conversion of A/D-D/A converters used in microcomputers, etc. In this way, the present invention provides an A/D-D/A converter that speeds up data processing in microcomputers and the like.

[Summary of the invention]

In order to achieve the above object, the present invention provides a successive approximation type A/D
The converter is provided with a register that temporarily holds the conversion signal during A/D conversion by the A/D converter, and is formed so that the data stored in the harmonization section is interrupted while the register is in operation. The present invention is characterized in that one piece of data is inserted during switching from an address to a READ address, thereby increasing processing capacity and speeding up processing time.

[Example of the present invention]

Hereinafter, a preferred embodiment of the present invention will be described based on the drawings.

In FIG. 2, 1 is a D/A converter, and 2 is a memory section that receives commands from the control logic circuit 6 and outputs digital data stored at addresses. 4 is a successive approximation type register (SAR) which successively compares the input analog signal and outputs it as digital data, and then manually inputs the signal to the D/A converter 1 via a time-sharing buffer circuit 5. ing.

Here, the configuration of a conventional successive approximation type A/D converter will be explained. 10 is a converter, 4 is SAR, 1 is a D/A converter,
These circuits convert input analog signals into digital signals. ■Refer to 4 leapfrogs) The first two SARs 4 are provided with a save register 6 that temporarily fixes the input signal when the writing of digital data to the WRITE address is completed, and saves the signal during the furnace shutdown. It is being

As shown in FIG.
This is to save the SAR4 signal for a switching time M1 during which the E address is switched to the READ address, and during that time, the signal already stored in the memory section 2 is transferred from the memory section 2 as data by D/A conversion to the D/A converter 1. It is designed to output to .

Note that the register 6 may be provided in the broken line portion. In the figure,
Reference numeral 11 denotes a switch which is closed in response to a command from the control logic circuit 5 when the D/A converter 1 outputs a substantial analog value.

[Operation of the present invention]

According to the present invention having the above configuration, as shown in FIG. 3, other data is input to the D/A converter 1 during the switching time M1, so that the switching time M1 in Example A is idle. In addition, the processing power of a computer (not shown) is increased by the output data, and overall the processing time of the computer, etc. is accelerated.

[Effects of the present invention]

As is clear from the above configuration, according to the present invention, the A/D
- Not only does the processing capacity of a microcomputer using a D/A converter improve, but also the overall processing time is shortened.

[Brief explanation of the drawing]

FIG. 1 is an A/D-D/A f conversion state diagram showing a conventional example.
FIG. 2 is a block diagram showing an embodiment of the present invention, FIG. 5 is a state diagram of A/D-D/A conversion according to the present invention, and FIG. 4 is a block diagram of a conventional successive approximation type A/D converter. It is a diagram. 1...D/A converter, 2...Memory unit 4...Successive approximation type register 6...Register (save register) Patent applicant Nippon Marantz Co., Ltd.

Claims (1)

[Claims] (1) A device comprising a D/A converter and a memory section for storing digital data, which operates the D/A converter as a successive approximation type A/D converter in a time-sharing manner, and stores the result in the memory. , a circuit having an A/D-D/A converter that outputs already stored data through the same D/A converter, the circuit having an A/D-D/A converter that outputs already stored data through the same D/A converter, the A 5% converter that allows you to divide the data stored in the memory section to an appropriate size.