JPS6068588U - video circuit - Google Patents
video circuitInfo
- Publication number
- JPS6068588U JPS6068588U JP15942083U JP15942083U JPS6068588U JP S6068588 U JPS6068588 U JP S6068588U JP 15942083 U JP15942083 U JP 15942083U JP 15942083 U JP15942083 U JP 15942083U JP S6068588 U JPS6068588 U JP S6068588U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- video
- video circuit
- output
- input signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Television Signal Processing For Recording (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の映像回路を示す回路図、第２図は第１図
における特性図、第３図はこの考案の一実施例である映
像回路を示す回路図、第４図は第３図における特性図で
ある。
図中、１，２．３は入力端子、６，７，８゜９．１０．
１１はインバータ、１２，１３．１４は重み付は抵抗、
２０はゲート回路、２３はプッシュプル回路である。な
お、図中、同一符号は同一あるいは相当する部分を示す
ものとする。Fig. 1 is a circuit diagram showing a conventional video circuit, Fig. 2 is a characteristic diagram of Fig. 1, Fig. 3 is a circuit diagram showing a video circuit which is an embodiment of this invention, and Fig. 4 is a diagram showing the characteristics of Fig. 1. FIG. In the figure, 1, 2.3 are input terminals, 6, 7, 8° 9.10.
11 is an inverter, 12, 13.14 is a weighted resistor,
20 is a gate circuit, and 23 is a push-pull circuit. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
像信号を形成させる映像回路において、上記入力信号の
有無を検出し、全ての入力信号がない場合出力を発生す
るゲート回路を設け、上記ゲート回路の出力によって上
記映像信号をブランキングするようにしたことを特徴と
する映像回路。In a video circuit that forms a video signal displaying a plurality of gradations using a plurality of TTL input signals, a gate circuit is provided that detects the presence or absence of the input signal and generates an output when all the input signals are absent, and the gate circuit A video circuit characterized in that the video signal is blanked by the output of the circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15942083U JPS6068588U (en) | 1983-10-15 | 1983-10-15 | video circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15942083U JPS6068588U (en) | 1983-10-15 | 1983-10-15 | video circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6068588U true JPS6068588U (en) | 1985-05-15 |
Family
ID=30350937
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15942083U Pending JPS6068588U (en) | 1983-10-15 | 1983-10-15 | video circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6068588U (en) |
-
1983
- 1983-10-15 JP JP15942083U patent/JPS6068588U/en active Pending
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