JPS6065698A - Azimuth error display device - Google Patents

Abstract

PURPOSE:To grasp accurately an azimuth error by providing a time constant circuit between an error display device and an azimuth error detector so as to prolong a display time of the azimuth error. CONSTITUTION:An azimuth error detecting signal 124 obtained at the azimuth error detector 44 is fed to the azimuth error display device 9a via a differential amplifier 8 and a time constant circuit 7. When a magnetic tape has a phase shift, an ouput signal 130 of the circuit 8 is changed and a level of a point 2 is changed. Thus, the lighting of a display section diode 57 of the display device 9a is transited to any of diodes 27, 51, 63, 69 displaying the phase shift and a transistor 4 of the time constant circuit 7 is turned off. The circuit is set so that any one diode displaying the phase shift for the time constant' share set to a resistor 1 keeps lighting.

Description

DETAILED DESCRIPTION OF THE INVENTION This invention relates to an azimuth error display device that detects that the gap direction of the reproducing head is deflected with respect to the magnetization direction of the disk and that an error occurs between the image directions, and displays a dot display (that is, a lighting display). It is something.

When reproduction is performed in a magnetic tape device, if the gap direction of the reproduction head is deviated with respect to the magnetization direction of the magnetic tape, the high frequency range of the reproduced signal will deteriorate.

So, in the case of conventional magnetic tape 'IM U VC.

Azimuth adjustment is performed in advance using a t1 quasi-tape so that the gap direction of the reproducing head coincides with its standard magnetization direction.

However, the direction of magnetization of magnetic tapes differs depending on the magnetic tape, and therefore, conventionally, the gap direction of the playback head differs for each magnetic tape with respect to the direction of magnetization of the magnetic tape, which usually causes azimuth errors and prevents good playback. I couldn't do it. Therefore, if you use a magnetic tape device fδ that is not equipped with manual auto-azimuth control and are unaware of the azimuth deviation of your own magnetic tape, you may not be able to obtain good playback if the deviation is large. However, there are problems such as causing discomfort to the listener.

The present invention has been made in consideration of the above-mentioned conventional problems,
The object is to provide a magnetic tape azimuth error display device that allows each person to accurately recognize in advance the azimuth error occurring between the magnetic head and reproducing head of the magnetic tape owned by the user by displaying dots.

In order to achieve the above object, the present invention provides a reproducing head having a force arranged in the direction of the channel of a magnetic tape, a reproducing head having a vertical gap, and a deceptive reproducing signal obtained at each gap of the reproducing head. A pulse generation circuit that outputs a pulse corresponding to a phase difference of , and a pulse generation circuit that outputs a pulse corresponding to a phase difference of . an azimuth error detector that detects from a phase pulse that the gap direction of the read head is deflected; and an error indicator that displays the occurrence of an azimuth error based on an azimuth error detection signal output from the azimuth error detector; Further, a time constant circuit is provided between the error indicator and the azimuth error detector to lengthen the indication display time in a range where the azimuth error is large as indicated by the indicator of the error indicator. The feature is that it is possible to accurately grasp the degree of

[Example of the present invention]

Hereinafter, preferred embodiments of the mounting according to the present invention will be described based on the drawings.

FIG. 1 shows a preferred embodiment of the present invention, and a stereo tape deck will be explained here as an example.

As shown in FIG. 2, the magnetic head 10 of FIG.
The dividing gap 14c.

It has 14D. In this way, the magnetic head 10 has a plurality of gaps 14 arranged in the width direction of the channels 12R and 12L of the magnetic tape 12, and in this embodiment, two gaps are provided in the width direction of each channel 12R and 12L. 14A, 14B, 140%41) are arranged.

FNf-jB No. 100A, 100B, 100C1 obtained from each of the above gaps 14A, 14B, 14c, 14D
1ooD is supplied to the following phase pulse generation circuit.

The above phase pulse generation circuit has 12R112L for each channel.
A pair of waveform processing circuits 16A are provided for each waveform processing circuit.

16B, 18A, 18B, and the reproduction signal 10oA
.

100B, 100C, 100D are waveform processing circuits 16A,
16B.

18A, , 1813, respectively. Since the waveform processing circuits IS and 18 are the same, only the waveform processing circuit 16A will be explained here, and the explanation of the other waveform processing circuits 16B, 18A, and 18B will be omitted.

The reproduced signal 100A is supplied to the pulse shape circuit 22 and the threshold circuit 24 via the band filter 20 of the waveform processing circuit 16A. Then, the output signal 102 of the pulse shape circuit 22 and the output signal 104 of the threshold circuit 24 are sent to the high time window circuit 26.
(i.e. the threshold level and the playback signal 10
0) are respectively supplied to the pulse-effect 0 circuit 28.

Furthermore, the output signal 106 of the time window circuit 26 is fed on the one hand via a delay circuit 30 to one AND input of the AND circuit 62 and to the R input of the flip-flop 54, and on the other hand to one AND input of the AND circuit 36. ing. The output signal 108 of the pulse shape circuit 28 is supplied to the other AND input of the AND circuit 56. The AND output 110 of this AND circuit 5B is supplied to the S input of the flip 70 knob 64, and the Q output 112 thereof is supplied to the other AND input of the AND circuit 32.

The output signal 114 of this AND circuit 62 is the output signal of the waveform processing circuit 16A.

In addition, this phase pulse generation circuit has each channel 12R, 1
Each 2L includes a phase detection circuit 3aA, s8B, the phase detection circuit 38A receives output signals 114A, 114B from the waveform processing circuits 16A, 16B, and the waveform detection circuit 58B receives output signals 114c from the waveform processing circuits taA, iaB.

114D are each supplied.

Here, the phase detection circuits 38Aj8B have the same circuit configuration 2, so only the phase detection circuit 38A will be explained here, and the explanation of the phase detection circuit IH will be omitted.

The above signal 114A is supplied to the S input of the flip-flop 40 and the R input of the flip-flop 42 of the phase detection circuit 3LA, and the output f8 signal 114B is supplied to the S input of the flip-flop 42 with the R input of the flip-flop 40.
is supplied to the input. These flip-flops 40
．． 42 Q outputs 118A and 118B are phase detection circuit 38
Similarly, the phase detection circuit 387
3 also outputs Q outputs 118C and 118D.

The phase pulse generation circuit of this embodiment has the above configuration,
The above Q outputs 118A, 118B, 118C.

118D is used as the phase pulse.

Q outputs 118A and 118B as the above phase pulses.

118C and 118D are the following azimuth error detectors 44
is supplied to.

The Q outputs 118A and 118B are supplied to the OR circuit 46A, and the Q outputs 118(::, 118p are supplied to the OR circuit 46B, respectively, and the OR output 120 of the OR circuit 46A is supplied to the OR circuit 46A.
A is supplied to one OR input of the OR circuit 48 and the D input of the 2-lip 70 tube 50, and the OR circuit 1N846
The OR output 120B of B is supplied to the other input of the OR circuit 48. Further, the OR output 122 of the OR circuit 48 is supplied to the E input of the flip-flop 70 tube 50, and the Q output side of the flip-flop 50 has one end connected to the ground, the other end of a resistor 52 with a resistance value R1, and one end connected to the power supply. The positive end of a resistor 54 having a resistance value R2 is connected to the cathode of a Zener diode 56 whose anode is grounded. The Q output 124 of this flip-flop 50 is taken out from the high potential side of the Zener diode 56 and is used as the above-mentioned azimuth error generation signal.

The azimuth error detection signal 124 obtained by the azimuth error detector 44 in this manner is supplied to the next azimuth error display 9a via the differential amplifier 8 and the time constant circuit 7.

When the azimuth error indicator 9a is at the center level, that is, when the diode 57 which is the indicator is lit, there is almost no azimuth shift and there is no phase shift, so transistor 4 is turned on and transistor 6 is turned on.
is set to be off.

Also, during manual operation with the AAC circuit 6 off, if there is a phase shift in the magnetic chip 1120, the output signal 1 of the differential circuit 8
30 changes, and the point 20 level changes accordingly. In this case, the lighting of the diode 57, which is the indicating part of the error indicator 9a, goes to one of the diodes 27, 51, 63, and 69, which is the indicating part that indicates the amount of other phase deviations, and the azimuth error is detected. The transistor 4 is turned off by the signal from the display 9a, and the resistor 1 is set so that one diode remains lit for a time constant.

The difference v1 output 130 of the differential amplifier 8 is supplied to each non-inverting input of the comparators 96A, 96B, 96c, 96D, 96E). In addition, these comparators 96A,
96f3, 96C, 96D, 96gL7) Transfer J5'
jJI/? -1/'i'ti'W voltage with resistance 9B, 11
, 13, 15, 17. A reference voltage obtained by voltage division is supplied.

The output of the comparator 96A is connected to the inverter 21, 23 and the resistor 25'! on the one hand. il-through the first LED
27, and UL is supplied to one NOR input of the NOR circuit 31 via the impark 29 on the other hand. The output of the comparator 96I3 is supplied to the other NOR input of the NOR circuit 31 on one side, and to one NOR input of the NOR circuit 35 via the inverter 66 on the other side. Further, the output of the comparator 96C is supplied to the other NOR input of the NOR circuit 55 on one side, and to one NOR input of the NOR circuit 1) 369 via the inverter 67 on the other side. 1/c1 comparator 9
The output of 6D is sent to the other NOR input of the NOR circuit 39 on one side, and to the NOR circuit 4 via the inverter 41 on the other side.
6 is supplied to one of the NOR inputs. The output of the comparator 96B is supplied to the other input of the NOR circuit 43. Furthermore, the output of the NOR circuit 41 is passed through an inverter 45 and a resistor 47 to a second L1]51.
Front a [The output of the chinois circuit 35 is the inverter 56, the resistor 5
The output of the NOR circuit 43 is sent to the LED 57 via the inverter 59 and the resistor 61, and the output of the NOR circuit 43 is sent to the LED 57 via the inverter 65 and the resistor 67. 69 respectively.

A preferred embodiment of the present invention has the above configuration, and its operation will be explained below.

In FIG. 3 and FIG. 21A4, the gap direction of the magnetic head 10 is represented by a straight line 132, and the magnetization direction of the bent magnetic tape 12 is represented by a straight line 164, respectively.

In FIG. 4, φ represents the phase difference between the image azimuths of 162° and 164°.

As shown in FIG. 6, when both azimuths 132 and 134 match, no phase angle φ occurs, and the 41st! I
As shown in FIG. 1, when the two azimuths 132° 164 do not match, a phase difference φ occurs, and at this time, a phase pulse corresponding to the phase difference φ is output from the phase pulse generating circuit as follows.

FIG. 5 shows the waveforms of each part of the waveform processing circuit 16A (or waveform processing circuits 16B, 18A, 18B). When a reproduced signal 100A having a waveform as shown in the figure is supplied, the pulse save circuit 22
is the output signal 10 every time the reproduced signal 100A crosses zero.
2 rises, and the time window circuit 26 makes its output signal 102 a constant width pulse (output signal 106).

On the other hand, in the threshold 24, a threshold level is set in advance, and the pulse shape circuit 28 causes its output signal 108 to rise when the reproduced signal 100A crosses the threshold level. In the figure, the threshold level is represented by voltage 166.

Further, when the output signals 106 and 108 are ANDed by the AND circuit 36, the AND output 110 becomes as shown in the figure, which becomes the S input of the 7-lip 70-tub 64. At this time, the output signal 106 is delayed by the delay circuit 60 so that when the delayed output signal 106 falls, the Q output 112 of the flip-flop 34 falls. Since the Q output 112 and the delayed output signal 106 are ANDed by the AND circuit 62, an AND output 114 of a predetermined width is obtained from the AND circuit 32 as shown in the figure.

As mentioned above, the signal processing circuit 16A receives the reproduced signal at 100A.
Outputs a pulse of a predetermined width every time the signal 114 crosses zero.
Output as A. -1, waveform processing circuits 16B, 18
A and 18B operate in the same way and output signals 114B and 114.
(:, 1141) is output.

Since the output signal 114A is supplied to the S input of the flip-flop 40A and the R input of the flip-flop 42, and the output signal 114B is supplied to the R input of the 7-lip-flop 40 and the S input of the flip-flop 42, the previous output signal 114A is supplied. The flip-flop 40 (or 42) set in (or 114] 3) outputs the subsequent output signal 11
4A (- or 114B) and outputs the Ryokawa power signal 11 from the flip-flop 40 (- or 42).
4A.

1liii Q output 118 corresponding to a phase difference of 114B
A or 118B is output. That is, output signal 1
If 14A occurs first, as shown in Figure 6,
The Q output 118A of the flip-flop 40 is the output signal 1.
It rises at the same time as the output signal 14A rises, and later falls at the rise of the output signal 114B. Great, output signal 1
14B occurs first, the flip-flop 42 outputs a Q output 118B which rises at the output signal 114B and falls at the output signal 114A, as shown in FIG. As a result, the Nockles width of the Q outputs 118A, 118B matches the phase difference between both signals 114A, 114B.

As described above, the phase detection circuit 58A has gaps 14A, 1
Phase difference φ between reproduced signals 100A and 100B obtained at 4B
It is possible to output the Q outputs 118A and 118B with a width corresponding to the width as phase difference pulses.

The phase difference detection circuit 3813 is also the phase difference detection circuit 38A.
Since it has the same configuration as Q output 118C,
118D74-It is possible to output.

Nariichi, the above Q output 118, 4, 118B, 118C,
11, 81) is set to be sufficiently wider than the time width of the phase angle φ.

When the Q output 118 is input to the azimuth error detector 44, an azimuth error detection signal 124 of positive polarity and the same pulse width is obtained as shown in FIG.
When the Q output 118B is input, an azimuth error detection signal 124 of opposite polarity and the same pulse width is obtained. In addition, the flip-flop 50 has Q outputs 118A, 118B,
118C.

118Di OR is input, so when Q output 118C is input, the same azimuth error detection signal 124 as Q output 118A is generated, and when Q output 118D is input, the same azimuth error detection signal as Q output 118B is generated. A signal 124 is also obtained for the L channel.

In the above description, whether or not the signal 124 has positive polarity is determined based on the voltage obtained by dividing the power supply voltage VDD by the resistor 52.54, and the positive polarity signal 124 is determined by the Zener voltage Vz of the Zener diode 56 The opposite polarity signal 124 is clamped at the voltage ljl.

As shown above, the azimuth error of the main height example (ξ usability corresponded to the size of the previous i flood phase ax φ. It is possible to do so.

In this way, when the positive 5-character signal 124 is obtained, it is differentially amplified by the 4-band amplifier 8;
A positive output pulse 128A is obtained from the comparator 60, and a positive output pulse 128B is obtained from the comparator 62 when the signal 124 of inverse iteracy is obtained. The amplifier 8 outputs the difference between the two differential inputs as a differential output 130, and outputs the difference between the two differential inputs as a differential output 130, and outputs the difference between the two differential inputs to the comparators 96A, 96B, 96C,
96D and 96E each set level and this differential output 13
0f: Compare. As a result, each 'i, Ei) 29, 51,
57, 6.1i, and 69 are controlled to be lit as shown in FIG. 9, and thereby the presence or absence of the phase difference φ and the thickness and direction of 7 are displayed simultaneously. Eggplant? , to'4
J in figure 9 (4)? In the same figure (B), LF and In2 are LED])63, and in the same figure (C1, LEDs7
However, the LED 51 is lit in FIG. 0), and the LED 27 is lit in FIG.

In this case, if the magnetic tape 12 has a small azimuth deviation, the LED 57 will light up, and if the azimuth deviation is large, I and E will light up.
]) 51, 27, 63. 69, the LED indicating the azimuth deviation is lit and remains lit for a predetermined period of time due to the action of the time constant circuit 7, so that the azimuth deviation can be reliably recognized. becomes.

As described above, according to this embodiment, the magnetic tape 1
When an azimuth error occurs between the magnetic head 2 and the magnetic head 10, the occurrence of the error and its degree and direction are determined by J.
, ED27, 51, 57, 63° For each table, the azimuth adjustment gL ff: '& is easy to perform.

In addition, in a monaural tape recorder, one side has two gaps 14-A+' as shown in FIG.
14 B to adjust the channel, circuit 18A.

18B, 38) 1.46B, 4B is omitted and OR circuit 4
6A output' 20 A
Centering around 57, the LEDs 27, 51, 63, and 69 can be similarly illuminated with a time lag.

FIG. 11 shows a second embodiment of the present invention, which has the same function and effect as the first embodiment, but with a level meter 9b as an azimuth error indicator, a diode 27 as an indicator, 51゜The pointer 9cf is used instead of 57, 63, 69, and the J+1 needle 9c is shifted from the center ○, indicating an azimuth shift, and the time setting circuit 7 indicates that 41
Since the -1 reading is made longer, it is possible to accurately determine the extent of the azimuth deviation.

-Explanation 1~'kc:lj? According to the present invention,
It is possible to display that an azimuth error has occurred in the magnetic tape device, so you can check the azimuth adjustment status for each tape and even for each tape location.

[Brief explanation of drawings]

1 is a circuit configuration diagram of a preferred embodiment of the present invention, FIG. 252 is an explanatory diagram of the configuration of the head used in the embodiment of FIG.
4 is an explanatory diagram illustrating the relationship between the azimuth (i, 'J direction) and the phase difference between the gaps between the magnetic head and magnetic tape of the embodiment shown in FIG. 1, and FIG. Example circuit 16
6 and 7 are signal waveform diagrams of various parts in the circuit 38A of the embodiment shown in FIG. 1, and FIG.
9 is a diagram explaining the lighting of each LED in FIG. 1, FIG. 10 is a diagram explaining the structure of the magnetic head in a monaural chip,
FIG. 3 is a block diagram showing another embodiment. 7... Time constant circuit, 9a... Azimuth error indicator, 9b... Level indicator (azimuth error indicator),
9c... Pointer (instruction part), 10... Magnetic head, 1
2...magnetic tape, 144, 14] 3, 14C, 14
D... Gap, 16A, 161' (... Waveform processing circuit, 18A. 18B... Waveform processing circuit, 27, 51, 57, 65.
69... Patent applicant Nippon Marantz Co., Ltd. Figure 2 Figure 6 Figure 1-J = Figure 7 Figure 8 Figure 9 Figure 10 n

Claims (3)

[Claims] (1) A playback head having a plurality of gaps arranged in the width direction of an arbitrary channel of a magnetic tape and phase pulse generation that outputs a phase pulse corresponding to the phase difference of the playback signal obtained at each gap of the playback head. Azimuth error detects from the phase pulse that the gap direction of the reproducing head is deflected with respect to the magnetization direction of the magnetic tape when a phase difference occurs between the circuit and each reproduction signal of the phase pulse generating circuit. A detector and an error indicator that indicates the occurrence of an azimuth error using an azimuth error detection signal output from the azimuth error detector; Azimuth upper 2~display device [2] characterized in that a timing control circuit is provided to lengthen the instruction display time in a range where the azimuth error indicated by the indicator section of the error indicator is large. (2) Range of % Allowable Rust The indication part of the error indicator described in paragraph 1 must be at least 3Ill! 1. An azimuth error display device characterized in that it is formed by arranging light-emitting elements for azimuth error display. (3) An azimuth error display device using a level meter as an error display device according to claim 1.