JPS6057310B2 - Optical semiconductor switch drive method - Google Patents

Description

Detailed Description of the Invention The present invention provides an optical semiconductor switch circuit using optical thyristor switch elements with a PNPN shelf structure, in which a plurality of optical thyristor switch elements are integrated in the same chip. The present invention relates to an optical semiconductor switch circuit that prevents isolated faults and significantly improves its effectiveness especially when it is highly integrated.

Generally, a thyristor having a PNPN four-layer structure is often used in a semiconductor switch circuit.

Furthermore, when the switch current-carrying section and the switch control section require insulation, an optical thyristor or the like is used. However, these switch circuits using thyristors having a four-layer PNPN structure have a drawback that even when the circuit is cut off, if a sudden forward voltage is applied between the anode and the cathode, erroneous firing occurs. This is called the late effect, and its resistance is d
It is called v/dt tolerance. In order to prevent this erroneous firing, an optical thyristor 1 is provided with a dv/dt tolerance protection circuit 2 as shown in FIG.

The optical thyristor 1 in FIG. 1 has a P-type emitter (P, ) 1
1, N type base (N2) 12, P type base (P2) 13
It has a four-layer structure consisting of an N-type emitter (N2) 14, an N-type base (N2) 12 and a P-type base (P, ) 1.
A light signal from the light emitting element 20 is irradiated to the junction with the light emitting element 3 to perform a switch operation.

Furthermore, the optical semiconductor switch circuit has an N of the optical thyristor 1.
Another P type region (PO4) is added to the mold base (N2) layer 12.
) 15 to form a P layer (P, ) 13 and (Pol) 15
Assume that there are two collectors (multi-collector), and gate G)
The base of transistor 3 provided between the cathode and front & It connects the layer 15 area. And gate G
A low resistor 4 is provided between the cathode 1 and the cathode K, and a diode 5 and a phototransistor 6 are placed side by side between the base and emitter of the transistor 3. With this configuration, when a voltage is suddenly applied between the anode A1 and the cathode K of the optical thyristor 1, the N-type base (N1) 12 and the P-type region (PO
1) The transistor 3 is made conductive by the current that charges the junction formed by the transistor 15, thereby preventing the optical thyristor switch 1 from firing erroneously in a transient manner. Note that the resistor 4 is provided auxiliary to prevent erroneous firing due to leakage current at high temperatures. The diode 5 is designed to prevent the base of the transistor 3 from being biased to a deep negative voltage when the charge accumulated at the junction between the N-type base (N1) 12 and the P-type region (POl) 15 is discharged. This is what I did.

Further, the phototransistor 6 irradiates the junction between the N-type base (N4) 12 and the P-type base (P2) 13 of the optical thyristor 1 in a concentrated manner, but a part of the optical signal is transmitted to the transistor 3.
Because of this, the resistance between the collector and emitter of transistor 3 becomes low. Therefore, between the P gate and the cathode of the optical thyristor 1 (P type base P2l3, N type emitter N2
There is a problem in that a problem arises in which ignition is not possible due to the suppression of the To this end, a phototransistor 6 is used to short-circuit the base and emitter of the transistor 3 so that the transistor 3 does not operate only when an optical signal from the light emitting element 20 is applied, thereby preventing problems due to light leakage. Furthermore, each of these elements. An integrated structure is adopted in which the optical thyristor 1 and the phototransistor 6 are placed close to each other so that they can easily receive optical signals, and the transistor 3 is separated so as to reduce the influence of light leakage. According to such an optical semiconductor switch circuit, Le. It is possible to achieve both noise immunity due to the light effect and high spark sensitivity.

However, when a plurality of optical semiconductor switch circuits as shown in FIG. 1 are integrated into the same chip, the following point-by-point failure due to light leakage between the optical semiconductor switches has occurred.

FIGS. 2 and 3 show an example of a circuit diagram and a schematic diagram of an integrated arrangement when two sets of the optical semiconductor switch circuits shown in FIG. 1 are integrated into the same chip.

In the figure, the phototransistor 6 (or ``)'' is placed close to the optical thyristor 1 (or 1'') so as to easily receive the optical signal from the light emitting element 20 as described above, and the transistor 3 (or 3'') is placed close to the optical thyristor 1 (or 1'') to avoid the influence of light leakage. They are placed far apart to reduce the number of Taking this into consideration, when a plurality of switch light emitting elements are arranged, light leakage from other switch light emitting elements is likely to occur. For example, in FIG. 3, the transistor 3 of the optical semiconductor S1 is placed as far away from the optical thyristor 1 as possible, but it is affected by light leakage from the light emitting element 2 for the adjacent switch S2. When S2 is 0N, the light emitting element 2' generates an optical signal, so light leaks to the transistor 2 of the switch S1 and is irradiated with light.For this reason, the transistor 3 operates as a phototransistor ( ON), and suppresses the connection between the gate G (P-type base P2l3) and cathode K (N-type emitter N2l4) of the thyristor 1 with a low resistance, which has the disadvantage of reducing the light-sparking sensitivity of the optical thyristor 1.The above explanation The example is a case of two optical semiconductor switches, but when multiple switches are integrated on the same chip, especially when high integration is targeted, the effect of light leakage between each switch becomes complicated. There is a problem that sparking problems are likely to occur.

FIG. 4 shows an example of drive signals for the light emitting elements 20, 2'...20n of each switch when n switches are integrated in the same chip. For example, switch SE is time i! ! between 1t1 and et al. and S2 is between T2 and T5
, SO are required to emit light in accordance with the signal time sequence shown in FIG. 4 in order to make each light emitting element 20, 2' . Therefore, if switches S1 and S2 and S2 and Sn are placed close together on an integrated chip, then switch S2
There was a problem in that the switch Sn caused a firing failure due to the optical signal of the light emitting element 20 of S1, and the switch Sn caused a firing failure due to the optical signal of the light emitting element 2' of S2. Therefore, one chip has one
It was not possible to integrate more than the number of switches. Another problem is that the switches on the chip are spaced apart to reduce their mutual influence, resulting in very poor integration efficiency. In view of these problems, the purpose of the present invention is to
An optical semiconductor switch using a PN four-layer switch element has multiple switch functions in the same chip, and provides a driving method for the optical semiconductor switch that does not suffer from firing failures due to light leakage even when highly integrated. .

A feature of the present invention is that the light emitting elements that drive a plurality of optical semiconductor switches in the same chip are driven by pulses, and each light emitting element is driven with a shifted phase so that optical signals are not generated at the same time. It's there.

FIG. 5 shows a drive circuit in which a plurality of optical semiconductor switches are integrated in the same chip according to the present invention.

Reference numeral 30 in the figure indicates a chip in which a plurality of (n in the figure) optical semiconductor switches are integrated;
n represents each switch in the chip 30 (Sl, S2, . . . S.
) (not shown). 40
-1, 40-2...40-n is the light emitting element 20,
2'...Gate circuit for pulse driving the LED2On, 50 is a pulse train generation circuit, ■1, ■6. ...
...V5n is an optical semiconductor switch Sl, S2, ...
This is a control signal for opening and closing Sn. The pulse train generation circuit 50 is equipped with as many pulse train outputs as the number of optical semiconductor switches integrated in the same chip, and the phase relationship of the pulse trains is changed so that the respective pulse outputs do not occur simultaneously, as shown in FIG. generate.

Therefore, the light emitting elements 20, 2 in the chip...
20n do not emit light at the same time. For example, the opening/closing control signals ■1, ■S2...■ for each optical semiconductor switch Sl, S2...Sn.

are the signals 20, 2''...20n shown in FIG. 4, then the control signals ■, . １、■２・・・・・・■S
Depending on n, each switch Sl, S2...
The pulse train Pl, P2...Pn corresponding to Sn is gated, and a signal as shown in FIG. 7 is sent to each light emitting element 20.
, 2'...Added to 20n. Therefore, the optical signals from the light emitting elements 20, 2'...20n are not emitted simultaneously, and the ignition failure due to light leakage between the switches as described above does not occur. That is,
In FIG. 7, during time 1-1, the control signal Vsl, ■ for closing the switches S1 and S2.

However, since the optical signals from the light emitting elements are not irradiated simultaneously like the pulses of Pl and P2 shown in Fig. 6, there is a problem that even if there is light leakage between the switches Sl and S2, an ignition failure will occur. It disappears. For this reason, even if a plurality of optical switch circuits are integrated in the same chip, high integration can be achieved without causing any spark failure, and the effect is extremely large.

[Brief explanation of the drawing]

Figure 1 shows a specific example of an optical semiconductor switch circuit equipped with an optical thyristor and a noise-proof protection circuit, and Figure 2 shows the effect of light leakage when multiple optical semiconductor switch circuits shown in Figure 1 are integrated in the same chip. Circuit diagram for explaining spark failure, 3rd
The figure is a pattern side view showing an example of the arrangement of each element when the circuit of Fig. 2 is integrated, Fig. 4 is a diagram showing an example of the operation time sequence of a plurality of switches, and Fig. 5 is an optical semiconductor according to the present invention. FIG. 6 is a block diagram of an embodiment for driving a switch, FIG. 6 is a diagram showing an example of a pulse waveform for driving a light emitting element of each optical semiconductor switch according to the present invention, and FIG. 7 is a block diagram of an embodiment for driving an optical semiconductor switch according to the present invention. 2 is a diagram showing an example of a light emitting element drive waveform when 20... Semiconductor light emitting device, 30... Semiconductor chip,
40...Gate circuit, 50...Pulse train generation circuit.

Claims (1)

[Claims] 1. An optical thyristor with a four-layer structure consisting of an emitter of one conductivity type, a base of the other conductivity type, a base of one conductivity type, and an emitter of the other conductivity type, and a photothyristor provided on the base of the other conductivity type,
another one conductivity type region, a main terminal connected to the one conductivity type base and the other conductivity type emitter, and a control terminal connected to the other one conductivity type region;
In a plurality of optical semiconductor switches that combine a phototransistor provided between one of the main terminals of the transistor and the control terminal, and a semiconductor light emitting element for igniting the optical thyristor, the semiconductor A driving method for an optical semiconductor switch, characterized in that a light emitting element is periodically driven in pulses, and the phase of each pulse is shifted so that adjacent semiconductor light emitting elements do not emit light at the same time.