JPS6055976B2 - Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor - Google Patents

Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor

Info

Publication number
JPS6055976B2
JPS6055976B2 JP14563978A JP14563978A JPS6055976B2 JP S6055976 B2 JPS6055976 B2 JP S6055976B2 JP 14563978 A JP14563978 A JP 14563978A JP 14563978 A JP14563978 A JP 14563978A JP S6055976 B2 JPS6055976 B2 JP S6055976B2
Authority
JP
Japan
Prior art keywords
electrode
laminate
porcelain
grain boundary
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP14563978A
Other languages
Japanese (ja)
Other versions
JPS5572023A (en
Inventor
喜一 南井
治文 万代
芳明 河野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP14563978A priority Critical patent/JPS6055976B2/en
Publication of JPS5572023A publication Critical patent/JPS5572023A/en
Publication of JPS6055976B2 publication Critical patent/JPS6055976B2/en
Expired legal-status Critical Current

Links

Description

【発明の詳細な説明】 本発明は小型、大容量で製作の容易な半導体粒界絶縁型
積層磁器コンデンサを製造する方法に関するものである
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor grain-boundary insulated multilayer ceramic capacitor which is small in size, has a large capacity, and is easy to manufacture.

近時電気機器の小型化に伴い、電子部品の小型化も強く
要望されておる。
With the recent miniaturization of electrical equipment, there is a strong demand for miniaturization of electronic components.

積層磁器コンデンサは、小型で大容量が得られるものと
してこれまで汎用されている。しカルより大容量のもの
を要求される場合には、小型化にも限度がある。一般に
半導体磁器コンデンサは、他のものと比較してその容量
値にきわめて大きなものが得られることが知られている
Multilayer ceramic capacitors have been widely used so far because they are small and can provide large capacitance. If a larger capacity is required, there are limits to miniaturization. It is generally known that semiconductor ceramic capacitors have extremely large capacitance values compared to other capacitors.

しかしこのものは、これまでいわゆる単体コンデンサと
してしか利用されていない。本発明は上記の点に鑑みて
なされたものであつて、粒界絶縁型の半導体磁器を用い
る積層コンデンサの製造方法にかかるものである。
However, until now this type of capacitor has only been used as a so-called single capacitor. The present invention has been made in view of the above points, and relates to a method for manufacturing a multilayer capacitor using grain boundary insulated semiconductor porcelain.

先づ本発明においては、第1図に示すように、チタン酸
バリウム系やチタン酸ストロンチウム系等の、一般に粒
界絶縁型コンデンサ用として用いられる磁器を、従来の
積層コンデンサを製造する場合と同様シート状1に形成
する。
First, in the present invention, as shown in Figure 1, porcelain such as barium titanate or strontium titanate, which is generally used for grain boundary insulated capacitors, is processed in the same way as in the production of conventional multilayer capacitors. Form into a sheet 1.

この磁器シート1の一平面上に、金、白金、パラジウム
等の高融点金属よりなる容量用電極2’および、銅、マ
ンガン、ビスマス等の粒界絶縁体化用金属酸化物5を混
練した混合物電極2を付与する。
A mixture of a capacitor electrode 2' made of a high-melting point metal such as gold, platinum, or palladium, and a metal oxide 5 for forming a grain boundary insulator such as copper, manganese, or bismuth is kneaded on one plane of the ceramic sheet 1. Apply electrode 2.

この混合物電極2は、磁器シート1の外周端から所定の
距離をもつてほぼ中央部に付与される。
This mixture electrode 2 is applied approximately at the center of the porcelain sheet 1 at a predetermined distance from the outer peripheral edge thereof.

同じく磁器シート1の一平面上には、前記混合物電極2
を磁器シート1の一側端に導出させるための引出電極3
が、その混合物電極2の一部と連続して付与される。こ
の引出電極3は、混合物電極2の付与と同時に、同じ材
質のもので形成しておくことが好ましい。次にこのよう
に構成された磁器シート1を複数枚用意し、これらを前
記引出電極3が交互に位置されるように積み重ね、圧着
して積層体4を形成する。
Similarly, on one plane of the porcelain sheet 1, the mixture electrode 2
Extracting electrode 3 for leading out to one side end of the porcelain sheet 1
is applied continuously with a portion of the mixture electrode 2. It is preferable that the extraction electrode 3 is formed of the same material at the same time as the mixture electrode 2 is applied. Next, a plurality of ceramic sheets 1 configured in this manner are prepared, stacked so that the extraction electrodes 3 are alternately positioned, and pressed together to form a laminate 4.

この積層体4を形成する具体的な手段は、従来周知の方
法で行なえばよい。次にこの積層体4を、1350〜1
450′Cの中性あるいは酸化性雰囲気中て焼成し、積
層体4を磁器化するとともに、混合物電極2中の金属酸
化物5を積層体の結晶粒界に拡散させて絶縁層(図示せ
ず)を形成し、さらに容量用電極2″を焼付ける。
The specific means for forming this laminate 4 may be any conventionally known method. Next, this laminate 4 was heated to 1350 to 1
The laminate 4 is fired in a neutral or oxidizing atmosphere at 450'C to form porcelain, and the metal oxide 5 in the mixture electrode 2 is diffused into the grain boundaries of the laminate to form an insulating layer (not shown). ) and then bake the capacitor electrode 2''.

最後にこのように構成された積層体4の、前記引出電極
3が導出されている各側端面(およびその近傍)にそれ
ぞれ外部接続用電極6を付与し、各容量用電極2″と導
電接続させ、半導体粒界絶縁型積層磁器コンデンサを得
る。
Finally, external connection electrodes 6 are provided on each side end surface (and the vicinity thereof) from which the extraction electrodes 3 are led out of the laminate 4 configured in this way, and conductive connections are made with each capacitance electrode 2''. Then, a semiconductor grain boundary insulated multilayer ceramic capacitor is obtained.

外部接続用電極6の付与手段としては、従来の場合と同
様、メッキ、焼付、接着等を用いればよい。本発明製造
方法により得られた積層磁器コンデンサはこのように構
成され、磁器の粒界に形成される絶縁層を誘電体とする
大容量のものが得られるのである。
As a means for applying the external connection electrode 6, plating, baking, adhesion, etc. may be used as in the conventional case. The multilayer ceramic capacitor obtained by the manufacturing method of the present invention is constructed in this manner, and has a large capacity in which the dielectric is an insulating layer formed at the grain boundaries of the ceramic.

従つて小型化を可能な限り行なえ、セットの小型化によ
り適応できる。また本発明で.は、製造工程も従来のも
のとさほど変える必要はなく、さらに誘電損失や絶縁抵
抗、温度変化特性等の電気的諸特性も従来のものと殆ん
ど遜色がない上述の例においては、積層体4の焼成時に
混合物電極2中の金属酸化物5を拡散させて粒界に絶縁
層を形成したものを示したが、粒界への絶縁層の形成を
より安定なものとするため、積層体4の焼成とは別工程
で行なつても同様の結果が得られる。
Therefore, the size can be reduced as much as possible, and the set can be made smaller. Also, according to the present invention. In the above example, there is no need to change the manufacturing process much from the conventional one, and the electrical properties such as dielectric loss, insulation resistance, and temperature change characteristics are almost the same as the conventional one. 4, the metal oxide 5 in the mixture electrode 2 is diffused during firing to form an insulating layer at the grain boundaries, but in order to make the formation of the insulating layer at the grain boundaries more stable, Similar results can be obtained even if the firing is performed in a separate step from step 4.

すなわち、磁器シート1を複数枚積み重ねて圧着して形
成した積層体4を、先づ1350〜1450℃の温度の
中性あるいは還元性雰囲気中て焼成し、積層体4を磁器
化する。この場合、混合物電極2中の金属酸化物5は、
積層体4の結晶粒界内へ拡散される。その後焼成された
積層体4を、1000〜1250℃の温度の中性あるい
は酸化性雰囲気中で熱処理して、粒界に拡散された金属
酸化物を安定な絶縁層に形成するのである。この例にお
けるその余の工程および手段は、先の例と同様でよいの
で、説明は省略する。またこの例によつて得られた積層
磁器コンデンサの電気的諸特性も、従来のものと殆んど
遜色のないものであつた。なお、本発明にかかる上記の
各例についての説明から容易に認識し得る程度のことは
、当然本発明の範囲に含まれるものであつて、本発明が
上記記載のものに限定されるものではないことを付言し
ておく。
That is, a laminate 4 formed by stacking and pressing a plurality of porcelain sheets 1 is first fired in a neutral or reducing atmosphere at a temperature of 1,350 to 1,450°C to form the laminate 4 into porcelain. In this case, the metal oxide 5 in the mixture electrode 2 is
It is diffused into the grain boundaries of the laminate 4. Thereafter, the fired laminate 4 is heat-treated in a neutral or oxidizing atmosphere at a temperature of 1,000 to 1,250°C to form the metal oxide diffused into the grain boundaries into a stable insulating layer. The remaining steps and means in this example may be the same as in the previous example, so their explanation will be omitted. Furthermore, the electrical properties of the multilayer ceramic capacitor obtained in this example were almost comparable to those of conventional capacitors. It should be noted that the things that can be easily recognized from the explanation of each of the above examples of the present invention are naturally included in the scope of the present invention, and the present invention is not limited to the above-mentioned examples. I would like to add that there is no such thing.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を具体的に示すための図である。 1・・・・・・磁器シート、2・・・・・・混合物電極
、2″・・・・・・容量用電極、3・・・・・・引出電
極、4・・・・・・積層体、5・・・・・・金属酸化物
、6・・・・・・外部接続用電極。
FIG. 1 is a diagram specifically showing the present invention. 1...Porcelain sheet, 2...Mixture electrode, 2''...Capacitance electrode, 3...Extractor electrode, 4...Lamination body, 5...metal oxide, 6...external connection electrode.

Claims (1)

【特許請求の範囲】 1 磁器シートの一平面上に、高融点金属と粒界絶縁体
化用金属酸化物との混合物を用いて、端部に余白を残し
て容量用電極を形成し、さらにこの容量用電極に連続し
て、この容量用電極を前記磁器シートの一側端に導出す
るための引出電極を形成し、この磁器シートを複数枚、
前記引出電極が交互になるように積み重ねて圧着して積
層体を形成し、この積層体を中性あるいは酸化性雰囲気
中で焼成し、この焼成によつて積層体の磁器化と積層体
の結晶粒界への絶縁層の形成とを同時に行ない、その後
前記引出電極の各導出端面に外部接続用電極を付与して
なることを特徴とする半導体粒界絶縁型積層磁器コンデ
ンサの製造方法。 2 磁器シートの一平面上に、高融点金属と粒界絶縁体
化用金属酸化物との混合物を用いて、端部に余白を残し
て容量用電極を形成し、さらにこの容量用電極に連続し
て、この容量用電極を前記磁器シートの一側端に導出す
るための引出電極を形成し、この磁器シートを複数枚、
前記引出電極が交互になるように積み重ねて圧着して積
層体を形成し、この積層体を中性あるいは還元性雰囲気
中で焼成した後、中性あるいは酸化性雰囲気中で熱処理
して結晶粒界の絶縁層を安定に形成し、その後前記引出
電極の導出端面に外部接続用電極を付与してなることを
特徴とする半導体粒界絶縁型積層磁器コンデンサの製造
方法。
[Claims] 1. A capacitor electrode is formed on one plane of a porcelain sheet using a mixture of a high melting point metal and a metal oxide for forming a grain boundary insulator, leaving a margin at the end, and Continuing with this capacitance electrode, an extraction electrode for leading out this capacitance electrode to one side end of the porcelain sheet is formed, and a plurality of porcelain sheets are connected to each other.
The extraction electrodes are alternately stacked and pressed together to form a laminate, and this laminate is fired in a neutral or oxidizing atmosphere, and this firing turns the laminate into porcelain and crystallizes the laminate. 1. A method for manufacturing a semiconductor grain boundary insulated multilayer ceramic capacitor, comprising simultaneously forming an insulating layer on the grain boundaries, and then providing external connection electrodes on each lead-out end face of the lead-out electrode. 2. A capacitor electrode is formed on one plane of the porcelain sheet using a mixture of a high-melting point metal and a metal oxide for grain boundary insulator, leaving a margin at the end, and a continuous electrode is formed on this capacitor electrode. Then, an extraction electrode for leading out this capacitor electrode to one side end of the porcelain sheet is formed, and a plurality of porcelain sheets are
The extraction electrodes are alternately stacked and pressed together to form a laminate, and this laminate is fired in a neutral or reducing atmosphere, and then heat-treated in a neutral or oxidizing atmosphere to remove grain boundaries. 1. A method for manufacturing a semiconductor grain-boundary insulated multilayer ceramic capacitor, comprising stably forming an insulating layer, and then providing an external connection electrode on the lead-out end face of the lead-out electrode.
JP14563978A 1978-11-24 1978-11-24 Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor Expired JPS6055976B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14563978A JPS6055976B2 (en) 1978-11-24 1978-11-24 Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14563978A JPS6055976B2 (en) 1978-11-24 1978-11-24 Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor

Publications (2)

Publication Number Publication Date
JPS5572023A JPS5572023A (en) 1980-05-30
JPS6055976B2 true JPS6055976B2 (en) 1985-12-07

Family

ID=15389656

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14563978A Expired JPS6055976B2 (en) 1978-11-24 1978-11-24 Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor

Country Status (1)

Country Link
JP (1) JPS6055976B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5886714A (en) * 1981-11-19 1983-05-24 松下電器産業株式会社 Method of producing thin film condenser
JPS5886713A (en) * 1981-11-19 1983-05-24 松下電器産業株式会社 Method of producing thick film condenser
JPS59215701A (en) * 1983-05-24 1984-12-05 太陽誘電株式会社 Method of producing composite function element

Also Published As

Publication number Publication date
JPS5572023A (en) 1980-05-30

Similar Documents

Publication Publication Date Title
US4322698A (en) Laminated electronic parts and process for making the same
JP4428852B2 (en) Multilayer electronic component and manufacturing method thereof
JPH104027A (en) Multilayer electronic component
JPS5951606A (en) Distributed constant filter
JPS5923458B2 (en) composite parts
JP3359522B2 (en) Manufacturing method of multilayer ceramic capacitor
JP2000216046A (en) Laminated ceramic electronic component
JPS6129133B2 (en)
JPS6055976B2 (en) Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor
JPS5917232A (en) Composite laminated ceramic part and method of producing same
JPH07263272A (en) Manufacture of laminated electronic component
JP2646573B2 (en) Manufacturing method of semiconductor multilayer capacitor
JPS6055977B2 (en) Manufacturing method of semiconductor grain boundary insulated multilayer ceramic capacitor
JPS636121B2 (en)
JPH0115159Y2 (en)
JP2000252537A (en) Laminated piezoelectric ceramic
JPS60176208A (en) Laminated part and manufacture thereof
JPH08273970A (en) Laminated ceramic electronic component
JPH0420245B2 (en)
JP2004259735A (en) Hybrid electronic component
JP3273125B2 (en) Multilayer ceramic capacitors
JPS6226565B2 (en)
JPS6129526B2 (en)
JPS6028113Y2 (en) Composite parts that can be trimmed
JP2002110451A (en) Laminated electronic part and its manufacturing method