JPH0420245B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to the structure of a laminated ceramic capacitor, and particularly to a structure for realizing a laminated ceramic capacitor that is small in size and has a large capacity.

Multilayer ceramic capacitors are small in size, have a large capacity, and are being put into practical use as highly reliable capacitors.

As shown in FIG. 1, a conventional multilayer ceramic capacitor has a structure in which internal electrodes are integrated with the same dielectric material so that they are not exposed to the outside except at the part where the external electrode is baked. A cross-sectional view taken along the dashed-dotted line in FIG. 1 is shown in FIGS. 2a and 2b.
1 is an internal electrode, and 2 is a dielectric.

Here, a ₁ to _{a 3} in the figure indicate the thickness of the dielectric necessary for insulation from the outside or the counter electrode, and b and c indicate the outer diameter dimensions of the chip. Generally, a ₁ to a ₃ are made with the same dimensions.

As is clear from this figure, the minimum dimension of a ₁ to _{a 3} is 400 μm to ensure the thickness of the dielectric for external insulation and not to lower the production yield.

In general, the effective area ratio A of the internal electrode area to the cross-sectional area b x c perpendicular to the stacking direction is shown in Figure 2 a.
If a ₁ , a ₂ , and a ₃ are all equal to a ₀ and calculated, it is expressed as A=(b-2a ₀ )(c-2a ₀ )/bc.

From this equation, it can be seen that when a ₀ is constant and the outer diameter dimensions b and c of the chip become smaller, the effective area ratio A of the internal electrode becomes extremely small.

If the outer diameter dimension were 2a ₀ ×2a ₀ , the effective area of the internal electrode would be zero.

Therefore, as the overall dimensions of the chip capacitor become smaller and the stack becomes 1 mm x 2 m, the area of the internal electrodes becomes about 20% of the cross-sectional area of the chip, which limits the ability to increase the capacitance per unit volume. .

The reason why it is restricted to further reduce a ₁ to _{a 3} in FIG. 2a is deeply related to the manufacturing method of multilayer ceramic capacitors. That is,
Multilayer ceramic capacitors are made by laminating and pressing green sheets with internal electrodes printed on them to form a green laminate, which is then cut into individual green chips. However, when mass-producing them industrially, variations in the position of the layers during stacking,
Considering cutting accuracy, etc., 400 μm is inevitable.
It was difficult to do the following. Even if it were made smaller than that, it would not be practical because external insulation defects and shorts between opposing electrodes would occur, resulting in an extremely low yield.

An object of the present invention is to solve these problems and provide a compact, large-capacity multilayer capacitor with a completely new structure.

That is, the present invention provides for a laminate having a structure in which dielectrics and internal electrodes are alternately laminated, and the outer circumferential portion of each internal electrode is exposed on the surface, and the portions of the internal electrodes exposed on the surface and The vicinity thereof is covered with an insulating material different from the dielectric, and each internal electrode has an exposed portion that is not covered, and the exposed portion of the internal electrode is separated from two different layers on the surface of the laminate at every other layer. This multilayer ceramic capacitor is characterized in that it has a structure in which external electrodes are formed on two surface portions of the capacitor.

In other words, the structure of the present invention makes it possible to increase the proportion of the internal electrode to the cross-sectional area of 80% or more.

With such a structure, it has become possible to increase the capacitance per unit volume of a small chip capacitor by more than five times.

The present invention will be explained in detail below with reference to the drawings and examples.

FIG. 3 is a perspective view showing an example of the structure of the present invention, in which 1 indicates an internal electrode, 2 a dielectric material, and 3 an insulating material. Furthermore, FIGS. 4a and 4b are cross-sectional views taken along the dashed line in FIG. 3. As shown in these figures, by insulating the internal electrodes using a material different from the dielectric, it is possible to reduce the thickness of the insulating layer to 100 μm or less, and as a result, the internal electrode occupancy rate of a unit layer can be reduced. It has become possible to increase this to over 80%.

With such a structure, it has become possible to increase the capacity in the same volume by more than five times that of the conventional one.

Example 1 A barium titanate-based material was used as the dielectric, palladium was used as the internal electrode, and borosilicate-based crystallized glass was used as the insulating material. After sintering the laminated raw chips, the insulating material is printed on the side using a printing method.
Then it was baked. Further, external electrodes were formed by baking Ag paste onto the exposed portions of the internal electrodes.

The outer dimensions of the multilayer ceramic capacitor thus formed were 1.0 mm long, 2.0 mm wide, and 1.0 mm thick. The number of laminated layers was 20, the distance between electrodes was 40 μm, and a capacitance of 3.0 mF was obtained.

For comparison, external insulation was performed using the same dielectric material as in the conventional method. A chip capacitor with the same shape, the same material, the same number of laminated layers, and the same distance between electrodes as shown in Figure 1 has a capacitance of only 0.4 mF, but the structure of the present invention increases the capacitance by 7.5 times. That is clear.

Example 2 The dielectric material is pb(Fe1/2Nb1/2)O ₃ −pb(Fe2/
3W1/3) O ₃ based material, silver-palladium alloy as the internal electrode, and lead borosilicate crystallized glass as the insulating material.

A laminated raw chip having a structure in which a part of the outer periphery of the internal electrode is exposed on the surface portion other than the surface on which the external electrode is formed was fabricated using the same technique as a conventional laminated ceramic capacitor. This laminated raw chip was sintered, and electrodes for external extraction were baked at predetermined positions of each exposed internal electrode on the chip surface.

A lead is connected to this external electrode, and a DC voltage of 50 V, 30
The voltage was applied for a second to form an insulating layer on the exposed internal electrode surface and its vicinity. The insulating layer adhering to the external electrodes was removed and the chip was heat treated at 900°C for 10 minutes to bake the insulating layer onto the chip surface.

The following slurry composition for electrophoresis was used.

Lead borosilicate glass 10wt% Ethanol 85wt% Polyvinyl butyral 5wt% The outer dimensions of the multilayer chip capacitor thus formed were 1.0mm long, 3.0mm wide, and 1.0mm thick. The number of laminated layers was 30, the distance between electrodes was 30 μm, and a capacitance of 277 mF was obtained.

For comparison, the capacitance of a multilayer ceramic capacitor of the same size formed by the prior art was found to be 47 mF, and the multilayer capacitor of the present invention had a capacitance about 6 times as large with the same shape.

As shown above, the structure of the present invention makes it possible to significantly increase the capacitance per unit volume compared to conventional multilayer ceramic capacitors.

The present invention can effectively increase the capacitance of a capacitor that is particularly small in shape or has a large aspect ratio.

In the examples, baked crystallized glass was used as the insulating material, but depending on the intended use, highly insulating organic resins such as epoxy resins and silicone resins may also be used. It was confirmed that it was effective.

As shown in the cross-sectional views of FIGS. 5a and 5b, even if the structure of the present invention is insulated with a material different from the dielectric, the effect of the present invention can still be achieved. It's not a loss.

Furthermore, although this example shows the case where the dielectric shape and the internal electrode shape are the same, the case where the internal electrode shape is slightly smaller than the dielectric shape (i.e., the part where the outer periphery of the internal electrode is located within a minute distance from the surface of the laminate) is In some cases, insulation defects can be improved by coating the surface portion of the laminate corresponding to that portion with an insulating material.

[Brief explanation of drawings]

FIGS. 1 and 2a and 2b are a perspective view and a sectional view of a conventional multilayer ceramic capacitor. Figure 3,
FIGS. 4a and 4b are a perspective view and a sectional view showing an example of a multilayer ceramic capacitor having the structure of the present invention. FIGS. 5a and 5b are cross-sectional views of a multilayer ceramic capacitor having the structure of the present invention. In the figure, 1 is an internal electrode, 2 is a dielectric, and 3 is an insulator.

Claims (1)

[Claims] 1. For a laminate with a structure in which dielectrics and internal electrodes are alternately laminated, and the outer peripheral part of each internal electrode is exposed on the surface, the exposed part of the internal electrode on the surface and its vicinity are Each internal electrode is covered with an insulating material different from the dielectric, and each internal electrode has an exposed portion that is not covered, and the exposed internal electrode portion is arranged every other layer at two different parts of the surface of the laminate. A multilayer ceramic capacitor characterized by having a structure in which external electrodes are formed on the two surface portions.