JPS605537A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS605537A JPS605537A JP9420384A JP9420384A JPS605537A JP S605537 A JPS605537 A JP S605537A JP 9420384 A JP9420384 A JP 9420384A JP 9420384 A JP9420384 A JP 9420384A JP S605537 A JPS605537 A JP S605537A
- Authority
- JP
- Japan
- Prior art keywords
- monitoring
- oxidized film
- region
- covered
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置に関し、とくに特性モニター用の電
極端子を有する抵抗体素子をハ備した集積回路装置に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and more particularly to an integrated circuit device equipped with a resistor element having electrode terminals for monitoring characteristics.
半導体集積回路装置においては装置内の半導体素子の特
性をモニターずもためIと余分の半導体素子を通常設け
ている。Cのような特性モニター用素子の寸法・4R造
は被モニター素子と同一であるのが望ましいが、最近の
半導体集積回路内の各素子の大幅な小型化により測定装
置の探釘を素子表面に直接当てることは不可能になって
いる。したがって、従来の集積回路装置における素子特
性のモニターは(1)同寸法の補助素子に形成された外
部導出電極により行なうか、(2)被モニター素子と特
性的に相関関係にある大きな寸法の補助素子を用いたり
していた。後者(2)の方法は、大きな補助素子から得
られたデータをもとに被測定素子の特性を算出し、評価
する必要があるためこの方法は複雑で不正確である。前
者(1)の方法は高精度に被モニター素子の特性がすぐ
に判明するが、素子の特性を所望の値に修正できない。In a semiconductor integrated circuit device, an I and an extra semiconductor element are usually provided for monitoring the characteristics of the semiconductor element within the device. It is desirable that the dimensions and 4R structure of the element for characteristic monitoring such as C be the same as the element to be monitored, but due to the recent drastic miniaturization of each element in semiconductor integrated circuits, it is difficult to place the probe of the measuring device on the element surface. It is no longer possible to apply it directly. Therefore, monitoring of device characteristics in conventional integrated circuit devices is carried out either by (1) external lead-out electrodes formed on auxiliary elements of the same size, or (2) by auxiliary elements of large size that have a characteristic correlation with the monitored element. They also used elements. The latter method (2) is complicated and inaccurate because it requires calculating and evaluating the characteristics of the device under test based on data obtained from a large auxiliary device. Although the former method (1) allows the characteristics of the monitored element to be quickly determined with high precision, the characteristics of the element cannot be corrected to desired values.
これは外部導出電極に用いられているアルミニウムが素
子特性の修正に必要な処理に耐えることがてきないから
である。This is because the aluminum used for the external lead-out electrode cannot withstand the treatment required to modify the device characteristics.
多結晶シリコン層は、半導体集積回路装置に広く使用さ
れている。例えば絶縁ゲート電界効果トランジスタにお
いてはゲート電極として、又、バイポーラトランジスタ
においては拡散不糺物源及びその拡散層の電極として、
又、受動素子においては、抵抗体素子として利用されて
きた。しかし、多結晶シリコン膜を利用したこれら半導
体装置の特性は、外部導出用金属電極の形成後でなけれ
ば判明せず、しかもこの段階における特性の修正は前述
したように不可能なので、所望の特性の半導体装置の製
造を回外なものにしていた。Polycrystalline silicon layers are widely used in semiconductor integrated circuit devices. For example, as a gate electrode in an insulated gate field effect transistor, and as an electrode of a diffused impurity source and its diffusion layer in a bipolar transistor.
Furthermore, in passive elements, it has been used as a resistor element. However, the characteristics of these semiconductor devices using polycrystalline silicon films cannot be determined until after the metal electrode for leading to the outside is formed, and it is impossible to modify the characteristics at this stage as described above, so the desired characteristics cannot be determined. This made the production of semiconductor devices unnecessary.
したがって、本発明の目的のひとつは、素子特性を容易
にモニタし、修正できる半導体装1aを提供すること1
こある。Therefore, one of the objects of the present invention is to provide a semiconductor device 1a in which element characteristics can be easily monitored and corrected.
There it is.
本発明の他の目的は、半導体素子特性の修正処理に耐え
うるモニター用外部導出電極を有する半導体素子を具備
した半導体集積回路装置を提供することにある。Another object of the present invention is to provide a semiconductor integrated circuit device equipped with a semiconductor element having an external lead-out electrode for monitoring that can withstand modification processing of semiconductor element characteristics.
本発明によれば、半導体集積回路装置に含まれる半導体
抵抗体素子の特性をモニターするための外部導出電極と
してシリコン層を用いたことを特徴する半導体装置が得
られる。シリコンの外部j9出電極は半導体集積回路装
置の半導体基板に形成されたモニター用半導体素子に接
続され、そして半導体基板を覆っている絶縁股上をモニ
ター用5j≦子領域の外側の領域曾て延在している。モ
ニター用素子は集結回路を<11成している素子の他に
追加に設けられても良いし、集積回路構成素子のうちの
ひとつを使用しても良い。モニター用の寸法および桔造
は被モニター素子と同一である仁とが好ましい。本発明
によれば、測定器の探針が、モニター用素子の特性を測
定し、それによって披モニター素子の特性を知るために
外部導出シリコン電極に接触される。もしff1ll定
された牛、を性が所望の値に達していないならば、半導
体装置は特性を所望の値にするための追加処理、たとえ
は熱処理または不純物の再添加を受ける。そしてモニタ
ー用素子のシリコン電極に探針を接触さぜることにより
特性を再びチェックする。その後に、必要があれば金属
電極または金属配線層が半導体装1g?に形成される。According to the present invention, there is obtained a semiconductor device characterized in that a silicon layer is used as an external lead-out electrode for monitoring the characteristics of a semiconductor resistor element included in a semiconductor integrated circuit device. The silicon external j9 output electrode is connected to a monitoring semiconductor element formed on a semiconductor substrate of a semiconductor integrated circuit device, and extends an insulating layer covering the semiconductor substrate to an area outside the monitoring area. are doing. The monitoring element may be provided in addition to the elements making up the integrated circuit, or one of the integrated circuit components may be used. Preferably, the dimensions and structure of the monitor are the same as those of the device to be monitored. According to the invention, the probe of the measuring instrument is brought into contact with the externally led silicon electrode in order to measure the characteristics of the monitoring element and thereby learn the characteristics of the monitoring element. If the determined characteristics have not reached the desired values, the semiconductor device undergoes additional processing, such as heat treatment or re-doping of impurities, to bring the properties to the desired values. Then, the characteristics are checked again by touching the silicon electrode of the monitoring element with the probe. After that, if necessary, metal electrodes or metal wiring layers are added to the semiconductor device. is formed.
本発明によれば、11性修正処理の高温度に耐えること
のできるシリコンをモニター用端子電極に用いるので、
特性のモニタおよび修正を容易にしかも正確に行なうこ
とができる。さらに、金属電極または金属配線層を備え
名手導体装置を、モニタおよび特性修正の両工程を行な
った上で製造することができる。According to the present invention, since silicon that can withstand the high temperatures of the sex correction treatment is used for the monitor terminal electrode,
Characteristics can be easily and accurately monitored and modified. Furthermore, a master conductor device with metal electrodes or metal wiring layers can be manufactured after both monitoring and characteristic modification steps are performed.
以下、図面を参照して本発明を詳述する。Hereinafter, the present invention will be explained in detail with reference to the drawings.
第1図A−Gは本発明の抵抗体素子の実施例を示す。1A to 1G show embodiments of the resistor element of the present invention.
第1図A−Fは各製作工程におりる断面を示し、第1図
G1こその平面図を示す。第1図Fは第1図GのY −
Y’に沿った断面に相当する。まず半導体基板2を熱酸
化して、酸化膜lで覆う(第1図A)。1A to 1F show cross sections through each manufacturing process, and FIG. 1 G1 is a plan view. Figure 1 F is Y − of Figure 1 G
This corresponds to a cross section along Y'. First, the semiconductor substrate 2 is thermally oxidized and covered with an oxide film 1 (FIG. 1A).
次に酸化wAl上にモノシランの熱分解により多結晶シ
リコンE7を生成し、多結晶シリコン層7を選択的に除
去することにより端子部を備えた抵抗体素子を形成した
後、熱酸化により、この抵抗体素子を酸化膜で覆う(第
1図B)。第1図Gをも参照すると、端子部12および
13は抵抗素子の本体14の両端につながり、さらに酸
化膜l上を伸びてモニター用端子電極の役割をする広面
積のパッド部12′および13′でそれぞれ終っている
。Next, polycrystalline silicon E7 is generated on the oxidized wAl by thermal decomposition of monosilane, and after selectively removing the polycrystalline silicon layer 7 to form a resistor element with a terminal portion, this polycrystalline silicon E7 is formed by thermal oxidation. The resistor element is covered with an oxide film (FIG. 1B). Referring also to FIG. 1G, the terminal portions 12 and 13 are connected to both ends of the main body 14 of the resistive element, and wide-area pad portions 12' and 13 extend over the oxide film l and serve as monitor terminal electrodes. Each ends with '.
次にシリコン抵抗体素子の両端子部12および13(1
2’および13′を含む)を覆っている酸化膜を選択的
に除去する(第1図C)。次に前記シリコン酸化膜の除
去された抵抗体素子の両端子部12および13に高濃度
のWI素原子を拡散し高ドープの低抵抗領域とする。そ
して再び酸化膜で覆う(第1図D)。次に上記の高濃度
の硼素原子を拡散された領域以外の領域14すなわち抵
抗体素子の本体を覆っている酸化膜を選択的に除去しく
第1図E)この領域14に所望の抵抗値が得られるよう
に制御された只の硼素原子をイオン注入法により精度よ
く注入し再び酸化膜でblう(第111aF)。Next, both terminal portions 12 and 13 (1
2' and 13') is selectively removed (FIG. 1C). Next, a high concentration of WI atoms is diffused into both terminal portions 12 and 13 of the resistor element from which the silicon oxide film has been removed to form a highly doped low resistance region. Then, it is covered again with an oxide film (FIG. 1D). Next, the oxide film covering the region 14 other than the region where the high concentration boron atoms have been diffused, that is, the main body of the resistor element, is selectively removed. Boron atoms controlled so as to be obtained are implanted with high accuracy by ion implantation, and then the oxide film is formed again (No. 111aF).
抵抗体素子端子のパッド部12′および13′を露出さ
せ、そこに測定器の探針をあててこのモニター用抵抗体
素子の抵抗イ@を測定する。もし抵抗値が所旙値より低
いとわかれば、モニター用抵抗の本体14におけるシリ
コン層の厚さおよびモニター用抵抗体の製作と同時に同
一工程で同−酸化膜1上に形成された他の抵抗体のシリ
コン層の厚さを減じて抵抗値を増加させる。また、所望
の値より高ければ、これら抵抗体中にさらに不純物を導
入して抵抗値を下げる。The pad portions 12' and 13' of the resistor element terminals are exposed and the probe of the measuring device is applied thereto to measure the resistance I of this monitoring resistor element. If the resistance value is found to be lower than the current value, the thickness of the silicon layer in the main body 14 of the monitor resistor and other resistors formed on the same oxide film 1 in the same process at the same time as the fabrication of the monitor resistor. The thickness of the silicon layer of the body is reduced to increase the resistance value. If the resistance value is higher than the desired value, further impurities are introduced into these resistors to lower the resistance value.
第2図は上記実施例をさらに改良した場合の断面図を示
す。モニター用抵抗(回路抵抗例も同様)のシリコンの
本体工9および終端部20および20′はシリコン酸化
膜18の中に埋設されている。この酸化膜18はシリコ
ン層を選択除去するのでなく選択的に熱酸化することに
より形成される。この構造は半導体装置の表面を叩坦に
する。FIG. 2 shows a cross-sectional view of a further improvement of the above embodiment. The silicon main body part 9 and the terminal parts 20 and 20' of the monitor resistor (the same applies to the circuit resistance example) are buried in the silicon oxide film 18. This oxide film 18 is formed by selectively thermally oxidizing the silicon layer instead of selectively removing it. This structure flattens the surface of the semiconductor device.
以上述べた実施例のモニター用抵抗は集積回路を構成す
る回路素子として使用してもよい。その場合、導出シリ
コン電極12.13.20.20’はアルミニウムなど
の配線層によって他の素子へ接続される。特性モニター
用のみに用いる場合はこれら導出シリコン電極は使用後
(測定終了後)そのまま残置しておいてもよいが、使用
後エツチング等の手段によって除去するか又は酸化lど
よって酸化物に変換することも可能である。The monitoring resistor of the embodiment described above may be used as a circuit element constituting an integrated circuit. In that case, the lead-out silicon electrodes 12, 13, 20, 20' are connected to other elements by wiring layers such as aluminum. When used only for characteristic monitoring, these derived silicon electrodes may be left as they are after use (after measurement is completed), but after use they should be removed by means such as etching or converted into oxides by oxidation. It is also possible.
以上、実施例につき説明したが、本発明の主要な部分は
、半導体基板の一生面に接盾し、がっ、素子を形成する
半導体領域外に延在するシリコン薄膜からなる特性モニ
ター用の電極端子を設けたことにあり本発明の効果は、
金属電極を形成する前に、半導体素子の特性が測定でき
、それ故、実際に使用する素子の特性を正Lji lこ
制御できる点にある。従って、本発明の技術的範囲は1
111記実施例に限定されるものではなく、この発明の
権利は1゛r許請求の範囲に示す全ての装j1j7に及
ぶ。Although the embodiments have been described above, the main part of the present invention is the characteristic monitoring electrode made of a silicon thin film that is in contact with the entire surface of the semiconductor substrate and extends outside the semiconductor region where the device is formed. The effect of the present invention is that the terminal is provided.
The characteristics of the semiconductor element can be measured before forming the metal electrodes, and therefore the characteristics of the element actually used can be positively controlled. Therefore, the technical scope of the present invention is 1
The invention is not limited to the embodiments described above, and the rights to this invention extend to all devices shown in the claims.
第1図A−Fは本発明の実施例によるモニター用抵抗の
各製作工程を示す断面図であり、第1図Gはその平面図
を示す。第11藁IFは第1図GのY−Y’に沿った断
面に相当する。
第2図は本発明による他のモニター用抵抗の所面Iス1
を示す。
1.18・・・・・・シリコン酸化膜、2・・・・・・
シリコン基板、2・・・・・・コンタクト領域、7・・
・・・・多結晶シリコン層、12.13.20.20′
・・・・・・端子、12′13′・・・・・・パッド部
、14、I9・・・・・・抵抗体。
代理人 弁理士 内 原 ”
第201A to 1F are cross-sectional views showing each manufacturing process of a monitor resistor according to an embodiment of the present invention, and FIG. 1G is a plan view thereof. The 11th straw IF corresponds to the cross section along YY' in FIG. 1G. FIG. 2 shows the location of another monitor resistor according to the present invention.
shows. 1.18...Silicon oxide film, 2...
Silicon substrate, 2...Contact region, 7...
...Polycrystalline silicon layer, 12.13.20.20'
...Terminal, 12'13'...Pad section, 14, I9...Resistor. Agent Patent Attorney Uchihara ” 20th
Claims (1)
体素子には抵抗体素子を有し、該抵抗体素子は絶縁膜上
のシリコン薄膜からなる高抵抗領域と該高抵抗領域の両
端にそれぞれ接続されかつ該絶縁膜上を延在するシリコ
ン薄膜よりなる特性モニター用の電極端子を有すること
を特徴とする半導体装置。In a semiconductor device ζ including a plurality of semiconductor elements, the semiconductor element has a resistor element, and the resistor element has a high resistance region made of a silicon thin film on an insulating film and a high resistance region at both ends of the high resistance region. 1. A semiconductor device comprising a characteristic monitoring electrode terminal made of a silicon thin film connected to the insulating film and extending over the insulating film.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9420384A JPS605537A (en) | 1984-05-11 | 1984-05-11 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9420384A JPS605537A (en) | 1984-05-11 | 1984-05-11 | Semiconductor device |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP50145473A Division JPS5268376A (en) | 1975-12-05 | 1975-12-05 | Semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS605537A true JPS605537A (en) | 1985-01-12 |
JPS6310579B2 JPS6310579B2 (en) | 1988-03-08 |
Family
ID=14103741
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9420384A Granted JPS605537A (en) | 1984-05-11 | 1984-05-11 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS605537A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63220537A (en) * | 1987-03-09 | 1988-09-13 | Nec Corp | Semiconductor substrate |
US4992850A (en) * | 1989-02-15 | 1991-02-12 | Micron Technology, Inc. | Directly bonded simm module |
US4992849A (en) * | 1989-02-15 | 1991-02-12 | Micron Technology, Inc. | Directly bonded board multiple integrated circuit module |
US4992767A (en) * | 1989-02-03 | 1991-02-12 | Hitachi Metals, Ltd. | Magnet roll |
US5236857A (en) * | 1991-10-30 | 1993-08-17 | Texas Instruments Incorporated | Resistor structure and process |
USRE36325E (en) * | 1988-09-30 | 1999-10-05 | Micron Technology, Inc. | Directly bonded SIMM module |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS492485A (en) * | 1972-04-19 | 1974-01-10 |
-
1984
- 1984-05-11 JP JP9420384A patent/JPS605537A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS492485A (en) * | 1972-04-19 | 1974-01-10 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63220537A (en) * | 1987-03-09 | 1988-09-13 | Nec Corp | Semiconductor substrate |
USRE36325E (en) * | 1988-09-30 | 1999-10-05 | Micron Technology, Inc. | Directly bonded SIMM module |
US4992767A (en) * | 1989-02-03 | 1991-02-12 | Hitachi Metals, Ltd. | Magnet roll |
US4992850A (en) * | 1989-02-15 | 1991-02-12 | Micron Technology, Inc. | Directly bonded simm module |
US4992849A (en) * | 1989-02-15 | 1991-02-12 | Micron Technology, Inc. | Directly bonded board multiple integrated circuit module |
US5236857A (en) * | 1991-10-30 | 1993-08-17 | Texas Instruments Incorporated | Resistor structure and process |
US5465005A (en) * | 1991-10-30 | 1995-11-07 | Texas Instruments Incorporated | Polysilicon resistor structure including polysilicon contacts |
US6261915B1 (en) | 1991-10-30 | 2001-07-17 | Texas Instruments Incorporated | Process of making polysilicon resistor |
Also Published As
Publication number | Publication date |
---|---|
JPS6310579B2 (en) | 1988-03-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US5693577A (en) | Method of making a silicon based biomedical sensor | |
US4197632A (en) | Semiconductor device | |
JPH01130552A (en) | High resistant element | |
JPS6113381B2 (en) | ||
US7019343B2 (en) | SnO2 ISFET device, manufacturing method, and methods and apparatus for use thereof | |
US20030037590A1 (en) | Method of self-testing a semiconductor chemical gas sensor including an embedded temperature sensor | |
JPH0818068A (en) | Manufacture of semiconductor distortion sensor | |
US6287933B1 (en) | Semiconductor device having thin film resistor and method of producing same | |
JPS605537A (en) | Semiconductor device | |
CA1139014A (en) | Method of manufacturing a device in a silicon wafer | |
US4595944A (en) | Resistor structure for transistor having polysilicon base contacts | |
JPH06204408A (en) | Diffused resistor for semiconductor device | |
US20020175379A1 (en) | Polysilicon resistor semiconductor device | |
JP3116384B2 (en) | Semiconductor strain sensor and manufacturing method thereof | |
JPS605536A (en) | Manufacture of semiconductor device | |
JP2000294655A (en) | Semiconductor device and its manufacture | |
JPS62234363A (en) | Semiconductor integrated circuit | |
JPH06147993A (en) | Infrared sensor element and its manufacture | |
JPS5848840A (en) | Electric resistance type humidity sensor and its manufacture | |
JPS62156879A (en) | Semiconductor pressure detector and manufacture of the same | |
JPS6148957A (en) | Manufacture of mos capacitor | |
JPH03222355A (en) | Semiconductor device | |
JPS5826177B2 (en) | Manufacturing method of semiconductor device | |
JPS59121966A (en) | Manufacture of semiconductor device | |
JPS59204262A (en) | Polycrystalline silicon resistance element |