JPS605536A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To enable to readily and accurately monitor and correct the characteristics of a semiconductor device by employing a terminal electrode for monitoring a silicon capable of enduring against high temperature for correcting the characteristics. CONSTITUTION:A polycrystalline silicon layer 7 is formed on a silicon substrate 2 and holes 4-6. The layer 7 is then selectively removed to form external lead silicon electrodes 8, 9, 10 of base, emitter and collector regions, respectively, and the surfaces of the electrodes 8-10 are again covered by thermal oxidation with a silicon oxidized film. Subsequently, only the film covered on the electrode 8 is selectively removed, boron atoms are diffused through the hole 4 to form a P<+> type base contacting region 3' on the region 3, and the electrode 8 is covered again with the oxidized film by thermal oxidation. Then, the electrodes 9, 10 of the emitter and collector regions are selectively removed, and phosphorus atoms are diffused through the electrodes 9, 10 and further the emitter holes 5 and the collector holes 6 to the regions 3, 2 to form an N type emitter region 11 and an N<-> type collector contacting region 2', thereby obtaining a monitoring transistor.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing an integrated circuit device including a semiconductor element having electrode terminals for monitoring characteristics.

In semiconductor integrated circuit devices, extra semiconductor wires are usually provided to monitor the characteristics of semiconductor elements within the device.

It is desirable that the dimensions and dimensions of such characteristics monitoring elements be the same as those of the monitored element, but with the recent drastic reduction in the size of each element in semiconductor integrated circuits, it is difficult to direct the probe of the measuring device directly onto the element surface. It has become impossible to guess. Therefore, monitoring of element characteristics in conventional integrated circuit devices is carried out either by (11) external lead-out electrodes formed on auxiliary elements of the same size, or (2) by means of external lead-out electrodes formed on auxiliary elements of large size that have a characteristic correlation with the monitored element. was used.

The latter method (2) is complicated and inaccurate because it requires calculating and evaluating the characteristics of the device to be measured based on the data obtained from the auxiliary element 7. Although the former method (1) allows the characteristics of the monitored element to be quickly determined with high precision, it is difficult to modify the characteristics of the element to desired values. This is because the aluminum used for the external lead-out electrodes cannot withstand the treatments required to modify device characteristics.

Polycrystalline silicon layers are widely used in semiconductor integrated circuit devices. For example, in an insulated gate field effect transistor, the gate '71! It has been used as a pole, as an electrode of a diffuser beam source and its diffusion layer in a pibo-2 transistor, and as a resistor element in a passive device. However, the characteristics of these semiconductor devices using polycrystalline silicon cannot be determined until after the metal electrode for external lead-out is formed, and it is impossible to modify the characteristics at this stage as described above, so the desired characteristics cannot be determined. This made manufacturing of semiconductor devices difficult.

Another object of the present invention is to provide a method for manufacturing a semiconductor device in which element characteristics within the semiconductor device can be easily determined by monitoring a monitoring element and correcting it to a desired value.

According to the present invention, a characteristic monitoring electrode made of silicon/thin film is connected to a predetermined region of an element, and after the characteristic of the element is evaluated by the electrode, the characteristic is controlled in a semiconductor device including the element. A method for manufacturing a semiconductor device is obtained, which is characterized in that correction is performed.

The silicon external lead electrode is connected to a monitoring semiconductor element formed on a semiconductor substrate of a semiconductor integrated circuit device, and extends over an insulating film covering the semiconductor substrate to an area outside the monitoring element area. . The monitoring element may be additionally provided in addition to the elements constituting the integrated circuit, or one of the integrated circuit constituent elements may be used. Preferably, the dimensions and structure of the monitoring element are the same as the monitored element.

According to the invention, the probe of the measuring instrument is brought into contact with the externally led silicon electrode in order to measure the characteristics of the monitoring element and thereby to know the characteristics of the monitored element. If the measured properties do not reach the desired values, the semiconductor device is subjected to additional treatments, such as heat treatment or redoping of impurities, to bring the properties to the desired values. Then, the characteristics are checked again by bringing the probe into contact with the silicon electrode of the monitoring element. Thereafter, metal electrodes or metal wiring layers are formed on the semiconductor device, if necessary. According to the present invention, since silicon, which can withstand the high temperatures of the characteristic correction process, is used for the monitoring terminal electrode, the characteristics can be easily and accurately monitored and corrected. In addition, gold J9 [pole or metal arrangement! A semiconductor device including 9R can be manufactured after both monitoring and characteristic correction steps are performed.

Hereinafter, the present invention will be explained in detail with reference to the drawings.

FIGS. 1A to 1H show a preferred embodiment of the present invention in which the present invention is applied to the manufacture of a bipolar transistor. Figures 1A-G show cross sections of each manufacturing process, and Figure 1H
shows the plan view. Figure 1 Gti Figure 1 H x-x'
Corresponds to a cross section along A thermally oxidized silicon substrate 2 is coated with a silicon oxide film 1 (Figure 1).
. Next, an opening (not shown) reaching the N-type silicon substrate 2 is provided in the silicon oxide film 1, and boron atoms are diffused through this opening to form the base region 3, and the surface of the silicon substrate 2 is again covered with silicon oxide WX1 (Fig. 1B
). Next, openings 4.5 and 6 are provided in the silicon oxide film 1 (FIG. 1C). These openings 4.5 and 6 will later be used to make ohmic contact between the base, emitter and collector regions and the external polycrystalline silicon electrode, respectively. Next, polycrystalline silicon M7 is produced by thermal decomposition of monosilane on the silicon substrate 2 and the C4 holes 4 to 6 which have been treated so far (FIG. 1D).

Next, the polycrystalline silicon layer 7 is selectively removed to form externally led silicon electrodes 8.9 and 10 in the base, emitter and collector regions, respectively.
100 surface is covered again with a silicon oxide film by thermal oxidation (
Figure 1E). Referring also to FIG. 1H, silicon electrode 8.
9 and 10 are connected to the base region 3, the future emitter region and the collector region 2, respectively, and further extend over the surface of the silicon oxide film 1. These electrodes 8-10
pad portions 8', 9', and 10 each extending on the oxide film 1 to a region outside the active region of the monitoring transistor element and having an area large enough to accommodate the probe of the measuring instrument.
′. The area of the pad portion and the distance from the instantaneous contact pad portion are determined to ensure that one of the probes of the measuring instrument contacts only a single pad portion. Next, the base lead-out electrode 8
In order to selectively remove only the oxide film covering the P-type base region 3 and form a P-shaped base contact region 3' in the P-type base region 3, boron atoms are diffused through the base opening 4 and subjected to thermal oxidation. Then cover the silicon electrode 8 again with an oxide film (Fig. 1F).
). Next, the lead-out electrode 9 of the emitter region and collector region
and 10 are selectively removed, and phosphorus atoms are diffused into the base region 3 and collector region 2 through the emitter electrode 9 and the collector electrode 10, and further through the emitter opening 5 and the collector opening 6, respectively. By doing so, an N-type emitter region 11 is formed in the base region 3 and an N-type collector contact region 2' is formed in the substrate 2 (FIG. 1G).

The silicon electrodes 9 and 1O are fully doped with N type impurities (phosphorous in this case) and covered with an oxide film. External lead-out silicon [The oxide film covering the electrodes 8 to 10 is removed from at least the surface of each pad part 8' to 10', and the exposed pad part 8' of the external lead-out silicon electrode 8 to lO as a monitor terminal is removed. By applying the probe of the measuring device to 10', the characteristics of this monitoring transistor, such as the common emitter current amplification factor hFE, are measured. If the measured properties are lower than desired values, one or more impurities are further diffused. For example, about 0.
5/l m thick silicon layer through emitter and collector electrodes 9 and 10 at 1000° C. for 25 minutes.
When a square emitter region 11 with an area of 4×4 μm was formed by diffusion and separated from the collector region 1 by 0.8 μm, the measured current amplification factor hFE was 20. Since this value is lower than the desired value, the semiconductor device is heated at 1000° C. for 30 minutes in a nitrogen atmosphere and the emitter 'Tl!
The adjacent doped pole 9 was diffused into the emitter region ll. When measured using externally led silicon electrodes 8 to 1O, the current amplification factor hFE was increased to 60. If an aluminum electrode is used, the aluminum will melt during such high-temperature treatment.

FIGS. 2A to 2G show another embodiment of the present invention in which the present invention is applied to the manufacture of a resistor element. FIGS. 2A to 2F show cross sections in each manufacturing process, and FIG. 2G shows a plan view thereof. FIG. 2F corresponds to a cross section taken along Y-Y' in FIG. 2G. First, the semiconductor substrate 2 is thermally oxidized and covered with an oxide film 1 (FIG. 2A). Next, a polycrystalline silicon layer 7 is generated on the oxide H1 by thermal decomposition of monosilane, and a resistor element with a terminal portion is formed by selectively removing the polycrystalline silicon layer 7, and then thermally oxidized. This resistor element is then covered with an oxide film (FIG. 2B). Referring also to FIG. 2G, the terminal portions 12 and 13 are connected to both ends of the main body 14 of the resistance element, and wide-area pad portions 12' and 13 extend over the oxide film 1 and serve as monitor terminal electrodes. Each ends with '. Next, both terminals 12 of the silicon resistor element
and 13 (including 12' and 13') is selectively removed (FIG. 2C). Next, both terminal portions 12 and 13 of the resistor element from which the silicon oxide film has been removed are removed. Highly concentrated boron atoms are diffused into the region 13 to form a highly doped, low resistance region.Then, it is again covered with an oxide film (FIG. 2D).Next, the region 14 other than the region in which the above-mentioned highly concentrated boron atoms have been diffused is That is, in order to selectively remove the oxide film covering the main body of the resistor element, boron atoms are implanted into this region 14 in a controlled manner so as to obtain a desired resistance value (FIG. 2B) by ion implantation. Inject with precision and cover with oxide film again (Fig. 2F)
.

The pad portions 12' and 13' of the resistor element terminal are exposed, and the probe of the measuring device is applied thereto to measure the resistance value of this monitoring resistor element. If the resistance value is found to be lower than the desired value, the thickness of the silicon layer in the body 14 of the monitor resistor and the thickness of the other resistor formed on the same Ml oxide in the same process at the same time as the monitor resistor fabrication. Decreasing the thickness of the silicon layer increases the resistance value. Further, if the resistance value is higher than the desired value, further impurities are introduced into these resistors to lower the resistance value.

FIG. 3 shows a part of a semiconductor integrated circuit device according to the present invention, a plan view thereof is shown in FIG. 3B, and a cross section taken along the line zz' in FIG. 3B is shown in trS3A. This integrated circuit device is provided with a monitor bipolar transistor 31 along with semiconductor circuit elements 41 forming the integrated circuit, such as a bipolar transistor 32 and a diffused resistor 33. These circuit elements are formed on a single semiconductor substrate 42 and are separated from each other by PN junctions. That is, a plurality of N-type island-like regions 21, 22, and 23 are formed in a P-type silicon substrate, and one of the island-like regions 21 has the same structure as in the embodiment shown in FIG. A monitor transistor 31 is formed by the same method as in the embodiment shown in FIG. A bipolar transistor 32 of the same type as the monitor transistor 31 is formed in the island region 22 at the same time as the transistor 31. This transistor 32 has a silicon emitter electrode 28 extending to other elements and a substrate 42. A silicon paste electrode 29 extending over the covering oxide film 41 and connected to one terminal of the diffused resistor 33 and a silicon collector electrode 27 are provided, and the aluminum wiring layer 43 is connected to the silicon collector electrode 27. The other island region 23 is provided with a P-type resistance layer 53, and the other end of this resistance 33 is connected to the silicon electrode 30 and the aluminum S layer 44. Connected to other elements.P of the monitor transistor 31
The P-type base region 31, the P-type base region 52 of the circuit transistor 32, and the P-type resistance region 53 are the N-type island region 2.
1.22 and 23, respectively, are formed simultaneously. Next, silicon electrodes a24 to a30 are simultaneously created. Then P 10-shaped base ° contact areas 54 and 55 and P
A 10-type resistor contact region 56 is also formed at the same time, and further includes N00-type emitter regions 57 and 58 and an N00-type collector contact region 56.
Contact regions 59 and 6o are created at the same time.

Thereafter, in order to monitor the characteristics of the circuit transistor 32, the characteristics of the monitor transistor 31 are measured using the silicon monitor terminals 24-26. Then, if correction is necessary, the characteristics of transistors 31 and 32 are corrected at the same time. Next, aluminum wiring layer 43
and 44 are formed on the substrate 42. The transistor 32 used in the integrated circuit is a monitor transistor 3.
Since it is of the same type as No. 1 and formed at the same time, its characteristics can be monitored via the monitoring transistor 31 and can be controlled with high precision. Furthermore, by using the silicon externally derived voltages W124 to W26 as monitor terminals, the characteristics of the transistors 31 and 32 can be modified and controlled with high precision during the manufacturing process.

FIGS. 4 and 5 show cross-sectional views of a further improved version of the above embodiment. The external silicon electrodes 15, 16 and 17 of the monitor transistor (same as the electrodes of the circuit transistor) and the silicon body 19 and terminal portions 20 and 20' of the monitor resistor (same as the circuit resistor side) are connected to the silicon oxide film 18. It is buried inside. This oxidized gi
The region g is formed by selectively thermally oxidizing the silicon layer instead of selectively removing it. This ridge flattens the surface of the semiconductor device.

The monitoring transistor and monitoring resistor of the embodiments described above may be used as circuit elements constituting an integrated circuit. In that case, the lead-out silicon electrodes 8 to 10.12
．． 13.15 to 17.20.20' and 24 to 26 are connected to other elements by wiring layers such as aluminum.

When used only for characteristic monitoring, these derived silicon electrodes may be left as they are after use (after measurement is completed), but after use they should be removed by etching or other means or converted into oxides by oxidation. is also possible.

Although the embodiments have been described above, the main part of the present invention is an electrode terminal for characteristic monitoring, which is made of a silicon thin film that is adhered to one main surface of a semiconductor substrate and extends outside a semiconductor region where an element is formed. The effects of the present invention are as follows:
The characteristics of the semiconductor element can be measured before forming the metal electrodes, and therefore the characteristics of the element actually used can be accurately controlled. Therefore, the technical scope of the present invention is not limited to the above embodiments, and the rights of this invention extend to all devices shown in the claims.

[Brief explanation of drawings]

1A to 1G are cross-sectional views showing each manufacturing process of a monitor bipolar transistor according to an embodiment of the present invention. Figure 1
(corresponds to the cross section along x-x' of FIG. 2A-F are cross-sectional views showing each manufacturing process of a monitor resistor according to another embodiment of the present invention, and FIG. 2G is a cross-sectional view of the same. A plan view is shown. Figure F on page 52 corresponds to a cross section taken along Y-Y' in Figure 2 G. Figure 3 A is a diagram showing a part of an annual bond circuit device equipped with a monitor transistor according to the present invention. Z − in the plan view of Figure 3 B
It is a sectional view along Z'. FIG. 4 shows a sectional view of another monitor transistor according to the present invention. FIG. 5 shows a cross-sectional view of another monitoring resistor according to the invention. 1.18.41...Silicon oxide film 2.42...
Silicon substrate 2.59.60...Contact area 3
．． 51.52...Base area 3', 54.55...
・Base contact area 4.5.6...Opening part
7...Polycrystalline silicon ff18.15.24...Base externally led silicon electrode 9.16.25 Kawaguchi Mitsuta externally led silicon electrode 10.17.26-Collector externally led silicon electrode 8', 9', 10 '...Pad part 11.57.58...Emitter region 12.13
．． 20, 20'... Terminal 12', 13'... Pad portion 14.19... Resistor 21, 22.23...
・Island area 27.28.29.3o...Series zn? 11 poles 31--Bipolar transistor for monitor 32...Bipolar 2 transistor of circuit 33
... Diffused resistance 53 ... Resistance region 56 ... Resistance contact region 43.44 ... Aluminum wiring layer substitute Patent attorney Susumu Uchihara / B 2nd page

Claims (1)

[Claims] A silicon thin film is applied to the 01 constant region of the T element, and after the characteristics of the element are evaluated by the element, the characteristics of the semiconductor device containing the water element are controlled. A method of manufacturing a sitting guidance device, characterized by carrying out modification.