JPS5898953A - Semiconductor device - Google Patents

Abstract

PURPOSE:To expand a safely operating region and to improve the reliability of a semiconductor device by forming a mixed film of a polycrystalline semiconductor and an oxidized film on the surface of a substrate formed with a transistor and forming a resistance layer on the prescribed part of the film. CONSTITUTION:An N type base region 2 is formed on a P type silicon crystalline substrate 1, and a P type emitter region 3 by boron diffusion is formed in the region 2. A mixed film 11 mixed with oxidized silicon in polycrystalline silicon is formed on the surface of the substrate. A resistance layer 12 and a high impurity density region 6 covered ohmically with an electrode are simultaneously formed on the base electrode region of the film 11. Further, a base electrode 4 and an emitter electrode 5 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and more particularly to a transistor structure that expands the safe operating area of a transistor and improves its reliability.

Tran? It is known to connect a ballast resistor to the base or emitter of a transistor in order to expand the safe operating area of the transistor. Conventional examples of ballast resistors are shown in Fig. 1, Fig. 2, and Fig. 3. Figure 1 shows PNP)
An N-type base region 2 is selectively diffused into a P-type collector region 1 of the transistor, a P-type emitter region 3 is selectively diffused into a part of the base region 2, and each of these regions is base electrode 4. An emitter electrode 6 is provided, and a high concentration of N is added in the base region 2 in a portion where the base electrode 4 is to be formed in order to lower the contact resistance.
A transistor with a mold region 6 formed therein is shown. Also,
In this device, 7 is a surface-inactivated insulating film made of silicon dioxide, for example.

Furthermore, in this device, an auxiliary diffusion region 9 of the same conductivity type as the emitter is selectively diffused in the base region 2 so as to surround the emitter region 3 at the same time as the emitter region 3 is formed, and the emitter junction and the base electrode are bonded together. A resistance region 9 is provided to allow the current path to wrap around and compress under the auxiliary diffusion region 8, and this region 9 is used as a base ballast resistance.

In FIG. 2, a ballast resistor is formed in the emitter region to serve as an emitter ballast resistor. Furthermore, there is also a structure in which the ballast resistor is not formed in the semiconductor substrate, but is made of, for example, polycrystalline silicon by chemical vapor deposition, and is used as an emitter ballast resistor.

FIG. 3 shows an example of forming a parallax resistor using polycrystalline silicon. After forming the emitter region 3 and the space contact region 6 according to the normal transistor process, the oxide film 7 is selectively photoetched to expose a predetermined emitter surface, and polycrystalline silicon 1o is deposited on the entire surface. is patterned to form a connection electrode part with the metal wiring film at the other end, and the polycrystalline silicon film part parallel to the substrate between the emitter electrode in contact with the substrate emitter surface and the connection electrode is used as a resistance region 9. .

This polycrystalline silicon 10 is doped with phosphorus or boron at the same time as it is deposited, or it is doped with phosphorus or boron at a high concentration by an impurity diffusion method after the polycrystalline silicon 10 is formed. Generally, it has a small specific resistance value and is used as a horizontal resistor parallel to the surface of a thin film substrate. In addition, a protective film is formed separately from the above process to improve the reliability of the high-voltage device.

In Figures 1 and 2, there is a drawback that the resistance region is within the substrate plane, and in the case of providing a ballast resistor outside the substrate as shown in Figure 3, when adding impurities to the polycrystalline silicon 1o, the amount of addition must be increased. As the resistance increases, the resistivity changes rapidly from high resistance to low resistance, making it difficult to control the amount added to obtain a resistivity between high resistance and low resistance. Furthermore, since it is used as a horizontal resistor, the chip area increases.

On the other hand, coating the semiconductor substrate surface with an insulator 7 to inactivate the semiconductor substrate surface is very important for increasing the reliability of semiconductor devices. It is known to coat an insulating film such as silicon or a hybrid film of polycrystalline silicon and silicon oxide by thermal decomposition or chemical vapor deposition, and this is performed in a process different from that for improving the safe operating area.

The present invention improves the problems of the devices shown in FIGS. 1 to 3 above, and uses a vertical resistor to prevent an increase in chip area, thereby expanding the safe operating area and improving reliability. It is.

The present invention provides a device having a structure in which a semi-insulating film made of a hybrid of polycrystalline silicon and silicon oxide, which is physically or chemically vapor deposited on the surface of a semiconductor substrate, is used as a stabilizing film and a resistive layer. The resistance layer is formed by selectively doping impurities, and its resistance value is set to a predetermined value in an impurity doping step that also serves as base contact expansion.

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 4 flLl, (b), (C1, (111 shows the example in the order of steps. FIG. 4 (a) shows an N-type base region 2 formed by phosphorus diffusion on a P-type silicon crystal substrate 1. A P-type emitter region 3 is formed by boron diffusion in the base region 2. Reference numeral 7 denotes an oxide film used as a mask for selective diffusion of the base region 2 and emitter region 3. In bl, the oxide film 7 is completely removed, and a hybrid film 11 in which silicon oxide is mixed in polycrystalline silicon is formed on the substrate surface.

Compared to the electrical resistance of silicon oxide formed by ordinary thermal oxidation, etc., a hybrid film of polycrystalline silicon and silicon oxide has a small electrical resistance and is not easily charged. Taking advantage of this property, it has often been used as a protective film for power transistors. In this example, S
The iH4-N20 gas is reacted in a reduced pressure CvD apparatus. The reason why a low pressure CVD device was used is that the uniformity and reproducibility of the film is better than when using a normal pressure CVN device. FIG. 4 (C1 is a film in which phosphorus is added onto the space electrode region of the composite film 11 to simultaneously form a high impurity concentration region 6 for ohmically adhering the resistive layer 12 and the electrode. Although shown in FIG. 2 or 3, it is also possible to form a resistive layer on the upper part of the emitter region 3. In the case of the hybrid film 11 of polycrystalline silicon and silicon oxide, the resistivity changes gradually from a high resistance value to a low resistance value as the amount of addition is increased, so controllability is good, and impurities can be added to the polycrystalline silicon film. It has the advantage that higher electrical resistance can be obtained than when it is added.

As described above, the device of the present invention has the advantage that the pace/ballast resistor is formed vertically in a small area with good controllability in order to expand the safe operation area, and the protective film is also formed at the same time, resulting in high reliability. It has the feature of obtaining the characteristics.

In this embodiment, the present invention is applied to an I'NP transistor, but it is obvious that the same effect can be obtained by applying the invention to an NPN transistor.

[Brief explanation of drawings]

Figures 1, 2, and 3 are cross-sectional views of the conventional device;
Figure f&) t (bl, +CI I (δ) is a cross-sectional view illustrating an apparatus according to an embodiment of the present invention in the order of steps. 1... Conductive semiconductor substrate, 2... Opposite conductivity type paste region, 3...-conductivity type emitter region, 4...Pase electrode, 6...Emitter electrode, 11...Polycrystalline silicon and Hybrid film of silicon oxide, 12...Mixed film resistance layer. Name of attorney: Satoshi Oo, Patent attorney, Man, Nejika 1 person Car 1
Figure 2 Figure 4

Claims (1)

[Claims] A transistor structure having a base region of an opposite conductivity type on a semiconductor substrate of one conductivity type, and an emitter region of the same conductivity type as the substrate in the base region has a hybrid film of a polycrystalline semiconductor and an oxide film on the surface thereof; . A semiconductor device comprising: a resistive layer formed by controlling the resistivity of the composite film at a predetermined portion of the composite film.