JPS6055025B2 - Potential detection device - Google Patents

Description

[Detailed description of the invention] The present invention relates to an improvement in a potential detection method.

Conventionally, as shown in FIG. 1, for example, a load resistor 3 is connected via a P-type enhancement field effect transistor 2 as a potential detection element of a power source 1, and the MOS field effect is detected by turning ON/OFF the MOS field effect transistor 2. The output voltage, 4, is detected by dividing the ON resistance of the transistor and the load resistance by 3, but in this conventional potential detection method, the potential detection level is a value corresponding to two states: ON and OFF. It is impossible to detect exact changes in potential. Therefore, a plurality of MOS field effect transistors with different threshold voltages of MOS field effect transistors 2 were fabricated, and a multithreshold (Vth
) to increase the potential detection level. Generally, the threshold voltage (Vth) of a MOS field effect transistor is Vth■(qNpB+QB)
tox/ is expressed as +2ΦF+ΦMS. NpB: effective surface charge number per unit area, bulk charge per unit area due to QB/channel depletion layer, ox: gate insulating film thickness, E: dielectric of gate insulating film ΦF: Fermi level of substrate silicon, ΦM3: work function difference between gate electrode and silicon substrate, There are many parameters that determine the threshold of a MOS field effect transistor, but in manufacturing, generally the gate oxide film This has been achieved by changing the thickness, substrate concentration, dielectric constant of the gate insulating film, etc.

However, in order to obtain different threshold voltages within the same IC chip, for example, when changing the substrate concentration, a mask etc. is generally used to change the substrate concentration in the channel part. There is a method of changing the concentration of the channel substrate by changing the amount of implantation using an ion implantation method or the like. Similarly, when changing the gate oxide film thickness, dielectric constant, etc., the process is extremely complicated due to the combination of steps such as mask alignment, and workability is extremely poor, and thermal history increases, resulting in poor reproducibility and problems in improving yield. There was a drawback. In order to eliminate these drawbacks, the present invention provides an electronic timepiece with a built-in potential detection element that can accurately detect changes in the potential of a watch battery, etc., without increasing mask alignment or heat history processes. be.

This will be explained below based on the drawings. Figure 2 shows a commonly used P-channel MNOS (metal mononitride film-oxide film-S
1 Substrate) Cross-sectional view of memory element A and normally drawn Vth-V
O (VO is the gate voltage) hysteresis curve, the opening is shown. The conventional ■East B memory element shown in FIG. The "O" state, which indicates the P channel depletion mode, is obtained by injecting electrons from the Si substrate 6 to induce positive charges on the surface of the S1 substrate. By effectively trapping positive charges at the interface between the nitride film 7 and the oxide film 8, only two states corresponding to the "1" state, which indicates the P channel enhancement mode, can be obtained. . The present invention forms a depletion or enhancement region in a non-volatile manner to a desired length in the channel region of the MOS field effect transistor by forming the gate oxide film into a two-layer structure. This allows the resistance to be changed arbitrarily, and the effect is effectively the same as changing the threshold voltage of a MOS field effect transistor. Therefore, the potential detection level can be multi-staged, and potential fluctuations can be strictly controlled. Not only can it be detected, but also the gate electrode, 5 and Si
By applying voltage between the substrates 6, it is possible to simultaneously manufacture detection elements with different detection levels. FIG. 3 shows an embodiment of a P-channel detection element in which the gate oxide film has a two-layer structure, which is used in the present invention. In the embodiment shown in FIG. 3, 5 is a gate electrode, 6 is an SI substrate, 7 is a nitride film, 8'' is a first layer gate oxide film, 9 is a second layer gate oxide film, 10 is a source electrode. The gate electrode 5 is made of Si.
A positive charge (for example, +25
When V) is applied, electrons cause a tunnel effect etc. through the first layer of thin oxide film 8'', and the nitride film 7 and thin oxide film 8
On the other hand, because the second layer oxide film 9 is thick, this phenomenon does not occur, and only the surface of the Si substrate 6 under the first layer oxide film 8'' of the channel. Due to the trapped electrons, the surface is inverted, and in the case of a P channel, this region forms a depletion region in a nonvolatile manner, and the resistance value of the channel portion is equal to the combination of channel regions having different resistance values. Therefore, as shown in Figure 3, if the length of the first layer oxide film 8'' region is changed, the length of this non-volatile depletion region will be different, resulting in a different channel resistance. The effect is the same as obtaining a threshold voltage value that is different from A and A, therefore, the length of the first layer oxide film that indicates the non-volatile depletion region of the channel portion on the mask. If you make it variable,
Not only is it possible to set many different potential detection levels, but also a bias can be applied between the gate voltage 5 and the substrate Si 6 through a single mask alignment process in which the length of the first layer oxide film is made variable. This greatly simplifies the process and allows production without increasing heat history, which significantly improves reproducibility. FIG. 4 shows the same effect obtained by adding an enhancement region to the channel portion used in the present invention.

FIG. 5 shows an example in which the shape of the first layer oxide film is changed, and the same effect can be obtained by changing the shapes of the first layer oxide film 11 and the second layer oxide film 12. Further, the same effect can be obtained in the case of an N channel, and it can be similarly applied to other structures such as MAOS (metal-alumina oxide film-Si substrate). FIG. 6 shows an example applied to an actual electronic watch.

In FIG. 6, 13, 14, and 15 are storage elements having a two-layer gate structure with different channel resistances, and 16 is a fixed resistor 1.
Reference numeral 7 indicates a storage block, and 181A, b, and c indicate a display section.
MOS including nonvolatile memory elements with different channel resistance values
When a detection voltage (V) 22 is applied to the gates of the field-effect transistors 13, 14, and 15, each MOS field-effect transistor has a similar effect when the threshold voltages are different, so the potential level changes. In response, each MOS field effect transistor becomes an ON state and is stored in the memory block 17 via the fixed resistor 16.

Then, it is displayed on the display section 21 via the driver. Therefore, M including nonvolatile memory elements with different channel resistance values
The resistance value of the OS field effect transistor was changed from 13 to 14 to 15.
For example, when the MOS field effect transistor 13 is in the 0N state, the driver terminals 18, 19, and 20 are set to 1 through the logic circuit because 14 and 15 are OFF.
Since only 8 shows "゜1゛" and the others are in "0" state, display section 2
1, only the section a corresponding to the driver terminal 18 is displayed. For example, MOS field effect transistors 13, 14
When is in the 0N state, similarly, only the driver terminal 19 is ``1''.
,, only display section b is displayed. Also, when the field effect transistors 13, 14, and 15 are in the ON state, only the display portion c is displayed in exactly the same manner. As is clear from the above explanation, according to the present invention, the gate oxide film has a two-layer structure and the width of the charge injected into the trap center can be made variable without increasing the number of complicated mask alignment steps in the manufacturing process. As a result, the on-resistance of the surface of the Sl substrate in the channel portion can be made variable, and it is possible to have the effect of changing the apparent threshold voltage of the MOS field effect transistor. Therefore, according to the present invention, not only can fluctuations in potential within an electronic timepiece be accurately detected, but also the manufacturing process can be greatly simplified, resulting in very large effects.

[Brief explanation of drawings]

Figure 1 is a basic potential detection circuit diagram, Figure 2 A is a conventional P
A cross-sectional view of a channel MNOS storage element, Figure 2 is an explanatory diagram showing a typical ■Th-■G hysteresis curve, and Figure 3 is an explanatory diagram showing a typical ■Th-■G hysteresis curve.
, 4 and 5 show the P-channel MNOS used in the present invention.
These are cross-sectional views of a memory element. Figure 3A shows the deployment mode, Figure 3B shows the case where the first layer gate oxide film is long, and Figure 3B shows the case where the first layer gate oxide film is short. In both cases, the Si substrate under the first layer gate oxide film exhibits depletion mode. Figure 4 is a cross-sectional view showing the enhancement mode under the first layer oxide film, Figure 5 is a cross-sectional view when the shape of the two-layer gate oxide film structure is changed, and Figure 6 is a cross-sectional view of the structure incorporated into an electronic watch. FIG. 1...Power supply, 2...P channel MOS field effect transistor, 3...Fixed resistance, 4...Output voltage, 5... Gate electrode, 6...Si substrate, 7...Nitride film, 8,8''8''...
First layer oxide film, 9... Second layer oxide film, 10...
...Source electrode, 11...First layer oxide film,
12... Second layer oxide film, 13, 14, 15...
...Gate oxide film double layer structure memory element, 16...
・・Fixed resistance, 17 memory blocks, 18, 19, 20・
...Driver terminal, 21...Display section, 2
2...Detection voltage.

Claims (1)

[Scope of Claims] 1. A logic circuit including a clock circuit integrated on the same substrate, a display device that displays the time measurement contents of the logic circuit, and an electrically writable and erasable device that provides data to the logic circuit. 1. A potential detection device, characterized in that, in an integrated circuit having a nonvolatile memory element, a potential detection level is provided by making the threshold voltage of the nonvolatile memory element variable. 2. A nonvolatile memory element is characterized in that the gate insulating film is composed of films with different thicknesses, and the threshold voltage is set by arbitrarily changing the ratio of the lengths of the films with different thicknesses. A potential detection device according to claim 1.