JPS6054031A - Data holding device of digital circuit device - Google Patents

Abstract

PURPOSE:To hold data in a circuit device which is backed up with a holding power source, by providing a signal transmitting circuit device which has a threshold preventing a transient erroneous signal level appearing in the output of the first circuit device from being transmitted. CONSTITUTION:A signal transmitting circuit device 7 consists of a Zener diode Ze, a transistor TRQ, and resistance R1, R2, and R3. The threshold is the sum of the turn-on voltage of the Zener dioded Ze and the turn-on voltage between the base and the emitter of the TRQ. At the transition time when a main power source 1 is turned on or off, the transient erroneous signal level which appears in the output of the first circuit device 2 does not reaches the threshold. Therefore, the TRQ is not turned on, and data in second circuit device 4 is not affected by turning-on/off operations of the main power source 1, and the operation is secured by a backup 3.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an apparatus for error-free holding of data in a digital circuit device that is pulled up by a holding power supply when the main power supply is turned off.

Conventional configurations and their problems Conventionally, devices have been known that are configured so that data in digital circuit devices such as counters or memories can be retained using a retention power source, such as a battery, even when the main power source is turned off. Since other circuit devices other than the circuit device are not backed up by a holding power supply, if the supply voltage of the circuit device is low during the main power on/off transition, the circuit operation state may become unstable and transient erroneous signals may occur. is likely to be transmitted to the digital circuit device, causing the data to be erroneous, especially when the holding power source has a lower voltage than the main power source.

OBJECT OF THE INVENTION The present invention has an object to solve the two problems and to maintain the data of the digital circuit device backed up by the holding power supply without causing errors due to transient erroneous signals that appear when the main power is turned on and off. .

Structure of the Invention In order to achieve the above-mentioned object, the present invention provides a main power supply that is turned on and off, a first circuit device to which this main power supply is supplied,
a holding power source; a second circuit device to which the main power source is supplied when the main power source is turned on; and a second circuit device to which the holding power source is supplied when the main power source is turned off; the first circuit device and the second circuit device; a signal transmission circuit device interposed therebetween and supplied with power in the same manner as the second circuit device, the signal transmission circuit device being capable of transmitting an H level signal when the main power supply is normally on; A data holding device for a digital circuit device, characterized in that it has a threshold level that makes it impossible to transmit a transient erroneous signal level that appears at the output of the first circuit device during a transition when the main power supply is turned on and off. The data of the second circuit device consisting of a counter, memory, etc. is not affected by the on/off operation of the main power supply.

Description of examples Next, embodiments of the present invention will be described with reference to the drawings.

Figures 1 and 2 respectively show the basic configuration circuits according to the present invention. 1 is the main power supply, which is a DC version of a commercial AC power supply, or a battery in the case of equipment that uses a battery as a power supply. It is turned on by a power switch (not shown). 2 is a first circuit device to which the main power supply 1 is supplied. Reference numeral 3 denotes a holding power source, such as a battery. Reference numeral 4 denotes a second circuit device consisting of a counter or memory, etc., to which the main power supply 1 is supplied via a diode 5 when the main power supply 1 is on, and a holding power supply 3 is supplied via a diode 6 when the main power supply 1 is off. . Signal transmission circuit devices 7 and 7' are interposed between the first circuit device 2 and the second circuit device 4, and are supplied with power similarly to the second circuit device 4. Signal transmission circuit device 7, 7
' is capable of transmitting an H level signal output from the first circuit device 2 when the main power source 1 is turned on steadily, and is also capable of transmitting the H level signal output from the first circuit device 2 when the main power source 1 is turned on and off.
has a threshold level at which transient erroneous signal levels appearing at the output of the circuit cannot be transmitted.

That is, this threshold level /l/if:
It is lower than the H level signal and higher than the error signal level. At the time of the on-off transition of Wraith'#, 1, the first
When the supply voltage of the circuit arrangement 2 is low, normally C-MO3
Alternatively, the logic state of the first circuit device 2 configured with TTL or the like is not guaranteed, and it is easy to output an erroneous signal, and the signal transmission circuit device 7, 7 has a threshold level set as described above. If there is no such signal, the erroneous signal will be input to the second circuit device 4 and the data will be distorted. It will not be transmitted to the To describe the signal transmission circuit device 7' in more detail, the signal transmission circuit device 7 of FIG.
3, the threshold level is the sum of the on-voltage of the Zener diode Ze and the on-voltage between the base and emitter of the transistor Q, and is output to the first circuit device 2 when the main power supply 1 is normally on. Since the H level signal is higher than the threshold level, the base current flows into the transistor Q via the Zener diode Ze, the collector voltage flows into the transistor Q, and the voltage drop due to the resistor R3 causes the collector voltage of the transistor Q to become L.
The second circuit device 4 operates in such a way that the data of the second circuit device 4 changes due to this displacement. That is, in the case of FIG. 1, the second circuit device 4 is of the so-called down edge trigger type. On the other hand, in the case of Fig. 2, the second circuit device 4
is a type of up-encitric trigger. Therefore, the signal transmission circuit device 7' includes an inverting transistor Q/, a resistor R4,
R5 has been added. In both cases of Fig. 1 and Fig. 2, the first
Since the transient erroneous signal level appearing at the output of the circuit arrangement 2 does not reach the aforementioned threshold level, it does not turn on the transistor Q, so that the data of the second circuit arrangement 4 is not affected by the on-on operation of the main power supply 1. The reason why the signal transmission circuit devices 7 and 7' are configured to be supplied with power in the same way as the second circuit device 4 is to ensure operation regardless of whether the main power source 1 is turned on or off. .

Next, a more specific implementation circuit example will be explained with reference to FIG.

For example, this circuit constitutes part of a dimming control device for a light source,
The dimming state of a light source (not shown) is controlled by the output state of the second circuit device 4, which is a counter. In this circuit, the main power supply 1 has a rated voltage of +15V, and the first circuit arrangement 2 has an AND gate G consisting of a C-MOS and a clock generator CG. When the control signal input to one input of the AND gate G is at H level, the AND gate G opens in accordance with the clock signal of the clock generator CG input to the other input, and a clock signal is outputted to the output A thereof. The H level of this signal is slightly lower than +16V, which is the power supply voltage of the main power supply 1, and is the on-voltage of the Zener diode Ze, 7, 5■, and the on-voltage between the base and emitter of the transistor Q, ○, e V total approximately 8.1v
Therefore, the transistor Q is turned on and its collector voltage goes to L level, and the second circuit device 4 is down-edge triggered and operates to advance the count. and,
Even when the main power supply 1 is turned off, the +6V holding power supply 3 consisting of an ultra-large capacitor is supplied to the second circuit device 4 via the diode 6, and the data of the second circuit device 4, that is, the count state, is maintained at approximately 60 V. I try to keep it for about an hour. Then, during the transient period when the main power supply 1 is turned off, the voltage of the main power supply 1 drops to approximately 6V, and the potential balance of the internal circuit of the AND gate G is disrupted, causing the transient error in the output A as shown in Figure 4. A signal will now be output. The maximum level of this erroneous signal is slightly lower than the voltage of the main power supply 1 at that time, which is approximately 6.
(2) Since the current is low, the transistor Q is not turned on and therefore the count state of the second circuit device 4 does not change. Furthermore, even when the main power supply 1 is turned on from off, an erroneous signal is instantaneously output to the output A of the first circuit device 2, but since this is also lower than the aforementioned approximately 8.1V, the second circuit device I often change the count state of 4. Note that the waveform in Figure 4 mainly consists of a clock signal because the clock generator CG operates normally even at a lower voltage than the AND gate G, but even with a general gate IC, the internal The potential balance is disrupted and a similar disturbance occurs in the output signal.

Effects of the Invention From the detailed description above, it is clear that the present invention has the effect of being able to retain the data of the circuit device backed up by the retention power supply without being affected by the on/off operation of the main power supply, thereby preventing data errors. Therefore, it is reliable and useful as a data holding device for a digital circuit device.

[Brief explanation of drawings]

FIG. 1 and FIG. 2 each show an example of a basic configuration circuit according to the present invention. FIG. 3 is a specific example of an implementation circuit according to the present invention,
FIG. 4 shows a transient waveform diagram at point A. 1... Main power supply, 2... First circuit device,
3... Holding power supply, 4... Second circuit device, A, 7'... Signal transmission circuit device.

Claims (2)

[Claims] (1) A main power source that is turned on and off, a first circuit device to which this main power source is supplied, a holding power source, and a holding power source to which the main power source is supplied when the main power source is turned on and the holding power source when the main power source is turned off. and a signal transmission circuit device interposed between the first circuit device and the second circuit device and supplied with power in the same way as the second circuit device, The transmission circuit device is capable of transmitting an H level signal when the main power supply is normally on, and transmits a transient erroneous signal level that appears at the output of the first circuit device during a transition when the main power supply is on and off. A data retention device for a digital circuit device, characterized in that it has a threshold level that is impossible. (2) A data holding device for a digital circuit device according to claim 1, wherein the holding power source has a lower voltage than the main power source.