JPS6053344A - Time division multiplex analog transmission circuit - Google Patents

Abstract

PURPOSE:To transmit an analog signal with sufficient accuracy by giving the same clock to a counter for channel control of each multiplexer at transmission and reception sides to block the reception of an uncertain signal in the transient state of transmission. CONSTITUTION:The multiplexer MPX1 inputting plural analog signals and a demultiplexer MPX2 whose input terminal is connected to an output terminal of the multiplexer MPX via a transmission line (a) are provided. The same clock OSC is given to counters CNT1, CNT2 for channel control provided individually to each of the multiplexer MPX1, MPX2, wirings b, c for synchronism are arranged between the counters and the clock OSC is given to the demultiplexer MPX2 via a delay DEL as an enable signal. Thus, lots of analog signals are transmitted through a few number of transmission lines and also the reception of the uncertain signal due to mismatching of the transmission line is blocked.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a time division multiplexed analog transmission circuit.

(Prior art) In remote control, etc., the heart valve that sends and receives many signals ((
・Cree, (21; et al. individual signals (2 pairs (, 11 wires of one length! This - ([4 What a huge number of wires! Kome, e installation, 1: Tj extraction Ino no ni ni tae/j I The amount of I δ is sufficiently small compared to the change in information on the next day 4
115 interval C sequential transmission IX time division multiplex transmission 1r-! 'If'l yell.

The transmitted signal and 1 - lower l: 4.7 digital number 5 and C1 and j' -) l'l /j signal etc. can be considered, and the timing for this -) digital signal is considered to be From the relationship between d3 and Tbel, 11" 1-division multiplex transmission (j
-1-1: '1-1-1: The transmission line's mismatch '717, the cost of the reaction wave, and the power/tactance of the line.

It was difficult to carry out A) due to the transient response of 1-X7 vacitance.

(Object of the invention) The present invention has been proposed in view of the above points, and has a simple 4.
i configuration 1. Transmission of analog signals with -1 minute accuracy
The first objective is to provide a time-division multiplex analog transmission circuit with Bfl.

(Structure of the invention) FIG. 1 is a circuit diagram I according to an embodiment of the present invention.

In the figure, 1 is a transmitter, 2 is a receiver 13, respectively, at 5V,
A, b, and c are transmission lines that connect and cover both provinces. However,
The transmitter 1 includes a multiplexer MI'X + to which a plurality of analog signals are input, and a multiplexer MI'X
It consists of a counter GNT that sends out the A number for channel control of X, and an oscillator 08 (1) that provides a clock to this counter CNT, and an output terminal of the multiplexer MPX I (J buffer amplifier IIA, It is connected to transmission line a via.

Here, the multiplexer MIIX is composed of analog switches such as C-MOS and logic that controls them. Channels Cl1o to ClIn are sequentially selected by the binary output of the counter CNT I, and the input analog A signal is sent to its output terminal.

On the other hand, the receiver 2 has an input terminal connected to the transmission line a via the buffer 2 to the amplifier B.
- MPX2, a counter CNT2 that sends a signal for channel control of this demultiplexer M1' Nh has 18 parts i sent via transmission line 0.
The same clock as the counter CNI is input from the internal clock O3C, and also the counters CNT, , CNT2 of the transmitting part '1 and the receiving part 2'2').
is Karan 1-Kou 11! The carry of the counter CNT is given as a reset signal of the counter CNT2 via the transmission line. This is a characteristic part, and the transmission line cJ-reclock is applied to its input terminal, and the output signal L-output signal is applied to the enable terminal of the demultiplexer MPX2. Here, the demultiplexer Ml'X2 performs the reverse operation of the multiplexer 9MPX described above, and has the function of sending the incoming horn signal to the output terminal selected by the second [1'-small signal] of the counter CNT2. have. In addition, C
- Since the element (1) using a MOS switch or the like can be used bidirectionally, it is possible to use the same element for the multiplexer MPX + and the demultiplexer MPX2. C, output of demultiplexer MPX2) J terminals are respectively content CI
＋～.

connected to the low power supply via Cn and 7 amplifiers A, ~,
Each channel CI+ to eight. ,~,C1(.

A signal is extracted every time. In addition, capacitor C+
+~+Cn and amplifiers A+, ~, An constitute an analog latch, which holds the previous analog value during a period when the signal disappears due to time-division transmission.

In operation, the oscillator O8 controls both the counters CN1t of the transmitting section 1 and the receiving section 2.

Since the same clock is applied to CNT2 and both counters are synchronized via the transmission line, the multiplexer MPX I and the demultiplexer 1tlPX L:4.
``Book channel lf is selected at the timing of @-,
Signal transmission 1f is performed via transmission line Aa. On the other hand, at this time, since the A oscillator 8C output voltage is applied to the enable terminal of the demultiplexer MPx through the delay port LL, an uncertain signal in a transient state is not input to the channel switching 11, and the signal waveform is Only stable signals after the included A-pursuit and ringing have disappeared are captured. Figure 2 shows an example of the waveform of the input signal I of the enable signal applied to the demultiplexer MPX2 and the demultiplexer MPX2 on the beam (]tsukuc). By appropriately setting the delay time τ, line mismatching dj, line inductance, and key when switching channels can be reduced.
It is possible to completely eliminate the effects of oversynchronization or ringing caused by 7 passitance.

(Effects of the Invention) As described above, the time division multiplex analog transmission circuit of the present invention includes a multiplexer into which a plurality of analog signals are input, and an input terminal jf connected to the output terminal of this multiplexer via a transmission line. 6. The same clock is applied to the roll counters of the multiplexers and demultiplexers provided individually, and synchronization wiring is connected between these counters, and the Y multiplexer υ is connected to [ 1 tsuku is 1゛r1 no is i11-2 (Nnoruiieshi 3 is 'jl?-4+yoi:, l, so the small number 1/11ba). 'Noi I; Bow (云transfer'r,,3'?J
``l J'; L2, transmission line - mistake 7 horns (': cause'! 1 <, small definite ID, - bow reception < i rJI +L゛ (saku/tame, high 1v1 Send j', +1.', l signal to long?
A Explosion] ゛L (Uru,.

[Brief explanation of the drawing]

Fig. 1 (Circuit diagram showing one embodiment of Yohon Maruaki, Fig. 2 11
Waveform diagram for each operation (1. Send A; part, 2... Receive A: Chang I1. a, b, t
r,...Transmission line, 1,115×1...l Lua, f l, clear, MllX2...Nonrunono 17 clear, +;Nl', ,fEl,...counter, +I3( N...A Nshi-ta, 11 "1"
・・・ γ i 11. - , b, , 1shi Δ2
...Hatsunono? Nong, Δ+, ′-, An・
...I'shibu, C+=-Cn...]

Claims (1)

[Claims] A multiplex cleaner that inputs multiple analog signals,
A demultiplexer whose input terminal is connected to the output terminal of the multiplexer via a transmission line is provided, and a counter for the channel controller 1-r:+-r provided individually in the multiplexer 4j and the demultiplexer 1no is provided. When the same clock is applied to Jl, synchronization wiring is provided between these counters, and the above mentioned clock is applied to the demultiplexer 4 as an enable signal via D1/-, so that A time division multiplex analog transmission circuit that suppresses the reception of uncertain signals.